[Intel-gfx] ✓ Ro.CI.BAT: success for gen9 workarounds v3

[Chris Wilson]

On Wed, Jun 08, 2016 at 05:28:31PM +0300, Mika Kuoppala wrote:
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > [ text/plain ]
> > On Tue, Jun 07, 2016 at 02:52:18PM -0000, Patchwork wrote:
> >> == Series Details ==
> >> 
> >> Series: gen9 workarounds v3
> >> URL   : https://patchwork.freedesktop.org/series/8405/
> >> State : success
> >> 
> >> == Summary ==
> >> 
> >> Series 8405v1 gen9 workarounds v3
> >> http://patchwork.freedesktop.org/api/1.0/series/8405/revisions/1/mbox
> >> 
> >> 
> >> fi-skl-i5-6260u  total:209  pass:198  dwarn:0   dfail:0   fail:0   skip:11 
> >> fi-skl-i7-6700k  total:209  pass:184  dwarn:0   dfail:0   fail:0   skip:25 
> >
> > Out of curiosity, how many of these w/a are exercised by mesa/piglit or
> > beignet test suites? If so, how many of those could we extract to igt?
> > i.e. are any of these w/a suitable for test cases??
> 
> WaEnableGapsTsvCreditFix we managed to trigger with gem_ringfill.
> 
> WaForceContextSaveRestoreNonCoherent was triggered by piglit,
> but it needed also mesa counterpart. So this is one candidate.
> 
> I agree that we should have igt triggering as a goal
> when reading, sometimes sketchy, hsds.

It's also indicative of what behaviour we should be stressing. If it is
not possible to exercise such through our uABI that is one thing. But if
we could have detected the error, then we are missing coverage in our igt.
It is definitely a useful exercise if the test remains valid for gen+1.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre