[Intel-gfx] [PATCH] Runtime: set the sub slice according to kernel pooled EU configure.
Yang Rong
rong.r.yang at intel.com
Wed Jun 15 08:19:53 UTC 2016
If BXT pooled EU enable, the 3*6 EUs is split into 2 pooled, so change
the sub slice to 2.
For min no. of eu in pool, only affact fused down 2*6 BXT devices,
because beignet don't support these devices now, add assert only.
assert.
This patch is based on kernel patch: https://patchwork.freedesktop.org/series/8200/
Thanks Arun.
Signed-off-by: Yang Rong <rong.r.yang at intel.com>
---
CMakeLists.txt | 12 ++++++++++++
src/CMakeLists.txt | 10 ++++++++++
src/intel/intel_driver.c | 15 +++++++++++++++
3 files changed, 37 insertions(+)
diff --git a/CMakeLists.txt b/CMakeLists.txt
index fae3e88..af684ed 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -153,6 +153,18 @@ IF(DRM_INTEL_FOUND)
ELSE(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
MESSAGE(STATUS "Disable subslice total query support")
ENDIF(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
+ CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_pooled_eu" "" HAVE_DRM_INTEL_POOLED_EU)
+ IF(HAVE_DRM_INTEL_POOLED_EU)
+ MESSAGE(STATUS "Enable pooled eu query support")
+ ELSE(HAVE_DRM_INTEL_POOLED_EU)
+ MESSAGE(STATUS "Disable pooled eu query support")
+ ENDIF(HAVE_DRM_INTEL_POOLED_EU)
+ CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_min_eu_in_pool" "" HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+ IF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+ MESSAGE(STATUS "Enable min eu in pool query support")
+ ELSE(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+ MESSAGE(STATUS "Disable min eu in pool query support")
+ ENDIF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
ELSE(DRM_INTEL_FOUND)
MESSAGE(FATAL_ERROR "Looking for DRM Intel (>= 2.4.52) - not found")
ENDIF(DRM_INTEL_FOUND)
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 98f8423..a002865 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -138,6 +138,16 @@ if (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
SET(CMAKE_C_FLAGS "-DHAS_SUBSLICE_TOTAL ${CMAKE_C_FLAGS}")
endif (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
+if (HAVE_DRM_INTEL_POOLED_EU)
+ SET(CMAKE_CXX_FLAGS "-DHAS_POOLED_EU ${CMAKE_CXX_FLAGS}")
+ SET(CMAKE_C_FLAGS "-DHAS_POOLED_EU ${CMAKE_C_FLAGS}")
+endif (HAVE_DRM_INTEL_POOLED_EU)
+
+if (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+ SET(CMAKE_CXX_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_CXX_FLAGS}")
+ SET(CMAKE_C_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_C_FLAGS}")
+endif (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+
set(GIT_SHA1 "git_sha1.h")
add_custom_target(${GIT_SHA1} ALL
COMMAND chmod +x ${CMAKE_CURRENT_SOURCE_DIR}/git_sha1.sh
diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
index 03d9d34..8f2373b 100644
--- a/src/intel/intel_driver.c
+++ b/src/intel/intel_driver.c
@@ -882,6 +882,21 @@ intel_update_device_info(cl_device_id device)
#endif
}
#endif
+
+#ifdef HAS_POOLED_EU
+ /* BXT pooled eu, 3*6 to 2*9, like sub slice count is 2 */
+ unsigned int has_pooled_eu = 0;
+ if(!drm_intel_get_pooled_eu(driver->fd, &has_pooled_eu) && has_pooled_eu)
+ device->sub_slice_count = 2;
+
+#ifdef HAS_MIN_EU_IN_POOL
+ unsigned int min_eu;
+ /* for fused down 2x6 devices, beignet don't support. */
+ if (has_pooled_eu && !drm_intel_get_min_eu_in_pool(driver->fd, &min_eu)) {
+ assert(min_eu == 9); //don't support fuse down device.
+ }
+#endif //HAS_MIN_EU_IN_POOL
+#endif //HAS_POOLED_EU
//We should get the device memory dynamically, but the
//mapablce mem size usage is unknown. Just ignore it.
size_t total_mem,map_mem;
--
2.1.4
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