[Intel-gfx] [PATCH] drm/i915/bxt: add missing DSI power domain to power well 1

[Ville Syrjälä]

On Tue, Mar 08, 2016 at 09:00:56PM +0200, Jani Nikula wrote:
> The DSI power domain was missing from BXT power well 1 definitions,
> failing to get the power well for DSI transcoders. As pipe A is in the
> same power well as DSI transcoders, the problem should only occur with
> pipes B and C.
> 
> Cc: Ramalingam C <ramalingam.c at intel.com>
> Cc: Deepak M <m.deepak at intel.com>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> 
> ---
> 
> This should superseed [1], but a change will be required in
> haswell_get_pipe_config() or [2] to check the DSI power domain.
> 
> [1] http://patchwork.freedesktop.org/patch/msgid/1456239619-14808-1-git-send-email-ramalingam.c@intel.com
> [2] http://patchwork.freedesktop.org/patch/msgid/1456771760-18823-1-git-send-email-ramalingam.c@intel.com
> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 5adf4b337de3..2e88a5e06884 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -421,6 +421,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
>  	BIT(POWER_DOMAIN_TRANSCODER_EDP) |		\
>  	BIT(POWER_DOMAIN_PIPE_A_PANEL_FITTER) |		\
>  	BIT(POWER_DOMAIN_PORT_DDI_A_LANES) |		\
> +	BIT(POWER_DOMAIN_PORT_DSI) |			\

This is basically a nop since pw1 is under dmc control. But given that
we still have this stuff defined here, it's clearly correct to include
DSI here.

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

>  	BIT(POWER_DOMAIN_AUX_A) |			\
>  	BIT(POWER_DOMAIN_PLLS) |			\
>  	BIT(POWER_DOMAIN_INIT))
> -- 
> 2.1.4

-- 
Ville Syrjälä
Intel OTC