[Intel-gfx] [PATCH] drm/i915/bxt: add missing DSI power domain to power well 1
jani.nikula at intel.com
Wed Mar 9 08:03:21 UTC 2016
On Tue, 08 Mar 2016, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Tue, Mar 08, 2016 at 09:00:56PM +0200, Jani Nikula wrote:
>> The DSI power domain was missing from BXT power well 1 definitions,
>> failing to get the power well for DSI transcoders. As pipe A is in the
>> same power well as DSI transcoders, the problem should only occur with
>> pipes B and C.
>> Cc: Ramalingam C <ramalingam.c at intel.com>
>> Cc: Deepak M <m.deepak at intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>> This should superseed , but a change will be required in
>> haswell_get_pipe_config() or  to check the DSI power domain.
>>  http://firstname.lastname@example.org
>>  http://email@example.com
>> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
>> 1 file changed, 1 insertion(+)
>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> index 5adf4b337de3..2e88a5e06884 100644
>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> @@ -421,6 +421,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
>> BIT(POWER_DOMAIN_TRANSCODER_EDP) | \
>> BIT(POWER_DOMAIN_PIPE_A_PANEL_FITTER) | \
>> BIT(POWER_DOMAIN_PORT_DDI_A_LANES) | \
>> + BIT(POWER_DOMAIN_PORT_DSI) | \
> This is basically a nop since pw1 is under dmc control. But given that
> we still have this stuff defined here, it's clearly correct to include
> DSI here.
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Pushed to drm-intel-next-queued, thanks for the review.
None of the CI fails have anything to do with this.
>> BIT(POWER_DOMAIN_AUX_A) | \
>> BIT(POWER_DOMAIN_PLLS) | \
Jani Nikula, Intel Open Source Technology Center
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