[Intel-gfx] [PATCH] drm/i915/bxt: Fix HDMI DPLL configuration

Daniel Vetter daniel at ffwll.ch
Thu Oct 13 13:07:18 UTC 2016


On Mon, Sep 26, 2016 at 06:02:20PM +0300, Jani Nikula wrote:
> On Mon, 26 Sep 2016, Imre Deak <imre.deak at intel.com> wrote:
> > a277ca7dc01d should've been a no-functional-change commit, but it
> > removed the initialization of the dpll_hw_state for HDMI outputs,
> > resulting in state mismatches and a failed modeset with blank
> > screen. Fix this by reinstating the dpll_hw_state initialization.
> >
> > Fixes: a277ca7dc01d ("drm/i915: Split bxt_ddi_pll_select()")
> > Signed-off-by: Imre Deak <imre.deak at intel.com>
> 
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
> Cc: Durgadoss R <durgadoss.r at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>

Aka pls update your dim copy, it'll generate this automatically.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/intel_dpll_mgr.c | 21 ++++++++++++++++-----
> >  1 file changed, 16 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > index c26d18a..e8bf838 100644
> > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > @@ -1694,21 +1694,32 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
> >  	return bxt_ddi_set_dpll_hw_state(clock, &clk_div, dpll_hw_state);
> >  }
> >  
> > +bool bxt_ddi_hdmi_set_dpll_hw_state(struct intel_crtc *intel_crtc,
> > +				    struct intel_crtc_state *crtc_state,
> > +				    int clock,
> > +				    struct intel_dpll_hw_state *dpll_hw_state)
> > +{
> > +	struct bxt_clk_div clk_div = { };
> > +
> > +	bxt_ddi_hdmi_pll_dividers(intel_crtc, crtc_state, clock, &clk_div);
> > +
> > +	return bxt_ddi_set_dpll_hw_state(clock, &clk_div, dpll_hw_state);
> > +}
> > +
> >  static struct intel_shared_dpll *
> >  bxt_get_dpll(struct intel_crtc *crtc,
> >  		struct intel_crtc_state *crtc_state,
> >  		struct intel_encoder *encoder)
> >  {
> > -	struct bxt_clk_div clk_div = {0};
> > -	struct intel_dpll_hw_state dpll_hw_state = {0};
> > +	struct intel_dpll_hw_state dpll_hw_state = { };
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >  	struct intel_digital_port *intel_dig_port;
> >  	struct intel_shared_dpll *pll;
> >  	int i, clock = crtc_state->port_clock;
> >  
> > -	if (encoder->type == INTEL_OUTPUT_HDMI
> > -	    && !bxt_ddi_hdmi_pll_dividers(crtc, crtc_state,
> > -					  clock, &clk_div))
> > +	if (encoder->type == INTEL_OUTPUT_HDMI &&
> > +	    !bxt_ddi_hdmi_set_dpll_hw_state(crtc, crtc_state, clock,
> > +					    &dpll_hw_state))
> >  		return NULL;
> >  
> >  	if ((encoder->type == INTEL_OUTPUT_DP ||
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


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