[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [01/67] drm/i915/cnp: Introduce Cannonpoint PCH. (rev2)

Patchwork patchwork at emeril.freedesktop.org
Thu Apr 6 20:12:51 UTC 2017 

== Series Details ==

Series: series starting with [01/67] drm/i915/cnp: Introduce Cannonpoint PCH. (rev2)
URL   : https://patchwork.freedesktop.org/series/22607/
State : warning

== Summary ==

Series 22607v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/22607/revisions/2/mbox/

Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                pass       -> DMESG-WARN (fi-bxt-t5700) fdo#100125
                dmesg-warn -> PASS       (fi-kbl-7560u) fdo#100125
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-bxt-t5700)

fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time: 428s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time: 427s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time: 578s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time: 508s
fi-bxt-t5700     total:278  pass:256  dwarn:2   dfail:0   fail:0   skip:20  time: 531s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time: 488s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time: 478s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time: 415s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time: 404s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time: 418s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 496s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 488s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 452s
fi-kbl-7560u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 565s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 457s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time: 576s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time: 461s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 486s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time: 436s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time: 529s
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29  time: 401s

3d39d8905c145cdae5a79fe6d0a3c6fd70ff8a2f drm-tip: 2017y-04m-06d-19h-30m-56s UTC integration manifest
de5c231 drm/i915/cnl: Adjust min pixel rate.
610e574 drm/i915/cnl: LSPCON support is gen9+
7b113d8 drm/i915/cnl: Enable Audio Pin Buffer.
9a28e23 drm/i915/cnl: WaThrottleEUPerfToAvoidTDBackPressure:cnl(pre-prod)
55fc13e drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.
5467baa drm/i915/cnl: Add support slice/subslice/eu configs
2189011 drm/i915/cnl: Setup PAT Index.
b4c1580 drm/i915/cnl: Enable fifo underrun for Cannonlake.
198ffbe drm/i915/cnl: Fix Cannonlake scaler mode programing.
932cc61 drm/i915/cnl: Cannonlake color init.
fd56199 x86/gpu: CNL uses the same GMS values as SKL
80d6cbf drm/i915/cnl: Reuse skl_wm_get_hw_state on Cannonlake.
b14fc1f drm/i915/gen10: implement gen 10 watermarks calculations
e963ecf drm/i915/gen10: fix WM latency printing
ad36893 drm/i915/cnl: don't apply the GEN9/CNL:A WM WAs to CNL:B+
9d0cb4c drm/i915/gen10: fix the gen 10 SAGV block time
969080d drm/i915/cnl: Enable SAGV for Cannonlake.
6848c02 drm/i915/gen10+: use the SKL code for reading WM latencies
7d957c2 drm/i915/cnl: Avoid old DDI translation functions on Cannonlake.
727da8c drm/i915/cnl: Get DDI clock based on PLLs.
f1be50b drm/i915/cnl: Dump the right pll registers when dumping pipe config.
da6b705 drm/i915/cnl: Add allowed DP rates for Cannonlake.
1aca31d drm/i915/cnl: Add max allowed Cannonlake DC.
a472e4a drm/i915/cnl: DC3 to DC5 counters available on CNL.
ff18629 drm/i915: Use HAS_CSR instead of gen number on DMC load.
49dc2aa drm/i915/DMC/CNL: Load DMC on CNL
95134c5 drm/i915/cnl: Add slice and subslice information to debugfs.
98fe777 drm/i915/cnl: Enable loadgen_select bit for vswing sequence
5552ef0 drm/i915/cnl: Implement voltage swing sequence.
a8e6e92 drm/i915/cnl: Add DDI Buffer translation tables for Cannonlake.
b947944 drm/i915/cnl: Add registers related to voltage swing sequences.
ce96013 drm/i915: Add MMIO helper for 6 ports with different offsets.
aaed686 drm/i915/cnl: Enable wrpll computation for CNL
b0aea9f drm/i915/cnl: Initialize PLLs
0197733 drm/i915: Configure DPLL's for Cannonlake
c4a3b27 drm/i915/cnl: DDI - PLL mapping
1b4e307 drm/i915/cnl: Allow dynamic cdclk changes on CNL
ce259ea drm/i915/cnl: Implement CNL display init/unit sequence
6703c79 drm/i915/cnl: Implement .set_cdclk() for CNL
6213086 drm/i915/cnl: Implement .get_display_clock_speed() for CNL
148d387 drm/i915/cnl: Also need power well sanitize.
960bcaf drm/i915/cnl: Add power wells for CNL
1d470e7 drm/i915/cnl: Inherit RPS stuff from previous platforms.
e6f6b61 drm/i915/cnl: Add force wake for gen10.
d6a2af3 drm/i915/gen10: Set value of Indirect Context Offset for gen10
c6c56c6 drm/i915/cnl: Add RT cache flush pipe control w/a
18cb173 drm/i915/cnl: Update the context size
3768ac8 drm/i915/cnl: Cannonlake has same MOCS table than Skylake.
5a622ed drm/i915/cnl: Configure EU slice power gating.
ecefc1a drm/i915/cnl: Add initial gen10 golden states.
46ce6d0 drm/i915/cnl: CNL has an increased DDB size
f8373b3 drm/i915/cnl: Cannonlake has 4 planes (3 sprites) per pipe
e0db005 drm/i915/cnl: Apply large line width optimization
3698be4 drm/i915/cnl: WaDisableEnhancedSBEVertexCaching
8c0338b drm/i915/cnl: Add WaDisableReplayBufferBankArbitrationOptimization
e70f18c drm/i915/cnl: Introduce initial Cannonlake Workarounds.
4d8b7c8 drm/i915/cnl: add IS_CNL_REVID macro
d36dad4 drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.
5a52856 drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.
88c1b6a drm/i915/cnl: Cannonlake uses CNP PCH.
33b7b03 drm/i915/cnl: Introduce Cannonlake platform defition.
d5c5de7 drm/i915/cnp: Panel Power sequence changes for CNP PCH.
a31f255 drm/i915/cnp: add CNP gmbus support
7ae4ea8 drm/i915/cnp: Add Backlight support to CNP PCH.
c0b3bb9 drm/i915/cnp: Get/set proper Raw clock frequency on CNP.
e744968 drm/i915/cnp: Add PCI ID for Cannonpoint LP PCH
79d50ef drm/i915/cnp: Introduce Cannonpoint PCH.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4427/

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