[Intel-gfx] [PATCH 01/67] drm/i915/cnp: Introduce Cannonpoint PCH.
Srivatsa, Anusha
anusha.srivatsa at intel.com
Thu Apr 13 17:53:01 UTC 2017
>-----Original Message-----
>From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of
>Rodrigo Vivi
>Sent: Thursday, April 6, 2017 12:15 PM
>To: intel-gfx at lists.freedesktop.org
>Cc: Vivi, Rodrigo <rodrigo.vivi at intel.com>
>Subject: [Intel-gfx] [PATCH 01/67] drm/i915/cnp: Introduce Cannonpoint PCH.
>
>Most of south engine display that is in PCH is still the same as SPT and KBP, except
>for this key differences:
>
>- Backlight: Backlight programming changed in CNP PCH.
>- Panel Power: Sligh programming changed in CNP PCH.
>- GMBUS and GPIO: The pin mapping has changed in CNP PCH.
>
>All of these changes follow more the BXT style.
>
>v2: Update definition to use dev_priv isntead of dev (Tvrtko).
>
>Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
> drivers/gpu/drm/i915/i915_drv.c | 3 +++ drivers/gpu/drm/i915/i915_drv.h | 3
>+++ drivers/gpu/drm/i915/i915_irq.c | 6 ++++--
> 3 files changed, 10 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>index bd85e38..05e3f3f 100644
>--- a/drivers/gpu/drm/i915/i915_drv.c
>+++ b/drivers/gpu/drm/i915/i915_drv.c
>@@ -216,6 +216,9 @@ static void intel_detect_pch(struct drm_i915_private
>*dev_priv)
> DRM_DEBUG_KMS("Found KabyPoint PCH\n");
> WARN_ON(!IS_SKYLAKE(dev_priv) &&
> !IS_KABYLAKE(dev_priv));
>+ } else if (id == INTEL_PCH_CNP_DEVICE_ID_TYPE) {
>+ dev_priv->pch_type = PCH_CNP;
>+ DRM_DEBUG_KMS("Found CannonPoint
>PCH\n");
> } else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
> (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||
> ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE)
>&& diff --git a/drivers/gpu/drm/i915/i915_drv.h
>b/drivers/gpu/drm/i915/i915_drv.h index c9b0949..d798976 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -1209,6 +1209,7 @@ enum intel_pch {
> PCH_LPT, /* Lynxpoint PCH */
> PCH_SPT, /* Sunrisepoint PCH */
> PCH_KBP, /* Kabypoint PCH */
>+ PCH_CNP, /* Cannonpoint PCH */
> PCH_NOP,
> };
>
>@@ -2948,11 +2949,13 @@ static inline struct scatterlist *__sg_next(struct
>scatterlist *sg)
> #define INTEL_PCH_SPT_DEVICE_ID_TYPE 0xA100
> #define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE 0x9D00
> #define INTEL_PCH_KBP_DEVICE_ID_TYPE 0xA200
>+#define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300
> #define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100
> #define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000
> #define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35
>has 2918 */
>
> #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
>+#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
> #define HAS_PCH_KBP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_KBP)
>#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
>#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT) diff --
>git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index
>d9d1969..698eb76 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -2582,7 +2582,8 @@ static void bxt_hpd_irq_handler(struct
>drm_i915_private *dev_priv,
> I915_WRITE(SDEIIR, iir);
> ret = IRQ_HANDLED;
>
>- if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv))
>+ if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||
>+ HAS_PCH_CNP(dev_priv))
> spt_irq_handler(dev_priv, iir);
> else
> cpt_irq_handler(dev_priv, iir);
>@@ -4322,7 +4323,8 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> dev->driver->disable_vblank = gen8_disable_vblank;
> if (IS_GEN9_LP(dev_priv))
> dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
>- else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv))
>+ else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||
>+ HAS_PCH_CNP(dev_priv))
> dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
> else
> dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
>--
>1.9.1
>
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