[Intel-gfx] [PATCH v3] drm/i915/bxt: Add MST support when do DPLL calculation

[Jani Nikula]

On Fri, 03 Feb 2017, "Lee, Shawn C" <shawn.c.lee at intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee at intel.com>
>
> Add the missing INTEL_OUTPUT_DP_MST case in bxt_get_dpll()
> to correctly initialize the crtc_state and port plls when
> link training a DP MST monitor on BXT/APL devices.
>
> Fixes: a277ca7dc01d ("drm/i915: Split bxt_ddi_pll_select()")
> Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=99572
>
> Reviewed-by: Cooper Chiou <cooper.chiou at intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang at intel.com>
> Reviewed-by: Ciobanu, Nathan D <nathan.d.ciobanu at intel.com>
> Reviewed-by: Herbert, Marc <marc.herbert at intel.com>
> Reviewed-by: Bride, Jim <jim.bride at intel.com>
> Reviewed-by: Navare, Manasi D <manasi.d.navare at intel.com>
> Cc: Jani Nikula <jani.nikula at intel.com>
>
> Signed-off-by: Lee, Shawn C <shawn.c.lee at intel.com>

Pushed to drm-intel-next-queued, thanks for the patch and all the
reviews.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/intel_dpll_mgr.c |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index c92a2558beb4..1a1d99d266ed 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -1855,7 +1855,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
>  		return NULL;
>  
>  	if ((encoder->type == INTEL_OUTPUT_DP ||
> -	     encoder->type == INTEL_OUTPUT_EDP) &&
> +	     encoder->type == INTEL_OUTPUT_EDP ||
> +	     encoder->type == INTEL_OUTPUT_DP_MST ) &&
>  	    !bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
>  		return NULL;

-- 
Jani Nikula, Intel Open Source Technology Center