[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] HAX enable guc submission for CI
Chris Wilson
chris at chris-wilson.co.uk
Tue Feb 28 15:10:50 UTC 2017
On Tue, Feb 28, 2017 at 02:48:25PM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v5,1/3] HAX enable guc submission for CI
> URL : https://patchwork.freedesktop.org/series/20375/
> State : success
>
> == Summary ==
>
> Series 20375v1 Series without cover letter
> https://patchwork.freedesktop.org/api/1.0/series/20375/revisions/1/mbox/
>
> fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11
> fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39
> fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27
> fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31
> fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16
> fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16
> fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50
> fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18
> fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18
> fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28
> fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29
>
> cbeef675410c1628969ac5396d751ff44a541a81 drm-tip: 2017y-02m-28d-13h-53m-02s UTC integration manifest
> 1485f0f drm/i915/guc: Reorder __i915_guc_submit to reduce spinlock holdtime
> 46e04ea drm/i915/guc: Make wq_lock irq-safe
Applied this pair and now back to wondering about bxt.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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