[Intel-gfx] [RFC] drm/i915/lrc: allocate separate page for HWSP

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2017-07-06 17:10:40)
> On gen8+ we're currently using the PPHWSP of the kernel ctx as the
> global HWSP. However, when the kernel ctx gets submitted (e.g. from
> __intel_autoenable_gt_powersave) the HW will use that page as both
> HWSP and PPHWSP. Currently we're not seeing any problem because the
> conflict happens at offsets below 0x30 in an area we don't access,
> but that is not guaranteed to be true for future platform.

More to the point, I've stumbled upon a reason to want a separate HWSP
for execlists, today, as we can access the CSB from within the cacheable
HWSP. I evaluated this patch thinking that there was no need, since the
only use we have for contents of the status_page is the seqno, everything
else is volatile.

I'll look at it again in a fresh light, and at first glance it appears
to be just the simple translation one expects.
-Chris