[Intel-gfx] [PATCH 19/67] drm/i915/cnl: Configure EU slice power gating.

[Joonas Lahtinen]

On to, 2017-04-06 at 12:15 -0700, Rodrigo Vivi wrote:
> Cannonlake also supports slice power gating on devices with more
> than one slice as SKL. Let's assume that this is the same for SKL+
> and exclude BXT only.
> 
> v2: Also remove KBL.
> 

Bspec: 12566

> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation