[Intel-gfx] [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

[Ville Syrjälä]

On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
> In Gen9 platform Interlaced fetch mode doesn't support following plane
> configuration:
>  - Y/Yf tiling
>  - 90/270 rotation

The rotation check seems to be missing from the code?

>  - YUV420 hybrid planar source pixel formats.
> 
> This patch adds check to fail the flip if any of the above configuration
> is requested.
> 
> Changes since V1:
>  - handle checks in intel_plane_atomic_check_with_state (ville)
>  - takeout plane scaler checks combile with pipe scaler in next patch
> Changes since V2:
>  - No need to check for NV12 as it need scaling, so it will be rejected
>    by scaling check (ville)
> 
> Signed-off-by: Mahesh Kumar <mahesh1.kumar at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
> index 4325cb0a04f5..ee76fab7bb6f 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>  	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>  	struct drm_plane_state *state = &intel_state->base;
>  	struct intel_plane *intel_plane = to_intel_plane(plane);
> +	const struct drm_display_mode *adjusted_mode =
> +		&crtc_state->base.adjusted_mode;
>  	int ret;
>  
>  	/*
> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>  	if (ret)
>  		return ret;
>  
> +	/*
> +	 * Y-tiling is not supported in IF-ID Interlace mode in
> +	 * GEN9 and above.
> +	 */
> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
> +			return -EINVAL;
> +		}
> +	}
> +
>  	/* FIXME pre-g4x don't work like this */
>  	if (intel_state->base.visible)
>  		crtc_state->active_planes |= BIT(intel_plane->id);
> -- 
> 2.13.0

-- 
Ville Syrjälä
Intel OTC