[Intel-gfx] [PATCH] drm/i915: Extend residency counter ranges on chv and byt

[Ville Syrjälä]

On Thu, Mar 02, 2017 at 08:01:40PM +0200, Mika Kuoppala wrote:
> We were passively acting on the high counter value bit
> and as it was never set, we were only utilizing the
> the 32bits of resolution. As the divisor with these platforms
> is quite high, the wrap around happened in the less than 13 seconds.
> 
> If we toggle the resolution bit in the control register and

Can't be done on all machines. IIRC both Chris and me tried this at
some point and on some machines the register was locked. Also I'm
not sure if some piece of firmware depends on the original setting.

> read twice we can get 8 bits more, bringing the wrap in
> 54 minute range.
> 
> Reported-by: Len Brown <len.brown at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Len Brown <len.brown at intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_sysfs.c | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index af0ac9f..807d7be 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -53,17 +53,26 @@ static u32 calc_residency(struct drm_i915_private *dev_priv,
>  
>  	/* On VLV and CHV, residency time is in CZ units rather than 1.28us */
>  	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> -		units = 1;
> +		u32 lower, upper;
>  		div = dev_priv->czclk_freq;
>  
> -		if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> -			units <<= 8;
> +		I915_WRITE(VLV_COUNTER_CONTROL,
> +			   _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH));
> +		upper = I915_READ(reg);
> +
> +		I915_WRITE(VLV_COUNTER_CONTROL,
> +			   _MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH));
> +		lower = I915_READ(reg);
> +
> +		raw_time = lower | (u64)upper << 8;
> +		goto out;
>  	} else if (IS_GEN9_LP(dev_priv)) {
>  		units = 1;
>  		div = 1200;		/* 833.33ns */
>  	}
>  
>  	raw_time = I915_READ(reg) * units;
> + out:
>  	ret = DIV_ROUND_UP_ULL(raw_time, div);
>  
>  	intel_runtime_pm_put(dev_priv);
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel OTC