[Intel-gfx] [PATCH] drm/i915: Extend residency counter ranges on chv and byt
Chris Wilson
chris at chris-wilson.co.uk
Thu Mar 2 18:34:58 UTC 2017
On Thu, Mar 02, 2017 at 08:20:24PM +0200, Mika Kuoppala wrote:
> Chris Wilson <chris at chris-wilson.co.uk> writes:
>
> > On Thu, Mar 02, 2017 at 08:01:40PM +0200, Mika Kuoppala wrote:
> >> We were passively acting on the high counter value bit
> >> and as it was never set, we were only utilizing the
> >> the 32bits of resolution. As the divisor with these platforms
> >> is quite high, the wrap around happened in the less than 13 seconds.
> >>
> >> If we toggle the resolution bit in the control register and
> >> read twice we can get 8 bits more, bringing the wrap in
> >> 54 minute range.
> >>
> >> Reported-by: Len Brown <len.brown at intel.com>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94852
> >> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> >> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >> Cc: Len Brown <len.brown at intel.com>
> >> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> >> ---
> >> drivers/gpu/drm/i915/i915_sysfs.c | 15 ++++++++++++---
> >> 1 file changed, 12 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> >> index af0ac9f..807d7be 100644
> >> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> >> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> >> @@ -53,17 +53,26 @@ static u32 calc_residency(struct drm_i915_private *dev_priv,
> >>
> >> /* On VLV and CHV, residency time is in CZ units rather than 1.28us */
> >> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> >> - units = 1;
> >> + u32 lower, upper;
> >> div = dev_priv->czclk_freq;
> >>
> >> - if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> >> - units <<= 8;
> >> + I915_WRITE(VLV_COUNTER_CONTROL,
> >> + _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH));
> >> + upper = I915_READ(reg);
> >> +
> >> + I915_WRITE(VLV_COUNTER_CONTROL,
> >> + _MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH));
> >> + lower = I915_READ(reg);
> >
> > Is this true??? There is an internal 40bit counter to which we have a
> > 32bit window (i.e. changing the counter control doesn't reset the
> > count).
>
> Yes, evidence suggests so with prod byt. But I am not sure if same
> holds true with chv.
And checked it's not returning the same value on both reads?
> > Note that you should recheck the high range afterwards to guard against
> > constructing an erroneous value across wraparound. And this should also
> > leave it set to high for other users on vlv.
>
> Other user being debugs?
RPS. (And I've a pmu that wants it.)
> Perhaps u64 utility function to read it from both places then.
A definite possibility.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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