[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: link rate and lane count refactoring (rev3)
Patchwork
patchwork at emeril.freedesktop.org
Tue Mar 28 16:50:00 UTC 2017
== Series Details ==
Series: drm/i915/dp: link rate and lane count refactoring (rev3)
URL : https://patchwork.freedesktop.org/series/18359/
State : success
== Summary ==
Series 18359v3 drm/i915/dp: link rate and lane count refactoring
https://patchwork.freedesktop.org/api/1.0/series/18359/revisions/3/mbox/
Test gem_exec_suspend:
Subgroup basic-s3:
incomplete -> PASS (fi-skl-6260u)
Subgroup basic-s4-devices:
dmesg-warn -> PASS (fi-kbl-7560u) fdo#100428
fdo#100428 https://bugs.freedesktop.org/show_bug.cgi?id=100428
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 462s
fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time: 462s
fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 580s
fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 542s
fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 581s
fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 505s
fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 503s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 432s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 440s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 437s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 520s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 494s
fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 485s
fi-kbl-7560u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 591s
fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 475s
fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 606s
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 489s
fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 517s
fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time: 465s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 556s
fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time: 429s
dabd992961047cf26698036f563aa86a083284ac drm-tip: 2017y-03m-28d-15h-25m-54s UTC integration manifest
9198096 drm/i915/dp: read sink count to a temporary variable first
73c8492 drm/i915/dp: use readb and writeb calls for single byte DPCD access
0dfcae5 drm/i915/dp: localize link rate index variable more
927edbe drm/i915/mst: use max link not sink lane count
ad7b47c drm/i915/dp: add functions for max common link rate and lane count
8e49432 drm/i915/dp: don't call the link parameters sink parameters
f282076 drm/i915/dp: do not limit rate seek when not needed
c6d445d drm/i915/dp: cache common rates with sink rates
2b0af8d drm/i915/dp: use the sink rates array for max sink rates
31f8e23 drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4
1c46c61 drm/i915/dp: cache source rates at init
3ec14d5 drm/i915/dp: rename rate_to_index() to intel_dp_rate_index() and reuse
9e6a1d9 drm/i915/dp: return errors from rate_to_index()
deb82e8 drm/i915/dp: use known correct array size in rate_to_index
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4326/
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