[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: link rate and lane count refactoring (rev4)

Patchwork patchwork at emeril.freedesktop.org
Wed Mar 29 09:48:56 UTC 2017


== Series Details ==

Series: drm/i915/dp: link rate and lane count refactoring (rev4)
URL   : https://patchwork.freedesktop.org/series/18359/
State : success

== Summary ==

Series 18359v4 drm/i915/dp: link rate and lane count refactoring
https://patchwork.freedesktop.org/api/1.0/series/18359/revisions/4/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                fail       -> PASS       (fi-snb-2600) fdo#100007
Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                dmesg-warn -> PASS       (fi-bxt-t5700) fdo#100125
Test kms_force_connector_basic:
        Subgroup force-connector-state:
                skip       -> PASS       (fi-ivb-3520m)
        Subgroup force-edid:
                skip       -> PASS       (fi-ivb-3520m)
        Subgroup force-load-detect:
                skip       -> PASS       (fi-ivb-3520m)
        Subgroup prune-stale-modes:
                skip       -> PASS       (fi-ivb-3520m)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-c:
                dmesg-warn -> PASS       (fi-kbl-7560u)

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time: 467s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time: 459s
fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39  time: 592s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time: 533s
fi-bxt-t5700     total:278  pass:258  dwarn:0   dfail:0   fail:0   skip:20  time: 588s
fi-byt-j1900     total:278  pass:251  dwarn:0   dfail:0   fail:0   skip:27  time: 505s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time: 431s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time: 433s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time: 447s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 506s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 497s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 484s
fi-kbl-7560u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 588s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 479s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time: 597s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time: 488s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 525s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time: 462s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time: 552s
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29  time: 423s

486e7f49dc0d278c62a809532e4b645ddf9a3c25 drm-tip: 2017y-03m-29d-08h-01m-04s UTC integration manifest
1f9f4e8 drm/i915/dp: read sink count to a temporary variable first
0d220ad drm/i915/dp: use readb and writeb calls for single byte DPCD access
a703dc7 drm/i915/dp: localize link rate index variable more
10fc0d2 drm/i915/mst: use max link not sink lane count
8534706 drm/i915/dp: add functions for max common link rate and lane count
c1b096f drm/i915/dp: don't call the link parameters sink parameters
73552e9 drm/i915/dp: do not limit rate seek when not needed
4e48a12 drm/i915/dp: cache common rates with sink rates
37f9a56 drm/i915/dp: use the sink rates array for max sink rates
0342da6 drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4
a1d0fa1 drm/i915/dp: cache source rates at init
e3793b2 drm/i915/dp: rename rate_to_index() to intel_dp_rate_index() and reuse
32d79ba drm/i915/dp: return errors from rate_to_index()
25bff2e drm/i915/dp: use known correct array size in rate_to_index

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4335/


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