[Intel-gfx] [PATCH v4 2/3] drm/i915/guc: Make scratch register base and count flexible

[Jani Nikula]

On Wed, 10 May 2017, Joonas Lahtinen <joonas.lahtinen at linux.intel.com> wrote:
> On ti, 2017-05-09 at 14:08 +0000, Michal Wajdeczko wrote:
>> We are using some scratch registers in MMIO based send function.
>> Make their base and count flexible in preparation of upcoming
>> GuC firmware/hardware changes. While around, change cmd len
>> parameter verification from WARN_ON to GEM_BUG_ON as we don't
>> need this all the time.
>> 
>> v2: call out WARN/GEM_BUG change in the commit msg (Daniele)
>> v3: don't overqualify the ints (Chris)
>> v4: rebase and use proper enum
>> 
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
>> Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Jani Nikula <jani.nikula at linux.intel.com>
>> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
>
> I suppose this could've had "# v2" at the end, unless Daniele acked all
> the remaining changes.
>
> Anyway, looks good to me with the changes.
>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
>
> Could use an A-b from Jani for disagree and commit stamp as he
> initially objected the way of implementing this. 

Acked-by: Jani Nikula <jani.nikula at intel.com>



>
> Regards, Joonas

-- 
Jani Nikula, Intel Open Source Technology Center