[Intel-gfx] [PATCH 2/8] drm/i915: Parametrize CBR_DPLLBMD_PIPE defines

Chris Wilson chris at chris-wilson.co.uk
Wed Sep 13 14:38:14 UTC 2017


Quoting Ville Syrjala (2017-09-13 15:08:54)
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Apply a bit of polish by parametrizing the CBR_DPLLBMD_PIPE defines.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

> ---
>  drivers/gpu/drm/i915/i915_reg.h      | 3 +--
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  2 files changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9f03cd063afe..06eaccf2c720 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5663,8 +5663,7 @@ enum {
>  #define  CBR_PWM_CLOCK_MUX_SELECT      (1<<30)
>  
>  #define CBR4_VLV                       _MMIO(VLV_DISPLAY_BASE + 0x70450)
> -#define  CBR_DPLLBMD_PIPE_C            (1<<29)
> -#define  CBR_DPLLBMD_PIPE_B            (1<<18)
> +#define  CBR_DPLLBMD_PIPE(pipe)                (1<<(7+(pipe)*11)) /* pipes B and C */

Hmm, all the prepared macros we have expect a 0-offset. (Otherwise you
get something like

(1 << (CBR_DPLLBMD_PIPE_B + (CBR_DPLLDMB_PIPE_C - CBR_DPLLDMB_PIPE_B)*((pipe) - PIPE_B)))

and at that point the numbers are much clearer and quicker to
reconstruct to match the docs.)
-Chris


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