[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/icl: Add reset control register changes

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/icl: Add reset control register changes
URL   : https://patchwork.freedesktop.org/series/41214/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e66c24e4479c drm/i915/icl: Add reset control register changes
-:67: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#67: FILE: drivers/gpu/drm/i915/intel_uncore.c:1926:
+			       unsigned engine_mask)

total: 0 errors, 1 warnings, 0 checks, 93 lines checked
55add798611a drm/i915/icl: Use hw engine class, instance to find irq handler
2fb24c7d21c8 drm/i915/icl: Handle RPS interrupts correctly for Gen11
a60d05f37135 drm/i915/icl: Deal with GT INT DW correctly
-:82: WARNING:TYPO_SPELLING: 'succesfully' may be misspelled - perhaps 'successfully'?
#82: FILE: drivers/gpu/drm/i915/i915_irq.c:269:
+		 * to) recover from this succesfully, we need to clear

total: 0 errors, 1 warnings, 0 checks, 159 lines checked
a74147af0713 drm/i915/icl: Enable RC6 and RPS in Gen11