[Intel-gfx] [PATCH v11 00/23] drm/i915/icl: dsi enabling

Jani Nikula jani.nikula at intel.com
Mon Dec 3 14:08:36 UTC 2018


On Thu, 29 Nov 2018, Jani Nikula <jani.nikula at intel.com> wrote:
> v11 of [1], incorporating DSI PLL work [2] from Vandita as well as PLL
> mapping and gating patches [3] from me and [4] from Imre.
>
> It made sense to squash some patches in [1] and [2] together, I've tried
> to set authorship and co-developed-by tags fairly.
>
> The series is also available in icl-dsi-2018-11-29 branch of my fdo git
> repo [5].

Pushed the series to dinq except for the three HACK patches at the
end. They'll still need to be addressed one way or another.

Thanks everyone for your contributions in writing the patches,
reviewing, testing, etc. It's been a long ride!

BR,
Jani.



>
>
> BR,
> Jani.
>
>
> [1] https://patchwork.freedesktop.org/series/51011/
> [2] https://patchwork.freedesktop.org/series/51373/
> [3] http://patchwork.freedesktop.org/patch/msgid/20181129115715.9152-1-jani.nikula@intel.com
> [4] http://patchwork.freedesktop.org/patch/msgid/20181127163606.28841-1-imre.deak@intel.com
> [5] https://cgit.freedesktop.org/~jani/drm/
>
>
> Imre Deak (1):
>   drm/i915/icl: Sanitize DDI port clock gating for DSI ports
>
> Jani Nikula (4):
>   drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooks
>   drm/i915/icl: add dummy DSI GPIO element execution function
>   drm/i915/icl: add pll mapping for DSI
>   HACK: drm/i915/bios: ignore VBT not overflowing the mailbox
>
> Madhav Chauhan (16):
>   drm/i915/icl: Calculate DPLL params for DSI
>   drm/i915/icl: Allocate DSI encoder/connector
>   drm/i915/icl: Fill DSI ports info
>   drm/i915/icl: Allocate DSI hosts and imlement host transfer
>   drm/i915/icl: Get HW state for DSI encoder
>   drm/i915/icl: Add DSI encoder compute config hook
>   drm/i915/icl: Configure DSI Dual link mode
>   drm/i915/icl: Consider DSI for getting transcoder state
>   drm/i915/icl: Get pipe timings for DSI
>   drm/i915/icl: Define missing bitfield for shortplug reg
>   drm/i915/icl: Define Panel power ctrl register
>   drm/i915/icl: Define display GPIO pins for DSI
>   drm/i915/icl: Gate clocks for DSI
>   drm/i915/icl: Ungate DSI clocks
>   HACK: drm/i915/icl: Add changes to program DSI panel GPIOs
>   HACK: drm/i915/icl: Configure backlight functions for DSI
>
> Vandita Kulkarni (2):
>   drm/i915/icl: Use the same pll functions for dsi
>   drm/i915/icl: Add get config functionality for DSI
>
>  drivers/gpu/drm/i915/i915_reg.h       |  12 +
>  drivers/gpu/drm/i915/icl_dsi.c        | 492 +++++++++++++++++++++++++++++++++-
>  drivers/gpu/drm/i915/intel_bios.c     |   1 -
>  drivers/gpu/drm/i915/intel_ddi.c      | 153 ++++++-----
>  drivers/gpu/drm/i915/intel_display.c  |  44 +--
>  drivers/gpu/drm/i915/intel_dpll_mgr.c |   3 +-
>  drivers/gpu/drm/i915/intel_drv.h      |   8 +-
>  drivers/gpu/drm/i915/intel_dsi.h      |   5 +
>  drivers/gpu/drm/i915/intel_dsi_vbt.c  |  58 +++-
>  drivers/gpu/drm/i915/intel_panel.c    |   3 +-
>  10 files changed, 674 insertions(+), 105 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


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