[Intel-gfx] [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting

[Manasi Navare]

On Tue, Nov 20, 2018 at 08:24:39PM +0000, Chris Wilson wrote:
> Always show the FEC capability as it is initialised to 0 before error.

That is a good point, do you think we should do the same for DSC DPCD and print
that unconditionally?

Manasi

> Fixing,
> 
> drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn: inconsistent indenting
> 
> Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala at linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 7699f9b7b2d2..de6c982b1d1e 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3837,15 +3837,14 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
>  		DRM_DEBUG_KMS("DSC DPCD: %*ph\n",
>  			      (int)sizeof(intel_dp->dsc_dpcd),
>  			      intel_dp->dsc_dpcd);
> +
>  		/* FEC is supported only on DP 1.4 */
> -		if (!intel_dp_is_edp(intel_dp)) {
> -			if (drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
> -					      &intel_dp->fec_capable) < 0)
> -				DRM_ERROR("Failed to read FEC DPCD register\n");
> +		if (!intel_dp_is_edp(intel_dp) &&
> +		    drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,
> +				      &intel_dp->fec_capable) < 0)
> +			DRM_ERROR("Failed to read FEC DPCD register\n");
>  
> -		DRM_DEBUG_KMS("FEC CAPABILITY: %x\n",
> -			      intel_dp->fec_capable);
> -		}
> +		DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp->fec_capable);
>  	}
>  }
>  
> -- 
> 2.19.1
>