[Intel-gfx] [RFC 13/15] drm/i915: IS_GEN range helpers

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Add IS_GEN_GT(E) and IS_GEN_LT(E) helpers.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 49 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9025658bada7..b66f288bde7d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2740,6 +2740,55 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_GEN10(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(9)))
 #define IS_GEN11(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(10)))
 
+#define __test_mask(s, e) \
+({ \
+	u16 m__ = (u16)INTEL_GEN_MASK((s), (e)); \
+\
+	m__ &= ~BIT(0); \
+	if (!IS_ENABLED(CONFIG_DRM_I915_GEN2)) \
+		m__ &= ~BIT(1); \
+	if (!IS_ENABLED(CONFIG_DRM_I915_GEN3)) \
+		m__ &= ~BIT(2); \
+	if (!IS_ENABLED(CONFIG_DRM_I915_GEN4)) \
+		m__ &= ~BIT(3); \
+	if (!IS_ENABLED(CONFIG_DRM_I915_GEN5)) \
+		m__ &= ~BIT(4); \
+	if (!IS_ENABLED(CONFIG_DRM_I915_GEN6)) \
+		m__ &= ~BIT(5); \
+	if (!IS_ENABLED(CONFIG_DRM_I915_GEN7)) \
+		m__ &= ~BIT(6); \
+\
+	m__; \
+})
+
+#define IS_GEN_GT(p, g) \
+({ \
+	u16 res__ = __test_mask((g) + 1, GEN_FOREVER) & (p)->info.gen_mask; \
+ \
+	res__; \
+})
+
+#define IS_GEN_GTE(p, g) \
+({ \
+	u16 res__ = __test_mask((g), GEN_FOREVER) & (p)->info.gen_mask; \
+ \
+	res__; \
+})
+
+#define IS_GEN_LT(p, g) \
+({ \
+	u16 res__ = __test_mask(GEN_FOREVER, (g) - 1) & (p)->info.gen_mask; \
+ \
+	res__; \
+})
+
+#define IS_GEN_LTE(p, g) \
+({ \
+	u16 res__ = __test_mask(GEN_FOREVER, (g)) & (p)->info.gen_mask; \
+ \
+	res__; \
+})
+
 #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
 #define IS_GEN9_LP(dev_priv)	(IS_GEN9(dev_priv) && IS_LP(dev_priv))
 #define IS_GEN9_BC(dev_priv)	(IS_GEN9(dev_priv) && !IS_LP(dev_priv))
-- 
2.14.1