February 2018 Archives by author

• Messages sorted by: [ thread ] [ subject ] [ date ]
• More info on this list...

Starting: Thu Feb 1 00:37:23 UTC 2018
Ending: Wed Feb 28 23:57:10 UTC 2018
Messages: 3220

• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Stefan Agner
• [Intel-gfx] [PATCH i-g-t 2/3] meson: gtkdoc support   Eric Anholt
• [Intel-gfx] [PATCH igt] lib/dummyload: Avoid assertions in lowlevel spin constructor   Antonio Argenziano
• [Intel-gfx] [igt-dev] [PATCH igt 3/5] igt/gem_ctx_switch: Exercise all engines at once   Antonio Argenziano
• [Intel-gfx] [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences   Antonio Argenziano
• [Intel-gfx] [PATCH] drm/i915/perf: fix perf stream opening lock   Matthew Auld
• [Intel-gfx] [PATCH 01/17] drm/i915/icl: add definitions for the ICL PLL registers   James Ausmus
• [Intel-gfx] [PATCH 02/17] drm/i915/icl: add basic support for the ICL clocks   James Ausmus
• [Intel-gfx] [PATCH 03/17] drm/i915/icl: compute the combo PHY (DPLL) HDMI registers   James Ausmus
• [Intel-gfx] [PATCH 04/17] drm/i915/icl: compute the combo PHY (DPLL) DP registers   James Ausmus
• [Intel-gfx] [PATCH v2 2/6] drm/i915: Only pin the fence for primary planes (and gen2/3)   Guang (George) Bai
• [Intel-gfx] [PATCH v3 00/10] extend PWM framework to support PWM modes   Claudiu Beznea
• [Intel-gfx] [PATCH v3 01/10] pwm: extend PWM framework with PWM modes   Claudiu Beznea
• [Intel-gfx] [PATCH v3 02/10] pwm: clps711x: populate PWM mode in of_xlate function   Claudiu Beznea
• [Intel-gfx] [PATCH v3 03/10] pwm: cros-ec: populate PWM mode in of_xlate function   Claudiu Beznea
• [Intel-gfx] [PATCH v3 04/10] pwm: pxa: populate PWM mode in of_xlate function   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH v3 06/10] pwm: add PWM modes   Claudiu Beznea
• [Intel-gfx] [PATCH v3 07/10] pwm: atmel: add pwm capabilities   Claudiu Beznea
• [Intel-gfx] [PATCH v3 08/10] pwm: add push-pull mode support   Claudiu Beznea
• [Intel-gfx] [PATCH v3 09/10] pwm: add documentation for pwm push-pull mode   Claudiu Beznea
• [Intel-gfx] [PATCH v3 10/10] pwm: atmel: add push-pull mode support   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH v3 06/10] pwm: add PWM modes   Claudiu Beznea
• [Intel-gfx] ✗ Fi.CI.BAT: failure for extend PWM framework to support PWM modes   Claudiu Beznea
• [Intel-gfx] [PATCH v3 01/10] pwm: extend PWM framework with PWM modes   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH 04/43] mei: me: add gemini lake devices ids   Ramalingam C
• [Intel-gfx] [PATCH 01/43] drm: hdcp2.2 authentication msg definitions   Ramalingam C
• [Intel-gfx] [PATCH 01/43] drm: hdcp2.2 authentication msg definitions   Ramalingam C
• [Intel-gfx] [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()   Ramalingam C
• [Intel-gfx] [PATCH v2 8/8] drm/i915: Deduplicate the code to fill the aux message header   Ramalingam C
• [Intel-gfx] [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()   Ramalingam C
• [Intel-gfx] [PATCH 26/43] drm/i915: Define Intel HDCP2.2 registers   Ramalingam C
• [Intel-gfx] [PATCH 25/43] drm/i915: Define HDCP2.2 related variables   Ramalingam C
• [Intel-gfx] [PATCH 24/43] drm/i915: wait for cp_irq   Ramalingam C
• [Intel-gfx] [PATCH 23/43] drm/i915: wrapping all hdcp var into intel_hdcp   Ramalingam C
• [Intel-gfx] [PATCH 22/43] drm/i915: Async execution of hdcp authentication   Ramalingam C
• [Intel-gfx] [PATCH 0/5] HDCP1.4 fixes   Ramalingam C
• [Intel-gfx] [PATCH 1/5] drm/i915: Read HDCP R0 thrice in case of mismatch   Ramalingam C
• [Intel-gfx] [PATCH 2/5] drm/i915: read Vprime thrice incase of mismatch   Ramalingam C
• [Intel-gfx] [PATCH 3/5] drm/i915: Check hdcp key loadability   Ramalingam C
• [Intel-gfx] [PATCH 4/5] drm/i915: Poll hdcp register on sudden NACK   Ramalingam C
• [Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim   Ramalingam C
• [Intel-gfx] [PATCH 0/5] HDCP1.4 fixes   Ramalingam C
• [Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim   Ramalingam C
• [Intel-gfx] [PATCH 1/5] drm/i915: Read HDCP R0 thrice in case of mismatch   Ramalingam C
• [Intel-gfx] [PATCH v2] drm/i915: read Vprime thrice incase of mismatch   Ramalingam C
• [Intel-gfx] [PATCH 4/5] drm/i915: Poll hdcp register on sudden NACK   Ramalingam C
• [Intel-gfx] [PATCH 06/43] misc/mei/hdcp: Add KBuild for mei hdcp driver   Ramalingam C
• [Intel-gfx] [PATCH] drm/i915/psr: Check for power state control capability.   Nathan Ciobanu
• [Intel-gfx] [CI 1/6] drm/i915/psr: New power domain for AUX IO.   Nathan Ciobanu
• [Intel-gfx] [PATCH 2/2] drm/i915/cnl: New power domain for AUX IO.   Imre Deak
• [Intel-gfx] [PATCH 2/2] drm/i915/cnl: New power domain for AUX IO.   Imre Deak
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Imre Deak
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Imre Deak
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Imre Deak
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Imre Deak
• [Intel-gfx] [PATCH] drm/i915: Tell vga_switcheroo whether runtime PM is used   Imre Deak
• [Intel-gfx] [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset   Imre Deak
• [Intel-gfx] [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset   Imre Deak
• [Intel-gfx] [PATCH 5/8] drm/i915: Fix plane YCbCr->RGB conversion for GLK   Imre Deak
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Alex Deucher
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Juha-Pekka Heikkila
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Juha-Pekka Heikkila
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Juha-Pekka Heikkila
• [Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev11)   Arkadiusz Hiler
• [Intel-gfx] ✗ Fi.CI.IGT: failure for tests/kms_rotation_crc: Remove hardcoding of platforms in igt_require()   Arkadiusz Hiler
• [Intel-gfx] [PATCH igt 1/2] lib: Export kmsg()   Arkadiusz Hiler
• [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] tests/testdisplay: Explicitly use GLIB_CFLAGS   Arkadiusz Hiler
• [Intel-gfx] [PATCH igt v2] tests: Add a random load generator   Arkadiusz Hiler
• [Intel-gfx] [CI v3] drm/i915: GuC test run   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure   Sagar Arun Kamble
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Sagar Arun Kamble
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Sagar Arun Kamble
• [Intel-gfx] [PATCH 1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Sagar Arun Kamble
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Sagar Arun Kamble
• [Intel-gfx] [PATCH 4.14 036/167] x86/gpu: add CFL to early quirks   Greg Kroah-Hartman
• [Intel-gfx] [PATCH 4.15 035/163] x86/gpu: add CFL to early quirks   Greg Kroah-Hartman
• [Intel-gfx] [PATCH i-g-t 1/2] igt/gem_fd_exhaustion: Actually test error handling on fd exhaustion   Karol Krol
• [Intel-gfx] [PATCH i-g-t 2/2] igt/gem_fd_exhaustion: Modify fs.nr_open for duration of the test   Karol Krol
• [Intel-gfx] [PATCH] drm/i915: Rename drm_i915_gem_request to i915_request   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Add a GEM_TRACE to show when the context is completed   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Add a GEM_TRACE to show when the context is completed   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later   Mika Kuoppala
• [Intel-gfx] [PATCH 2/4] drm/i915/icl: Show interrupt registers in debugfs   Mika Kuoppala
• [Intel-gfx] [CI] drm/i915/icl: Prepare for more rings   Mika Kuoppala
• [Intel-gfx] [PATCH igt] igt/gem_ctx_isolation: Fix checking for context support   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Mika Kuoppala
• [Intel-gfx] [PATCH igt v2] igt/gem_exec_schedule: Exercise "deep" preemption   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Repeat the GEM_BUG_ON message in the ftrace log   Mika Kuoppala
• [Intel-gfx] [CI 1/2] drm/i915/icl: Prepare for more rings   Mika Kuoppala
• [Intel-gfx] [CI 2/2] drm/i915/icl: Interrupt handling   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Don't deref request->ctx inside unlocked print_request()   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Don't deref request->ctx inside unlocked print_request()   Mika Kuoppala
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/2] drm/i915/icl: Prepare for more rings   Mika Kuoppala
• [Intel-gfx] Updated drm-intel-testing   Joonas Lahtinen
• [Intel-gfx] [PATCH] drm/i915: Rename drm_i915_gem_request to i915_request   Joonas Lahtinen
• [Intel-gfx] [PATCH] drm/i915/hsw: add missing disabled EUs registers reads   Joonas Lahtinen
• [Intel-gfx] [PULL] drm-intel-next   Joonas Lahtinen
• [Intel-gfx] [PATCH v2] drm/i915/hsw: add missing disabled EUs registers reads   Lionel Landwerlin
• [Intel-gfx] [PATCH v3] drm/i915/hsw: add missing disabled EUs registers reads   Lionel Landwerlin
• [Intel-gfx] [PATCH v4] drm/i915/hsw: add missing disabled EUs registers reads   Lionel Landwerlin
• [Intel-gfx] [PATCH 2/2] drm/i915: Reduce context HW ID lifetime   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 0/6] drm/i915: expose RCS topology to userspace   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 1/6] drm/i915: store all subslice masks   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 2/6] drm/i915/debugfs: reuse max slice/subslices already stored in sseu   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 3/6] drm/i915/debugfs: add rcs topology entry   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 4/6] drm/i915: add rcs topology to error state   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 5/6] drm/i915: add query uAPI   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 6/6] drm/i915: expose rcs topology through query uAPI   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 0/6] drm/i915: expose RCS topology to userspace   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 1/6] drm/i915: store all subslice masks   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915/perf: fix b counter register whitelist on haswell   Lionel Landwerlin
• [Intel-gfx] [PATCH v15 0/6] drm/i915: expose RCS topology to userspace   Lionel Landwerlin
• [Intel-gfx] [PATCH v15 1/6] drm/i915: store all subslice masks   Lionel Landwerlin
• [Intel-gfx] [PATCH v15 2/6] drm/i915/debugfs: reuse max slice/subslices already stored in sseu   Lionel Landwerlin
• [Intel-gfx] [PATCH v15 3/6] drm/i915/debugfs: add rcs topology entry   Lionel Landwerlin
• [Intel-gfx] [PATCH v15 4/6] drm/i915: add rcs topology to error state   Lionel Landwerlin
• [Intel-gfx] [PATCH v15 5/6] drm/i915: add query uAPI   Lionel Landwerlin
• [Intel-gfx] [PATCH v15 6/6] drm/i915: expose rcs topology through query uAPI   Lionel Landwerlin
• [Intel-gfx] [PATCH v16 1/6] drm/i915: store all subslice masks   Lionel Landwerlin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/2] tests/perf: Fix build warning   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915/perf: fix perf stream opening lock   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/atomic: Call ww_acquire_done after drm_modeset_lock_all   Maarten Lankhorst
• [Intel-gfx] [PATCH 00/16] Adding NV12 support   Maarten Lankhorst
• [Intel-gfx] [igt-dev] [PATCH igt] igt/kms_force_connector_basic: Clear any previous connector override   Maarten Lankhorst
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Handle CPU hotplug failures better   Petri Latvala
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Handle CPU hotplug failures better   Petri Latvala
• [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] tests/testdisplay: Explicitly use GLIB_CFLAGS   Petri Latvala
• [Intel-gfx] [PATCH v2] drm/i915: add schedule out notification of preempted but completed request   Weinan Li
• [Intel-gfx] [igt-dev] [PATCH igt 1/2] igt/kms_frontbuffer_tracking: Disable FBC testing for -ENODEV   Lofstedt, Marta
• [Intel-gfx] [PATCH igt] igt/kms_force_connector_basic: Clear any previous connector override   Lofstedt, Marta
• [Intel-gfx] [RFC] kernel/panic: Repeat the line and caller information at the end of the OOPS   Lofstedt, Marta
• [Intel-gfx] [RFC] kernel/panic: Repeat the line and caller information at the end of the OOPS   Lofstedt, Marta
• [Intel-gfx] [PATCH 1/5] drm/i915: Improve PSR activation timing   Andy Lutomirski
• [Intel-gfx] [PATCH 1/3] drm/i915: Improve PSR activation timing   Andy Lutomirski
• [Intel-gfx] [PATCH 1/5] drm/i915: Improve PSR activation timing   Andy Lutomirski
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Oscar Mateo
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Oscar Mateo
• [Intel-gfx] [PATCH v5 1/2] drm/i915: Move a bunch of workaround-related code to its own file   Oscar Mateo
• [Intel-gfx] [PATCH v5 2/2] drm/i915: Split out functions for different kinds of workarounds   Oscar Mateo
• [Intel-gfx] [PATCH v6 1/2] drm/i915: Move a bunch of workaround-related code to its own file   Oscar Mateo
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Oscar Mateo
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Oscar Mateo
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Mullah, Abid A
• [Intel-gfx] [V4] drm/i915: Enable VBT based BL control for DP   Mustaffa, Mustamin B
• [Intel-gfx] [PATCH] [V3] drm/i915: Enable VBT based BL control for DP   Mustamin B Mustaffa
• [Intel-gfx] [PATCH] [V3] drm/i915: Enable VBT based BL control for DP   Mustamin B Mustaffa
• [Intel-gfx] [PATCH] [V3] drm/i915: Enable VBT based BL control for DP   Mustaffa, Mustamin B
• [Intel-gfx] [PATCH 00/10] Enabling VDSC in i915 driver for GLK   Manasi Navare
• [Intel-gfx] [PATCH 01/10] drm: i915: Defining Compression Capabilities   Manasi Navare
• [Intel-gfx] [PATCH 02/10] drm: i915: Get DSC capability from DP sink   Manasi Navare
• [Intel-gfx] [PATCH] drm/i915/dp: Fix the order of platforms for setting DP source rates   Manasi Navare
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Manasi Navare
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Manasi Navare
• [Intel-gfx] [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array   Manasi Navare
• [Intel-gfx] [PATCH v2 3/5] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook   Manasi Navare
• [Intel-gfx] [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array   Manasi Navare
• [Intel-gfx] [PATCH v2 3/5] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook   Manasi Navare
• [Intel-gfx] [PATCH v2 3/5] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook   Manasi Navare
• [Intel-gfx] [PATCH 5/5] drm/i915: Track whether the DP link is trained or not   Manasi Navare
• [Intel-gfx] [PATCH 4/5] drm/i915: Nuke intel_dp->channel_eq_status   Manasi Navare
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Manasi Navare
• [Intel-gfx] [PATCH v2] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates array   Manasi Navare
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Jani Nikula
• [Intel-gfx] [PATCH v5 1/2] drm/i915: Move a bunch of workaround-related code to its own file   Jani Nikula
• [Intel-gfx] [igt-dev] [PATCH] [CI] kernel: Downgrade warning for unsafe parameters   Jani Nikula
• [Intel-gfx] [igt-dev] [PATCH] [CI] kernel: Downgrade warning for unsafe parameters   Jani Nikula
• [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle   Jani Nikula
• [Intel-gfx] [PATCH] kernel: Downgrade warning for unsafe parameters   Jani Nikula
• [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle   Jani Nikula
• [Intel-gfx] [PATCH v6 1/2] drm/i915: Move a bunch of workaround-related code to its own file   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/dp: Fix the order of platforms for setting DP source rates   Jani Nikula
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Add a parameter to disable SAGV   Jani Nikula
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Jani Nikula
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array   Jani Nikula
• [Intel-gfx] [PATCH] [V3] drm/i915: Enable VBT based BL control for DP   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array   Jani Nikula
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Jani Nikula
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Jani Nikula
• [Intel-gfx] [PULL] drm-misc-fixes   Gustavo Padovan
• [Intel-gfx] [PULL] drm-misc-fixes   Gustavo Padovan
• [Intel-gfx] [PATCH 1/3] drm/i915: Add enum aux_ch and clean up the aux init to use it   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 2/3] drm/i915: Nuke aux regs from intel_dp   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/3] drm/i915: Add enum aux_ch and clean up the aux init to use it   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 2/2] drm/i915/cnl: New power domain for AUX IO.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 2/3] drm/i915: Nuke aux regs from intel_dp   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v4] drm/i915/psr: New power domain for AUX IO.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 1/2] drm/i915/psr2: Fix max resolution supported.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Don't avoid PSR when PSR2   Pandiyan, Dhinakaran
• [Intel-gfx] [CI 1/6] drm/i915/psr: New power domain for AUX IO.   Dhinakaran Pandiyan
• [Intel-gfx] [CI 2/6] drm/i915/frontbuffer: Mark frontbuffer flush and invalidate with might_sleep()   Dhinakaran Pandiyan
• [Intel-gfx] [CI 3/6] drm/i915/psr: Extract PSR DPCD initialization and move it to intel_psr.c   Dhinakaran Pandiyan
• [Intel-gfx] [CI 4/6] drm/i915/psr: Check for the specific AUX_FRAME_SYNC cap bit.   Dhinakaran Pandiyan
• [Intel-gfx] [CI 5/6] drm/i915/dp: Remove redundant sleep after AUX transaction length check.   Dhinakaran Pandiyan
• [Intel-gfx] [CI 6/6] drm/i915/dp: Move comment about hw timeout to the right place.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 2/5] drm/i915/psr: Kill scheduled work for Core platforms.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 3/5] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 4/5] drm/i915/psr: Display WA #1110   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Display WA #1130: bxt, glk   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 4/5] drm/i915/psr: Display WA #1110   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 3/3] drm/i915: Remove unused variable in hsw_write_infoframe()   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/3] drm/i915: Share PSR and PSR2 VSC setup   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 2/3] drm/i915: Replace magic number with macro defined by drm   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 3/5] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 2/5] drm/i915/psr: Kill scheduled work for Core platforms.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Check for power state control capability.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v4 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   Pandiyan, Dhinakaran
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 3/6] drm/i915: Exit PSR before do a aux transaction in gen < 9   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 2/2] drm/i915/psr: Don't avoid PSR when PSR2 conditions are not met.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Pandiyan, Dhinakaran
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rename drm_i915_gem_request to i915_request (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/doc: Fix documentation for _vblank_restore().   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev11)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Rename drm_i915_gem_request to i915_request (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding NV12 support (rev12)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Adding NV12 support (rev12)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: GuC test run (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding NV12 support (rev12)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Adding NV12 support (rev12)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hsw: add missing disabled EUs registers reads (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Remove the ring advancement under preemption   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Add a GEM_TRACE to show when the context is completed   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/atomic: Call ww_acquire_done after drm_modeset_lock_all   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Scanout fence fixes/cleanups   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: GuC test run (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Scanout fence fixes/cleanups   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for Adding NV12 support (rev12)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hsw: add missing disabled EUs registers reads (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Support engine busy stats   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/guc: Support engine busy stats   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Scanout fence fixes/cleanups (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Remove the ring advancement under preemption   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Scanout fence fixes/cleanups (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for lib: Skip aliased bsd ABI ring if bsd2 is available (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Support engine busy stats   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/guc: Support engine busy stats   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Scanout fence fixes/cleanups (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Add a GEM_TRACE to show when the context is completed   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Scanout fence fixes/cleanups (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/atomic: Call ww_acquire_done after drm_modeset_lock_all   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hsw: add missing disabled EUs registers reads (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for ICL GEM enabling (v2) (rev6)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Scanout fence fixes/cleanups (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hsw: add missing disabled EUs registers reads (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ICL PLLs, DP/HDMI and misc display   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for ICL PLLs, DP/HDMI and misc display   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: GuC test run (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Support engine busy stats (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Support engine busy stats (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: GuC test run (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Eliminate devid sprinkle   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Iterate over physical engines   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/guc: Support engine busy stats (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Prepare for more rings (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Iterate over physical engines   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Move page sizes out of the 8-bit sandwich   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for lib/dummyload: Avoid assertions in lowlevel spin constructor   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Move page sizes out of the 8-bit sandwich   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/icl: Prepare for more rings (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/preemption: Allow preemption between submission ports (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for lib/dummyload: Avoid assertions in lowlevel spin constructor   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Move page sizes out of the 8-bit sandwich   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Update missing parts after the rename to i915_request   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: expose RCS topology to userspace   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose RCS topology to userspace   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915: Use the correct power domain for aux ch   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/preemption: Allow preemption between submission ports (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable SAGV on pre plane update.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/cnl: Add WaRsDisableCoarsePowerGating   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for extend PWM framework to support PWM modes   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm: Add generic fbdev emulation (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Update missing parts after the rename to i915_request   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: expose RCS topology to userspace   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Disable SAGV on pre plane update.   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/preemption: Allow preemption between submission ports   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/preemption: Allow preemption between submission ports   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Start preparing GuC/HuC for reset (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/uc: Start preparing GuC/HuC for reset (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Enabling VDSC in i915 driver for GLK   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: fix b counter register whitelist on haswell   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/perf: fix b counter register whitelist on haswell   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] Revert "drm: Use a flexible array member for blob property data"   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] Revert "drm: Use a flexible array member for blob property data"   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v5,1/2] drm/i915: Move a bunch of workaround-related code to its own file   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [v5,1/2] drm/i915: Move a bunch of workaround-related code to its own file   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/6] drm/i915/psr: New power domain for AUX IO.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Disable SAGV on pre plane update. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add and enable DP AUX CH mutex (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/skl+: Add and enable DP AUX CH mutex   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add and enable DP AUX CH mutex (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add schedule out notification of preempted but completed request   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add schedule out notification of preempted but completed request   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_exec_schedule: Exercise "deep" preemption   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_busy: Fix extended-bsd aliasing checks   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for igt/gem_exec_schedule: Exercise "deep" preemption   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for igt/gem_busy: Fix extended-bsd aliasing checks   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for kernel/panic: Repeat the line and caller information at the end of the OOPS   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Fill preempt context once at init time   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for kernel/panic: Repeat the line and caller information at the end of the OOPS (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for kernel: Downgrade warning for unsafe parameters (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/guc: Fill preempt context once at init time   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for HDCP1.4 fixes   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: expose RCS topology to userspace   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/guc: Fill preempt context once at init time   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for kernel/panic: Repeat the line and caller information at the end of the OOPS (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: expose RCS topology to userspace (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose RCS topology to userspace (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with drm/i915/guc: Fill preempt context once at init time (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for kernel: Downgrade warning for unsafe parameters (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Don't propagate SAGV errnos in vain.   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/guc: Fill preempt context once at init time   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for HDCP1.4 fixes   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add and enable DP AUX CH mutex (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: expose RCS topology to userspace (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with drm/i915/guc: Fill preempt context once at init time (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v6,1/2] drm/i915: Move a bunch of workaround-related code to its own file (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v6,1/2] drm/i915: Move a bunch of workaround-related code to its own file (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add a parameter to disable SAGV   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add and enable DP AUX CH mutex (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v6,1/2] drm/i915: Move a bunch of workaround-related code to its own file (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Enable VBT based BL control for DP (v3) (rev7)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add a parameter to disable SAGV   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable VBT based BL control for DP (v3) (rev8)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Fix the order of platforms for setting DP source rates   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Check for power state control capability.   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enable VBT based BL control for DP (v3) (rev8)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Fix the order of platforms for setting DP source rates   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Check for power state control capability.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: move link rate arrays where they're used   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for HDCP1.4 fixes (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/15] drm/i915/guc: Tidy guc_log_control   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/15] drm/i915/guc: Tidy guc_log_control   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Try to make display info less nuts   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] igt/gem_fd_exhaustion: Actually test error handling on fd exhaustion   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/6] drm/i915/psr: New power domain for AUX IO.   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: move link rate arrays where they're used   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/15] drm/i915/guc: Tidy guc_log_control   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Try to make display info less nuts   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] igt/gem_fd_exhaustion: Actually test error handling on fd exhaustion   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/cnl: Add WaRsDisableCoarsePowerGating   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/6] drm/i915/psr: New power domain for AUX IO.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Repeat the GEM_BUG_ON message in the ftrace log   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/skl+: Add and enable DP AUX CH mutex   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/psr2: Fix max resolution supported.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Add WaRsDisableCoarsePowerGating   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915/psr2: Fix max resolution supported.   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/cnl: Add WaRsDisableCoarsePowerGating   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Add HBR3 rate (8.1 Gbps) to default rates array   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915: Improve PSR activation timing   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: move link rate arrays where they're used   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/dp: move link rate arrays where they're used   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't deref request->ctx inside unlocked print_request()   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/2] drm/i915/icl: Prepare for more rings   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: fix perf stream opening lock   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Don't deref request->ctx inside unlocked print_request()   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: fix perf stream opening lock   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Wedged engine mask makes more sense in hex   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Removed unused GuC parameters.   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add an option to disable SAGV   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Wedged engine mask makes more sense in hex   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates array   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Removed unused GuC parameters.   Patchwork
• [Intel-gfx] [PATCH] drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset   Lyude Paul
• [Intel-gfx] [PATCH v2 3/5] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook   Lyude Paul
• [Intel-gfx] [PATCH v2 3/5] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook   Lyude Paul
• [Intel-gfx] [PATCH v2 3/5] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook   Lyude Paul
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] [PATCH 22/43] drm/i915: Async execution of hdcp authentication   Sean Paul
• [Intel-gfx] [PATCH 23/43] drm/i915: wrapping all hdcp var into intel_hdcp   Sean Paul
• [Intel-gfx] [PATCH 25/43] drm/i915: Define HDCP2.2 related variables   Sean Paul
• [Intel-gfx] [PATCH 26/43] drm/i915: Define Intel HDCP2.2 registers   Sean Paul
• [Intel-gfx] [PATCH 24/43] drm/i915: wait for cp_irq   Sean Paul
• [Intel-gfx] [PATCH 1/5] drm/i915: Read HDCP R0 thrice in case of mismatch   Sean Paul
• [Intel-gfx] [PATCH 2/5] drm/i915: read Vprime thrice incase of mismatch   Sean Paul
• [Intel-gfx] [PATCH 3/5] drm/i915: Check hdcp key loadability   Sean Paul
• [Intel-gfx] [PATCH 4/5] drm/i915: Poll hdcp register on sudden NACK   Sean Paul
• [Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim   Sean Paul
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] Google Summer of Code 2018   Martin Peres
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   Piotr Piórkowski
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Thierry Reding
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Maxime Ripard
• [Intel-gfx] [PATCH 1/1 RFC] drivers/gpu/drm/i915:Documentation for batchbuffer submission   Rogovin, Kevin
• [Intel-gfx] Thinkpad X1 Carbon 3rd - Reducing the compressed framebuffer size   Pali Rohár
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Runyan, Arthur J
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Runyan, Arthur J
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Handle CPU hotplug failures better   Tomi Sarvela
• [Intel-gfx] [PATCH] drm/i915: Add a parameter to disable SAGV   Azhar Shaikh
• [Intel-gfx] [PATCH v2] drm/i915: Add an option to disable SAGV   Azhar Shaikh
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Shankar, Uma
• [Intel-gfx] [PATCH 2/4] drm/i915: Remove the pointless 1:1 matrix copy   Shankar, Uma
• [Intel-gfx] [PATCH 3/4] drm/i915: Rename pipe CSC to use ilk_ prefix   Shankar, Uma
• [Intel-gfx] [PATCH 4/4] drm/i915: Don't mangle the CTM on pre-HSW   Shankar, Uma
• [Intel-gfx] [PATCH 4/4] drm/i915: Don't mangle the CTM on pre-HSW   Shankar, Uma
• [Intel-gfx] [PATCH 14/16] drm/i915: Add NV12 as supported format for sprite plane   Sharma, Shashank
• [Intel-gfx] [PATCH 10/16] drm/i915: Set scaler mode for NV12   Sharma, Shashank
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Sharma, Shashank
• [Intel-gfx] [RFC][PATCH 05/11] drm/edid: Clear display info fully   Sharma, Shashank
• [Intel-gfx] [PATCH v3 06/10] pwm: add PWM modes   Andy Shevchenko
• [Intel-gfx] [PATCH 00/10] Enabling VDSC in i915 driver for GLK   Gaurav K Singh
• [Intel-gfx] [PATCH 01/10] drm: i915: Defining Compression Capabilities   Gaurav K Singh
• [Intel-gfx] [PATCH 02/10] drm: i915: Get DSC capability from DP sink   Gaurav K Singh
• [Intel-gfx] [PATCH 03/10] drm: i915: Enable/Disable DSC in DP sink   Gaurav K Singh
• [Intel-gfx] [PATCH 04/10] drm: i915: Compute RC & DSC parameters   Gaurav K Singh
• [Intel-gfx] [PATCH 05/10] drm: i915: Define Picture Parameter Set   Gaurav K Singh
• [Intel-gfx] [PATCH 06/10] drm/i915: Populate PPS Secondary Data Pkt for Sink   Gaurav K Singh
• [Intel-gfx] [PATCH 07/10] drm: i915: Define VDSC regs and DSC params   Gaurav K Singh
• [Intel-gfx] [PATCH 08/10] drm: i915: Enable VDSC in Source   Gaurav K Singh
• [Intel-gfx] [PATCH 09/10] drm: i915: Disable VDSC from Source   Gaurav K Singh
• [Intel-gfx] [PATCH 10/10] drm/i915: Encoder enable/disable seq wrt DSC   Gaurav K Singh
• [Intel-gfx] [PATCH 00/10] Enabling VDSC in i915 driver for GLK   Singh, Gaurav K
• [Intel-gfx] [PATCH 01/10] drm: i915: Defining Compression Capabilities   Singh, Gaurav K
• [Intel-gfx] [PATCH v3 0/1] drm/i915: Add and enable DP AUX CH mutex   José Roberto de Souza
• [Intel-gfx] [PATCH 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   José Roberto de Souza
• [Intel-gfx] [PATCH 1/6] drm/i915/skl+: Add and enable DP AUX CH mutex   José Roberto de Souza
• [Intel-gfx] [PATCH 2/6] drm/i915/psr: Share the common code between PSR exit and disable   José Roberto de Souza
• [Intel-gfx] [PATCH 3/6] drm/i915: Exit PSR before do a aux transaction in gen < 9   José Roberto de Souza
• [Intel-gfx] [PATCH 4/6] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink   José Roberto de Souza
• [Intel-gfx] [PATCH 5/6] drm/i915/psr: Handle PSR RFB storage error   José Roberto de Souza
• [Intel-gfx] [PATCH 6/6] drm/i915/psr/hsw+: Enable CRC check in the static frame on the sink side   José Roberto de Souza
• [Intel-gfx] [PATCH v4 0/1] drm/i915: Add and enable DP AUX CH mutex   José Roberto de Souza
• [Intel-gfx] [PATCH v4 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   José Roberto de Souza
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   José Roberto de Souza
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Souza, Jose
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Souza, Jose
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Souza, Jose
• [Intel-gfx] [PATCH 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   Souza, Jose
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Souza, Jose
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Souza, Jose
• [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 2/4] drm/i915/icl: Show interrupt registers in debugfs   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 4/4] drm/i915/icl: Interrupt handling   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 05/16] drm/i915/skl+: NV12 related changes for WM   Vidya Srinivas
• [Intel-gfx] [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func   Vidya Srinivas
• [Intel-gfx] [PATCH 07/16] drm/i915/skl+: make sure higher latency level has higher wm value   Vidya Srinivas
• [Intel-gfx] [PATCH 08/16] drm/i915/skl+: nv12 workaround disable WM level 1-7   Vidya Srinivas
• [Intel-gfx] [PATCH 09/16] drm/i915/skl: split skl_compute_ddb function   Vidya Srinivas
• [Intel-gfx] [PATCH 10/16] drm/i915: Set scaler mode for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH 11/16] drm/i915: Update format_is_yuv() to include NV12   Vidya Srinivas
• [Intel-gfx] [PATCH 12/16] drm/i915: Upscale scaler max scale for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH 14/16] drm/i915: Add NV12 as supported format for sprite plane   Vidya Srinivas
• [Intel-gfx] [PATCH 15/16] drm/i915: Add NV12 support to intel_framebuffer_init   Vidya Srinivas
• [Intel-gfx] [PATCH 16/16] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg   Vidya Srinivas
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Srinivas, Vidya
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Srinivas, Vidya
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Srinivas, Vidya
• [Intel-gfx] [PATCH] drm/i915/cnl: Add WaRsDisableCoarsePowerGating   Radhakrishna Sripada
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Brian Starkey
• [Intel-gfx] [PATCH 0/6] drm/i915: Scanout fence fixes/cleanups   Ville Syrjala
• [Intel-gfx] [PATCH 1/6] drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout   Ville Syrjala
• [Intel-gfx] [PATCH 2/6] drm/i915: Only pin the fence for primary planes (and gen2/3)   Ville Syrjala
• [Intel-gfx] [PATCH 3/6] drm/i915: Clean up fbc vs. plane checks   Ville Syrjala
• [Intel-gfx] [PATCH 4/6] drm/i915: Require fence only for FBC capable planes   Ville Syrjala
• [Intel-gfx] [PATCH 5/6] drm/i915: Extract intel_plane_{pin, unpin}_fb()   Ville Syrjala
• [Intel-gfx] [PATCH 6/6] drm/i915: Add a FIXME about FBC vs. fence. 90/270 degree rotation   Ville Syrjala
• [Intel-gfx] [PATCH v3 3/6] drm/i915: Clean up fbc vs. plane checks   Ville Syrjala
• [Intel-gfx] [PATCH v2 2/6] drm/i915: Only pin the fence for primary planes (and gen2/3)   Ville Syrjala
• [Intel-gfx] [PATCH 1/8] drm/i915: Use the correct power domain for aux ch   Ville Syrjala
• [Intel-gfx] [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it   Ville Syrjala
• [Intel-gfx] [PATCH 3/8] drm/i915: Nuke aux regs from intel_dp   Ville Syrjala
• [Intel-gfx] [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()   Ville Syrjala
• [Intel-gfx] [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()   Ville Syrjala
• [Intel-gfx] [PATCH 6/8] drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/   Ville Syrjala
• [Intel-gfx] [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()   Ville Syrjala
• [Intel-gfx] [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header   Ville Syrjala
• [Intel-gfx] [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()   Ville Syrjala
• [Intel-gfx] [PATCH v2 8/8] drm/i915: Deduplicate the code to fill the aux message header   Ville Syrjala
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Ville Syrjala
• [Intel-gfx] [PATCH 2/4] drm/i915: Remove the pointless 1:1 matrix copy   Ville Syrjala
• [Intel-gfx] [PATCH 3/4] drm/i915: Rename pipe CSC to use ilk_ prefix   Ville Syrjala
• [Intel-gfx] [PATCH 4/4] drm/i915: Don't mangle the CTM on pre-HSW   Ville Syrjala
• [Intel-gfx] [PATCH 1/6] Revert "drm: Use a flexible array member for blob property data"   Ville Syrjala
• [Intel-gfx] [PATCH 2/6] drm: Remove now pointelss blob->data casts   Ville Syrjala
• [Intel-gfx] [PATCH 3/6] drm: Verify gamma/degamma LUT size   Ville Syrjala
• [Intel-gfx] [PATCH 4/6] drm: Introduce drm_color_lut_size()   Ville Syrjala
• [Intel-gfx] [PATCH 5/6] drm/i915: Remove the blob->data casts   Ville Syrjala
• [Intel-gfx] [PATCH 6/6] drm/i915: Use drm_color_lut_size()   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 00/11] drm: Try to make display info less nuts   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 01/11] drm/gma500: Fill display_info.{width, height}_mm from .get_modes()   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 02/11] drm/i915: Fill display_info.{width, height}_mm from .get_modes()   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 03/11] drm/shmobile: Don't fill display_info.{width, height}_mm at init time   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 05/11] drm/edid: Clear display info fully   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 06/11] drm/edid: Don't call drm_add_display_info() with an invalid EDID   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 07/11] drm/probe-helper: Avoid iterating the list twice on ww backoff   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 08/11] drm: Add drm_connector_fill_modes()   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 09/11] drm: Fix getconnector locking   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 10/11] drm: Fix debugfs edid_override locking   Ville Syrjala
• [Intel-gfx] [RFC][PATCH 11/11] drm: Sprinkle lockdep asserts for edid/display_info   Ville Syrjala
• [Intel-gfx] [PATCH] drm/i915: Explicit Raw and Adjusted WM latencies.   Ville Syrjälä
• [Intel-gfx] [V4] drm/i915: Enable VBT based BL control for DP   Ville Syrjälä
• [Intel-gfx] Thinkpad X1 Carbon 3rd - Reducing the compressed framebuffer size   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Explicit Raw and Adjusted WM latencies.   Ville Syrjälä
• [Intel-gfx] [PATCH v2 2/3] drm/i915: Nuke aux regs from intel_dp   Ville Syrjälä
• [Intel-gfx] [PATCH 1/3] drm/i915: Add enum aux_ch and clean up the aux init to use it   Ville Syrjälä
• [Intel-gfx] [PATCH v3 3/6] drm/i915: Clean up fbc vs. plane checks   Ville Syrjälä
• [Intel-gfx] [PATCH 1/6] drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout   Ville Syrjälä
• [Intel-gfx] [v4] drm/i915: Fix Limited Range Color Handling   Ville Syrjälä
• [Intel-gfx] [PATCH v3 3/6] drm/i915: Clean up fbc vs. plane checks   Ville Syrjälä
• [Intel-gfx] [PATCH 1/3] drm/i915: Add enum aux_ch and clean up the aux init to use it   Ville Syrjälä
• [Intel-gfx] [PATCH 2/2] drm/i915/cnl: New power domain for AUX IO.   Ville Syrjälä
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Disable SAGV on pre plane update.   Ville Syrjälä
• [Intel-gfx] [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()   Ville Syrjälä
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Ville Syrjälä
• [Intel-gfx] [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/4] drm/i915: Don't mangle the CTM on pre-HSW   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)   Ville Syrjälä
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Ville Syrjälä
• [Intel-gfx] [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()   Ville Syrjälä
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Ville Syrjälä
• [Intel-gfx] [PATCH 7/8] drm: Check that the plane supports the request format+modifier combo   Ville Syrjälä
• [Intel-gfx] [PATCH 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   Ville Syrjälä
• [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_softpin: Only expect EINVAL for color-overlaps for user objects   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.BAT: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev3)   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Ville Syrjälä
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Ville Syrjälä
• [Intel-gfx] [PATCH 3/4] drm/i915: Rename pipe CSC to use ilk_ prefix   Ville Syrjälä
• [Intel-gfx] [PATCH 4/4] drm/i915: Don't mangle the CTM on pre-HSW   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset   Ville Syrjälä
• [Intel-gfx] [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Ville Syrjälä
• [Intel-gfx] [RFC] drm/i915/dp: move link rate arrays where they're used   Ville Syrjälä
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Archit Taneja
• [Intel-gfx] [PATCH] drm/i915/execlists: Remove the ring advancement under preemption   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915: Update missing parts after the rename to i915_request   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915: Wedged engine mask makes more sense in hex   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   Michel Thierry
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Daniel Thompson
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Daniel Thompson
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Daniel Thompson
• [Intel-gfx] [RFC v3 00/12] drm: Add generic fbdev emulation   Noralf Trønnes
• [Intel-gfx] [RFC v3 01/12] drm: provide management functions for drm_file   Noralf Trønnes
• [Intel-gfx] [RFC v3 02/12] drm/file: Don't set master on in-kernel clients   Noralf Trønnes
• [Intel-gfx] [RFC v3 03/12] drm: Make ioctls available for in-kernel clients part 1   Noralf Trønnes
• [Intel-gfx] [RFC v3 04/12] drm: Make ioctls available for in-kernel clients part 2   Noralf Trønnes
• [Intel-gfx] [RFC v3 05/12] drm: Add _ioctl suffix to some functions   Noralf Trønnes
• [Intel-gfx] [RFC v3 06/12] drm: Add DRM device iterator   Noralf Trønnes
• [Intel-gfx] [RFC v3 07/12] drm/modes: Add drm_umode_equal()   Noralf Trønnes
• [Intel-gfx] [RFC v3 08/12] drm/framebuffer: Add drm_mode_can_dirtyfb()   Noralf Trønnes
• [Intel-gfx] [RFC v3 09/12] drm: Add API for in-kernel clients   Noralf Trønnes
• [Intel-gfx] [RFC v3 10/12] drm/client: Add fbdev emulation client   Noralf Trønnes
• [Intel-gfx] [RFC v3 11/12] drm/client: Add bootsplash client   Noralf Trønnes
• [Intel-gfx] [RFC v3 12/12] drm/client: Add VT console client   Noralf Trønnes
• [Intel-gfx] [PATCH i-g-t] lib/igt_perf: Find active perf CPU   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH igt v2] igt/perf_pmu: Use a self-correcting busy pwm   Tvrtko Ursulin
• [Intel-gfx] [CI v3] drm/i915: GuC test run   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t] lib/igt_perf: Find active perf CPU   Tvrtko Ursulin
• [Intel-gfx] [CI v4] drm/i915: GuC test run   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Skip hotplug test on Broxton   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Skip hotplug test on Broxton   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Skip hotplug test on Broxton   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt] lib: Skip aliased bsd ABI ring if bsd2 is available   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH igt v3] igt/perf_pmu: Use a self-correcting busy pwm   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Tvrtko Ursulin
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make global seqno known in i915_gem_request_execute tracepoint   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt 1/2] Iterate over physical engines   Tvrtko Ursulin
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Support engine busy stats   Tvrtko Ursulin
• [Intel-gfx] [PATCH 2/2] drm/i915: GuC test run   Tvrtko Ursulin
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Support engine busy stats   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: Eliminate devid sprinkle   Tvrtko Ursulin
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Support engine busy stats   Tvrtko Ursulin
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle   Tvrtko Ursulin
• [Intel-gfx] [RFC v2] drm/i915: Eliminate devid sprinkle   Tvrtko Ursulin
• [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: Eliminate devid sprinkle   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt v3] Iterate over physical engines   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt] igt/perf_pmu: Fix 64b printf-isms   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915: Move page sizes out of the 8-bit sandwich   Tvrtko Ursulin
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Move page sizes out of the 8-bit sandwich   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Handle CPU hotplug failures better   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Handle CPU hotplug failures better   Tvrtko Ursulin
• [Intel-gfx] [RFC] perf: Allow fine-grained PMU access control   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt] igt/gem_busy: Fix extended-bsd aliasing checks   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Handle CPU hotplug failures better   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 1/2] tests/kms_frontbuffer_tracking: Fix build warning   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 2/2] tests/perf: Fix build warning   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] lib/igt_pm: Restore runtime pm state on test exit   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] lib/igt_pm: Restore runtime pm state on test exit   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] lib/igt_pm: Restore runtime pm state on test exit   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] lib/igt_pm: Restore runtime pm state on test exit   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Test busyness reporting in face of GPU hangs   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915: Wedged engine mask makes more sense in hex   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/doc: Fix documentation for _vblank_restore().   Daniel Vetter
• [Intel-gfx] [PATCH] drm/atomic: Call ww_acquire_done after drm_modeset_lock_all   Daniel Vetter
• [Intel-gfx] [PATCH] drm/i915: Explicit Raw and Adjusted WM latencies.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] drm-intel-fixes issues on CI   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Disable SAGV on pre plane update.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnl: Add WaRsDisableCoarsePowerGating   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Disable SAGV on pre plane update.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH 12/17] drm/i915/icl: HPD pin for port F   Rodrigo Vivi
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/1] drm/i915: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2] drm/i915: Disable SAGV on pre plane update.   Rodrigo Vivi
• [Intel-gfx] [PATCH 1/5] drm/i915: Improve PSR activation timing   Rodrigo Vivi
• [Intel-gfx] [PATCH v3] drm/i915: Disable SAGV on pre plane update.   Rodrigo Vivi
• [Intel-gfx] [PATCH 1/4] drm/i915: Don't propagate SAGV errnos in vain.   Rodrigo Vivi
• [Intel-gfx] [PATCH 2/4] drm/i915: Introduce SAGV mutex.   Rodrigo Vivi
• [Intel-gfx] [PATCH 3/4] drm/i915: Move underrun work from fbc to fifo_underrun.   Rodrigo Vivi
• [Intel-gfx] [PATCH 4/4] drm/i915: Also disable SAGV on fifo underrun.   Rodrigo Vivi
• [Intel-gfx] [PATCH 2/4] drm/i915: Introduce SAGV mutex.   Rodrigo Vivi
• [Intel-gfx] [PATCH 3/4] drm/i915: Move underrun work from fbc to fifo_underrun.   Rodrigo Vivi
• [Intel-gfx] [PATCH v4 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Display WA #1130: bxt, glk   Rodrigo Vivi
• [Intel-gfx] [PATCH 3/5] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Rodrigo Vivi
• [Intel-gfx] [PATCH 2/5] drm/i915/psr: Kill scheduled work for Core platforms.   Rodrigo Vivi
• [Intel-gfx] [PATCH 0/5] HDCP1.4 fixes   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Add a parameter to disable SAGV   Rodrigo Vivi
• [Intel-gfx] [CI 1/6] drm/i915/psr: New power domain for AUX IO.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Check for power state control capability.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/2] drm/i915/psr2: Fix max resolution supported.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 2/2] drm/i915/psr: Don't avoid PSR when PSR2 conditions are not met.   Rodrigo Vivi
• [Intel-gfx] [PATCH 3/5] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 2/2] drm/i915/psr: Don't avoid PSR when PSR2 conditions are not met.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnl: Add WaRsDisableCoarsePowerGating   Rodrigo Vivi
• [Intel-gfx] [PATCH 1/3] drm/i915: Improve PSR activation timing   Rodrigo Vivi
• [Intel-gfx] [PATCH 2/3] drm/i915/psr: Kill scheduled work for Core platforms.   Rodrigo Vivi
• [Intel-gfx] [PATCH 3/3] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Michal Wajdeczko
• [Intel-gfx] [PATCH 2/2] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Michal Wajdeczko
• [Intel-gfx] [PATCH 01/15] drm/i915/guc: Tidy guc_log_control   Michal Wajdeczko
• [Intel-gfx] [PATCH 02/15] drm/i915/guc: Create common entry points for log register/unregister   Michal Wajdeczko
• [Intel-gfx] [PATCH 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Michal Wajdeczko
• [Intel-gfx] [PATCH 09/15] drm/i915/guc: Move check for fast memcpy_wc to relay creation   Michal Wajdeczko
• [Intel-gfx] [PULL] git-fixes for 4.16-rc2   Zhenyu Wang
• [Intel-gfx] [PATCH] drm/atomic: Call ww_acquire_done after drm_modeset_lock_all   Harry Wentland
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Harry Wentland
• [Intel-gfx] [PATCH i-g-t] lib/igt_perf: Find active perf CPU   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH igt v2] igt/perf_pmu: Use a self-correcting busy pwm   Chris Wilson
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Skip hotplug test on Broxton   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t v2] tests/perf_pmu: Skip hotplug test on Broxton   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Skip hotplug test on Broxton   Chris Wilson
• [Intel-gfx] [PATCH igt] lib: Skip aliased bsd ABI ring if bsd2 is available   Chris Wilson
• [Intel-gfx] [PATCH igt 1/2] lib: Export kmsg()   Chris Wilson
• [Intel-gfx] [PATCH igt 2/2] igt/debugfs_tests: Record which file is being opened in kmsg   Chris Wilson
• [Intel-gfx] [PATCH v13 0/6] drm/i915: expose RCS topology to userspace   Chris Wilson
• [Intel-gfx] [PATCH igt v3] igt/perf_pmu: Use a self-correcting busy pwm   Chris Wilson
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Chris Wilson
• [Intel-gfx] [PATCH igt] lib: Skip aliased bsd ABI ring if bsd2 is available   Chris Wilson
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Remove the ring advancement under preemption   Chris Wilson
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Chris Wilson
• [Intel-gfx] [PATCH igt v2] lib: Skip aliased bsd ABI ring if bsd2 is available   Chris Wilson
• [Intel-gfx] [PATCH igt 1/2] Iterate over physical engines   Chris Wilson
• [Intel-gfx] [PATCH igt 2/2] igt/gem_spin_batch: Avoid waiting when running concurrently   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/kms_fbcon_fbt: Handle ENODEV when checking i915_fbc_info for chipset support   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Add a GEM_TRACE to show when the context is completed   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Add a GEM_TRACE to show when the context is completed   Chris Wilson
• [Intel-gfx] [PATCH igt 1/2] Iterate over physical engines   Chris Wilson
• [Intel-gfx] [PATCH igt 1/2] Iterate over physical engines   Chris Wilson
• [Intel-gfx] [PATCH igt v2] Iterate over physical engines   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Rename drm_i915_gem_request to i915_request   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Remove the ring advancement under preemption   Chris Wilson
• [Intel-gfx] [PATCH libdrm 1/2] intel: align reuse buffer's size on page size instead   Chris Wilson
• [Intel-gfx] [PATCH 1/6] drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout   Chris Wilson
• [Intel-gfx] [PATCH v2 2/6] drm/i915: Only pin the fence for primary planes (and gen2/3)   Chris Wilson
• [Intel-gfx] [PATCH v3 3/6] drm/i915: Clean up fbc vs. plane checks   Chris Wilson
• [Intel-gfx] [PATCH 4/6] drm/i915: Require fence only for FBC capable planes   Chris Wilson
• [Intel-gfx] [PATCH 5/6] drm/i915: Extract intel_plane_{pin, unpin}_fb()   Chris Wilson
• [Intel-gfx] [PATCH 6/6] drm/i915: Add a FIXME about FBC vs. fence. 90/270 degree rotation   Chris Wilson
• [Intel-gfx] drm-intel-fixes issues on CI   Chris Wilson
• [Intel-gfx] [PULL] git-fixes for 4.16-rc2   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Support engine busy stats   Chris Wilson
• [Intel-gfx] [PATCH igt v3] Iterate over physical engines   Chris Wilson
• [Intel-gfx] [RFC] drm/i915: Eliminate devid sprinkle   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_ctx_isolation: Fix checking for context support   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Support engine busy stats   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle   Chris Wilson
• [Intel-gfx] [PATCH igt] lib/dummyload: Avoid assertions in lowlevel spin constructor   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Reduce context HW ID lifetime   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915/breadcrumbs: Assert all missed breadcrumbs were signaled   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/selftests: Extend partial vma coverage to check parallel creation   Chris Wilson
• [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle   Chris Wilson
• [Intel-gfx] [PATCH igt] Iterate over physical engines   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/perf_pmu: Fix 64b printf-isms   Chris Wilson
• [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle   Chris Wilson
• [Intel-gfx] [CI] drm/i915/icl: Prepare for more rings   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Move page sizes out of the 8-bit sandwich   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [PATCH 1/6] drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Update missing parts after the rename to i915_request   Chris Wilson
• [Intel-gfx] [PATCH igt] lib/dummyload: Avoid assertions in lowlevel spin constructor   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [PATCH 2/2] HAX: enable GuC for CI   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Update missing parts after the rename to i915_request   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/preemption: Allow preemption between submission ports   Chris Wilson
• [Intel-gfx] [igt CI] Iterate over physical engines   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_exec_schedule: Exercise "deep" preemption   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_softpin: Only expect EINVAL for color-overlaps for user objects   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_busy: Fix extended-bsd aliasing checks   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_busy: Fix extended-bsd aliasing checks   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/kms_force_connector_basic: Clear any previous connector override   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH] [CI] kernel: Downgrade warning for unsafe parameters   Chris Wilson
• [Intel-gfx] [RFC] kernel/panic: Repeat the line and caller information at the end of the OOPS   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [RFC] kernel/panic: Repeat the line and caller information at the end of the OOPS   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [PATCH] kernel: Downgrade warning for unsafe parameters   Chris Wilson
• [Intel-gfx] [PATCH igt v2] igt/gem_exec_schedule: Exercise "deep" preemption   Chris Wilson
• [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_softpin: Only expect EINVAL for color-overlaps for user objects   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm/i915: Move underrun work from fbc to fifo_underrun.   Chris Wilson
• [Intel-gfx] [PATCH 2/4] drm/i915: Introduce SAGV mutex.   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_softpin: Only expect EINVAL for color-overlaps for user objects   Chris Wilson
• [Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim   Chris Wilson
• [Intel-gfx] [PATCH v6 1/2] drm/i915: Move a bunch of workaround-related code to its own file   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Chris Wilson
• [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Fill preempt context once at init time   Chris Wilson
• [Intel-gfx] [PATCH igt v2] igt/gem_exec_schedule: Exercise "deep" preemption   Chris Wilson
• [Intel-gfx] [RFC] kernel/panic: Repeat the line and caller information at the end of the OOPS   Chris Wilson
• [Intel-gfx] [PATCH igt v2] igt/gem_exec_schedule: Exercise "deep" preemption   Chris Wilson
• [Intel-gfx] [PATCH i-g-t 1/2] igt/gem_fd_exhaustion: Actually test error handling on fd exhaustion   Chris Wilson
• [Intel-gfx] [RFC] kernel/panic: Repeat the line and caller information at the end of the OOPS   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Repeat the GEM_BUG_ON message in the ftrace log   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915: Improve PSR activation timing   Chris Wilson
• [Intel-gfx] [PATCH 1/5] drm/i915: Improve PSR activation timing   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Repeat the GEM_BUG_ON message in the ftrace log   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Don't deref request->ctx inside unlocked print_request()   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] tests/kms_frontbuffer_tracking: Fix build warning   Chris Wilson
• [Intel-gfx] [PATCH i-g-t] lib/igt_pm: Restore runtime pm state on test exit   Chris Wilson
• [Intel-gfx] [PATCH igt v2] tests: Add a random load generator   Chris Wilson
• [Intel-gfx] [PATCH i-g-t] lib/igt_pm: Restore runtime pm state on test exit   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Don't deref request->ctx inside unlocked print_request()   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Don't deref request->ctx inside unlocked print_request()   Chris Wilson
• [Intel-gfx] [PATCH i-g-t] lib/igt_pm: Restore runtime pm state on test exit   Chris Wilson
• [Intel-gfx] [PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor   Chris Wilson
• [Intel-gfx] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently   Chris Wilson
• [Intel-gfx] [PATCH igt 3/5] igt/gem_ctx_switch: Exercise all engines at once   Chris Wilson
• [Intel-gfx] [PATCH igt 4/5] igt/gem_exec_capture: Exercise readback of userptr   Chris Wilson
• [Intel-gfx] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Rename drm_i915_gem_request to i915_request   Michał Winiarski
• [Intel-gfx] [PATCH 1/2] drm/i915/preemption: Allow preemption between submission ports   Michał Winiarski
• [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fill preempt context once at init time   Michał Winiarski
• [Intel-gfx] [PATCH 2/2] HAX: Enable GuC submission for CI   Michał Winiarski
• [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Fill preempt context once at init time   Michał Winiarski
• [Intel-gfx] [PATCH 2/2] HAX: Enable GuC submission for CI   Michał Winiarski
• [Intel-gfx] [PATCH 01/15] drm/i915/guc: Tidy guc_log_control   Michał Winiarski
• [Intel-gfx] [PATCH 02/15] drm/i915/guc: Create common entry points for log register/unregister   Michał Winiarski
• [Intel-gfx] [PATCH 03/15] drm/i915/guc: Move GuC notification handling to separate function   Michał Winiarski
• [Intel-gfx] [PATCH 04/15] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Michał Winiarski
• [Intel-gfx] [PATCH 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Michał Winiarski
• [Intel-gfx] [PATCH 06/15] drm/i915/guc: Merge log relay file and channel creation   Michał Winiarski
• [Intel-gfx] [PATCH 07/15] drm/i915/guc: Flush directly in log unregister   Michał Winiarski
• [Intel-gfx] [PATCH 08/15] drm/i915/guc: Split relay control and GuC log level   Michał Winiarski
• [Intel-gfx] [PATCH 09/15] drm/i915/guc: Move check for fast memcpy_wc to relay creation   Michał Winiarski
• [Intel-gfx] [PATCH 10/15] drm/i915/guc: Get rid of GuC log runtime   Michał Winiarski
• [Intel-gfx] [PATCH 11/15] drm/i915/guc: Always print log stats in i915_guc_info when using GuC   Michał Winiarski
• [Intel-gfx] [PATCH 12/15] drm/i915/guc: Don't print out relay statistics when relay is disabled   Michał Winiarski
• [Intel-gfx] [PATCH 13/15] drm/i915/guc: Allow user to control default GuC logging   Michał Winiarski
• [Intel-gfx] [PATCH 14/15] drm/i915/guc: Default to non-verbose GuC logging   Michał Winiarski
• [Intel-gfx] [PATCH 15/15] HAX enable guc and guc_log for CI   Michał Winiarski
• [Intel-gfx] [PATCH 09/15] drm/i915/guc: Move check for fast memcpy_wc to relay creation   Michał Winiarski
• [Intel-gfx] [PATCH 06/43] misc/mei/hdcp: Add KBuild for mei hdcp driver   Winkler, Tomas
• [Intel-gfx] [PATCH] drm/i915: Tell vga_switcheroo whether runtime PM is used   Lukas Wunner
• [Intel-gfx] [PATCH] drm/i915: Tell vga_switcheroo whether runtime PM is used   Lukas Wunner
• [Intel-gfx] [PATCH libdrm 1/2] intel: align reuse buffer's size on page size instead   Xiong, James
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Sean Young
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Philipp Zabel
• [Intel-gfx] [PATCH 00/17] ICL PLLs, DP/HDMI and misc display   Paulo Zanoni
• [Intel-gfx] [PATCH 01/17] drm/i915/icl: add definitions for the ICL PLL registers   Paulo Zanoni
• [Intel-gfx] [PATCH 02/17] drm/i915/icl: add basic support for the ICL clocks   Paulo Zanoni
• [Intel-gfx] [PATCH 03/17] drm/i915/icl: compute the combo PHY (DPLL) HDMI registers   Paulo Zanoni
• [Intel-gfx] [PATCH 04/17] drm/i915/icl: compute the combo PHY (DPLL) DP registers   Paulo Zanoni
• [Intel-gfx] [PATCH 05/17] drm/i915/icl: compute the MG PLL registers   Paulo Zanoni
• [Intel-gfx] [PATCH 06/17] drm/i915/icl: Add register definitions for Combo PHY vswing sequences.   Paulo Zanoni
• [Intel-gfx] [PATCH 07/17] drm/i915/icl: Add Combo PHY DDI Buffer translation tables for Icelake.   Paulo Zanoni
• [Intel-gfx] [PATCH 08/17] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 09/17] drm/i915/icl: Add register defs for voltage swing sequences for MG PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 10/17] drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer   Paulo Zanoni
• [Intel-gfx] [PATCH 11/17] drm/i915/icl: Implement voltage swing programming sequence for MG PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 12/17] drm/i915/icl: HPD pin for port F   Paulo Zanoni
• [Intel-gfx] [PATCH 13/17] drm/i915/icl: Added 5k source scaling support for Gen11 platform   Paulo Zanoni
• [Intel-gfx] [PATCH 14/17] drm/i915/icl: Calculate link clock using the new registers   Paulo Zanoni
• [Intel-gfx] [PATCH 15/17] drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL   Paulo Zanoni
• [Intel-gfx] [PATCH 16/17] drm/i915/gen11: all the DDI ports on gen 11 support 4 lanes   Paulo Zanoni
• [Intel-gfx] [PATCH 17/17] drm/i915/icl: Fix the DP Max Voltage for ICL   Paulo Zanoni
• [Intel-gfx] [PATCH 4/4] drm/i915/icl: Interrupt handling   Paulo Zanoni
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   kbuild test robot
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   kbuild test robot
• [Intel-gfx] [PATCH v3 01/10] pwm: extend PWM framework with PWM modes   kbuild test robot
• [Intel-gfx] [PATCH v2] drm/i915: Disable SAGV on pre plane update.   kbuild test robot
• [Intel-gfx] [PATCH 08/10] drm: i915: Enable VDSC in Source   kbuild test robot
• [Intel-gfx] [PATCH 08/10] drm: i915: Enable VDSC in Source   kbuild test robot

Last message date: Wed Feb 28 23:57:10 UTC 2018
Archived on: Wed Feb 28 23:57:11 UTC 2018

• Messages sorted by: [ thread ] [ subject ] [ date ]
• More info on this list...