[Intel-gfx] [PATCH v5] drm/i915: Handle RC6 counter wrap

[Tvrtko Ursulin]

On 08/02/2018 16:04, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-08 16:00:36)
>> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>>
>> We can implement limited RC6 counter wrap-around protection under the
>> assumption that clients will be reading this value more frequently than
>> the wrap period on a given platform.
>>
>> With the typical wrap-around period being ~90 minutes, even with the
>> exception of Baytrail which wraps every 13 seconds, this sounds like a
>> reasonable assumption.
>>
>> Implementation works by storing a 64-bit software copy of a hardware RC6
>> counter, along with the previous HW counter snapshot. This enables it to
>> detect wrap is polled frequently enough and keep the software copy
>> monotonically incrementing.
>>
>> v2:
>>   * Missed GEN6_GT_GFX_RC6_LOCKED when considering slot sizing and
>>     indexing.
>>   * Fixed off-by-one in wrap-around handling. (Chris Wilson)
>>
>> v3:
>>   * Simplify index checking by using unsigned int. (Chris Wilson)
>>   * Expand the comment to explain why indexing works.
>>
>> v4:
>>   * Use __int128 if supported.
>>
>> v5:
>>   * Use mul_u64_u32_div. (Chris Wilson)
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94852
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> # v3
>> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> 
> Ville better not complain he liked the round up behaviour :-p

Ping Ville - ack?

Regards,

Tvrtko