[Intel-gfx] [PATCH 01/43] drm: hdcp2.2 authentication msg definitions

Ramalingam C ramalingam.c at intel.com
Thu Feb 22 05:29:10 UTC 2018



On Wednesday 14 February 2018 08:45 PM, Winkler, Tomas wrote:
>> This patch defines the hdcp2.2 protocol messages for the
>> HDCP2.2 authentication.
>>
>> Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
>> ---
>>   include/drm/drm_hdcp.h | 226
>> +++++++++++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 226 insertions(+)
>>
>> diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index
>> 562fa7df2637..9661c700cebb 100644
>> --- a/include/drm/drm_hdcp.h
>> +++ b/include/drm/drm_hdcp.h
>> @@ -38,4 +38,230 @@
>>   #define DRM_HDCP_DDC_BSTATUS			0x41
>>   #define DRM_HDCP_DDC_KSV_FIFO			0x43
>>
>> +#define DRM_HDCP_1_4_SRM_ID			0x8
>> +#define DRM_HDCP_1_4_VRL_LENGTH_SIZE		3
>> +#define DRM_HDCP_1_4_DCP_SIG_SIZE		40
>> +
>> +struct cp_srm_header {
>> +	struct {
>> +		uint8_t reserved_hi:4;
>> +		uint8_t srm_id:4;
>> +		uint8_t reserved_lo;
>> +	} spec_indicator;
> Do you really want to work with bit fields?  I mean in all the all structures.
I will rework on replacing all bitfields.
>> +	uint16_t srm_version;
> Shouldn't be it __le16?
And all multi-byte variables needs to be revisited for endianness.
>> +	uint8_t srm_gen_no;
>> +} __packed;
>> +
>> +/**
>> + * Protocol message definition for HDCP2.2 specification  */
>> +
>> +#define HDCP_STREAM_TYPE0			0x00
>> +#define HDCP_STREAM_TYPE1			0x01
>> +
>> +/* HDCP2.2 Msg IDs */
>> +#define NULL_MSG				1
>
> We need some HDCP2_ prefix this is in kernel global space and
> some of the constants have very generic name that can collide.
Sure I will add the prefix, to avoid possible conflicts. Thanks.
--Ram
>
>> +#define AKE_INIT				2
>> +#define AKE_SEND_CERT				3
>
>
>> +#define AKE_NO_STORED_KM			4
>> +#define AKE_STORED_KM				5
>> +#define AKE_SEND_HPRIME				7
>> +#define AKE_SEND_PARING_INFO			8
>> +#define LC_INIT					9
>> +#define LC_SEND_LPRIME				10
>> +#define SKE_SEND_EKS				11
>> +#define REP_SEND_RECVID_LIST			12
>> +#define REP_SEND_ACK				15
>> +#define REP_STREAM_MANAGE			16
>> +#define REP_STREAM_READY			17
>> +#define ERRATA_DP_STREAM_TYPE			50
>> +
>> +#define HDCP_RTX_LEN				8
>> +#define HDCP_RRX_LEN				8
>> +#define RECEIVER_ID_SIZE			5
>> +
>> +#define K_PUB_RX_MOD_N_SIZE			128
>> +#define K_PUB_RX_EXP_E_SIZE			3
>> +#define K_PUB_RX_SIZE
>> 	(K_PUB_RX_MOD_N_SIZE + \
>> +						 K_PUB_RX_EXP_E_SIZE)
>> +
>> +#define DCP_LLC_SIGNATURE_SIZE			384
>> +
>> +#define HDCP_E_KPUB_KM_LEN			128
>> +#define HDCP_E_KH_KM_M_LEN			(16 + 16)
>> +#define HDCP_H_PRIME_LEN			32
>> +#define HDCP_E_KH_KM_LEN			16
>> +#define HDCP_RN_LEN				8
>> +#define HDCP_L_PRIME_LEN			32
>> +#define HDCP_E_DKEY_KS_LEN			16
>> +#define HDCP_RIV_LEN				8
>> +#define HDCP_SEQ_NUM_LEN			3
>> +#define HDCP_LPRIME_HALF_SIZE			(HDCP_L_PRIME_LEN
>> / 2)
>> +#define HDCP_RECEIVER_ID_LEN			5
>> +#define HDCP_MAX_DEVICE_COUNT			31
>> +#define HDCP_RECEIVER_IDS_MAX_LEN
>> 	(HDCP_RECEIVER_ID_LEN * \
>> +						 HDCP_MAX_DEVICE_COUNT)
>> +
>> +/**
>> + * TODO: This has to be changed for DP MST, as multiple stream on
>> + * same port is possible.
>> + * For HDCP2.2 on HDMI and DP SST this value is always 1.
>> + */
>> +#define MAX_CONTENT_STREAMS_CNT			1
>> +
>> +#define HDCP_MPRIME_LEN				32
>> +
>> +struct hdcp2_cert_rx {
>> +	uint8_t	receiver_id[RECEIVER_ID_SIZE];
>> +	uint8_t	kpub_rx[K_PUB_RX_SIZE];
>> +	uint8_t	reserved1			:4;
>> +
>> +	/* As per HDMI & DP HDCP Spec, must be 0x0 or 0x1 */
>> +	uint8_t	protocol_descriptor		:4;
>> +
>> +	/* As per HDMI & DP HDCP Spec, must be 0x0000 */
>> +	uint8_t	reserved2;
>> +	uint8_t	dcp_signature[DCP_LLC_SIGNATURE_SIZE];
>> +} __packed;
>> +
>> +/**
>> + * The RxCaps field specified in the HDCP HDMI, DP specs
>> + * This field is big endian as specified in the errata.
>> + */
>> +union hdcp2_rx_caps {
>> +	struct	{
>> +		uint8_t version;
>> +		uint8_t receiver_capability_mask_hi;
>> +		uint8_t repeater:1;
>> +
>> +		/* Rsvd in HDMI. Applicable in DP alone */
>> +		uint8_t hdcp_capable:1;
>> +		uint8_t receiver_capability_mask_low:6;
>> +	} fields;
>> +	uint8_t rx_caps_value[3];
>> +} __packed;
>> +
>> +/**
>> + * RxInfo fields Contains various topology information for the
>> + * repeater authentication flows
>> + */
>> +union hdcp2_rx_info {
>> +	struct {
>> +		uint8_t device_count_hi:1;
>> +		uint8_t depth:3;
>> +		uint8_t rsvd:4;
>> +
>> +		/* Bit-0: downstream HDCP 1.x device exist */
>> +		uint8_t hdcp1_device_downstream:1;
>> +
>> +		/* Bit-1: downstream HDCP 2.0, 2.1 device exist */
>> +		uint8_t hdcp2_legacy_device_downstream:1;
>> +
>> +		/* Bit-2: downstream Topology limit errors */
>> +		uint8_t max_cascade_exceeded:1;
>> +		uint8_t max_devs_exceeded:1;
>> +		uint8_t device_count_lo:4;
>> +
>> +	} fields;
>> +	uint16_t rx_info_value;
> Should be probably __le16 and better to use bitmask then bit fields.
>
>> +} __packed;
>> +
>> +struct hdcp2_streamid_type {
>> +	uint8_t stream_id;
>> +	uint8_t stream_type;
>> +} __packed;
>> +
>> +/**
>> + * The TxCaps field specified in the HDCP HDMI, DP specs
>> + * This field is big endian as specified in the errata.
>> + */
>> +struct hdcp2_tx_caps {
>> +	uint8_t			version;
>> +
>> +	/* Reserved for HDCP and DP Spec. Read as Zero */
>> +	uint16_t		transmitter_capability_mask;
>> +} __packed;
>> +
>> +/*
>> + * Main structures for HDCP2.2 protocol communication  */ struct
>> +hdcp2_ake_init {
>> +	uint8_t			msg_id;
>> +	uint8_t			r_tx[HDCP_RTX_LEN];
>> +	struct hdcp2_tx_caps	tx_caps;
>> +} __packed;
>> +
>> +struct hdcp2_ake_send_cert {
>> +	uint8_t			msg_id;
>> +	struct hdcp2_cert_rx	cert_rx;
>> +	uint8_t			r_rx[HDCP_RRX_LEN];
>> +	union hdcp2_rx_caps	rx_caps;
>> +} __packed;
>> +
>> +struct hdcp2_ake_no_stored_km {
>> +	uint8_t			msg_id;
>> +	uint8_t			e_kpub_km[HDCP_E_KPUB_KM_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_ake_stored_km {
>> +	uint8_t			msg_id;
>> +	uint8_t			e_kh_km_m[HDCP_E_KH_KM_M_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_ake_send_hprime {
>> +	uint8_t			msg_id;
>> +	uint8_t			h_prime[HDCP_H_PRIME_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_ake_send_pairing_info {
>> +	uint8_t			msg_id;
>> +	uint8_t			e_kh_km[HDCP_E_KH_KM_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_lc_init {
>> +	uint8_t			msg_id;
>> +	uint8_t			r_n[HDCP_RN_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_lc_send_lprime {
>> +	uint8_t			msg_id;
>> +	uint8_t			l_prime[HDCP_L_PRIME_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_ske_send_eks {
>> +	uint8_t			msg_id;
>> +	uint8_t			e_dkey_ks[HDCP_E_DKEY_KS_LEN];
>> +	uint8_t			riv[HDCP_RIV_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_rep_send_receiverid_list {
>> +	uint8_t			msg_id;
>> +	union hdcp2_rx_info	rx_info;
>> +	uint8_t			seq_num_v[HDCP_SEQ_NUM_LEN];
>> +	uint8_t			v_prime[HDCP_LPRIME_HALF_SIZE];
>> +	uint8_t			receiver_ids[HDCP_RECEIVER_IDS_MAX_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_rep_send_ack {
>> +	uint8_t			msg_id;
>> +	uint8_t			v[HDCP_LPRIME_HALF_SIZE];
>> +} __packed;
>> +
>> +struct hdcp2_rep_stream_manage {
>> +	uint8_t			msg_id;
>> +	uint8_t			seq_num_m[HDCP_SEQ_NUM_LEN];
>> +	uint16_t		k;
>> +	struct hdcp2_streamid_type
>> streams[MAX_CONTENT_STREAMS_CNT]; }
>> +__packed;
>> +
>> +struct hdcp2_rep_stream_ready {
>> +	uint8_t			msg_id;
>> +	uint8_t			m_prime[HDCP_MPRIME_LEN];
>> +} __packed;
>> +
>> +struct hdcp2_dp_errata_stream_type {
>> +	uint8_t		msg_id;
>> +	uint8_t		stream_type;
>> +} __packed;
>> +
>>   #endif
>> --
>> 2.7.4



More information about the Intel-gfx mailing list