[Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim

[Chris Wilson]

Quoting Ramalingam C (2018-02-26 17:12:39)
> DP and HDMI HDCP specifications are varying with respect to
> detecting the R0 and ksv_fifo availability.
> 
> DP will produce CP_IRQ and set a bit for indicating the R0 and
> FIFO_READY status.
> 
> Whereas HDMI will set a bit for FIFO_READY but there is no bit
> indication for R0 ready. And also polling of READY bit is needed for
> HDMI as ther is no CP_IRQ.
> 
> So Fielding the CP_IRQ for DP and the polling the READY bit for a
> period and blindly waiting for a fixed time for R0 incase of HDMI are
> moved into corresponding hdcp_shim.
> 
> Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
> ---
> +static int intel_dp_hdcp_wait_for_cp_irq(struct completion *cp_irq_recved,
> +                                        int timeout)
> +{
> +       long ret;
> +
> +       if (completion_done(cp_irq_recved))
> +               reinit_completion(cp_irq_recved);
> +
> +       ret = wait_for_completion_interruptible_timeout(cp_irq_recved,
> +                                                       msecs_to_jiffies(
> +                                                       timeout));
> +       reinit_completion(cp_irq_recved);

This is not thread-safe.

The trick is to use a waitqueue to interrupt the sleeps inside the wait
loops to complete the polling quicker. (As stated, you can't escape the
polling, and you always need to check the IRQ was for the event you
expected anyway.)
-Chris