[Intel-gfx] [PATCH 09/15] drm/i915/guc: Move check for fast memcpy_wc to relay creation

Sagar Arun Kamble sagar.a.kamble at intel.com
Tue Mar 6 07:23:53 UTC 2018



On 2/27/2018 6:22 PM, Michał Winiarski wrote:
> We only need those fast memcpy_wc when we're using relay to read
> continuous GuC log. Let's prevent the user from creating a relay if we
> know we won't be able to keep up with GuC.
>
> Signed-off-by: Michał Winiarski <michal.winiarski at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_guc_log.c | 20 ++++++++++----------
>   1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c
> index 4dee65692f5f..d2aca10ab986 100644
> --- a/drivers/gpu/drm/i915/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/intel_guc_log.c
> @@ -452,16 +452,6 @@ int intel_guc_log_create(struct intel_guc *guc)
>   
>   	GEM_BUG_ON(guc->log.vma);
>   
> -	/*
> -	 * We require SSE 4.1 for fast reads from the GuC log buffer and
> -	 * it should be present on the chipsets supporting GuC based
> -	 * submisssions.
> -	 */
> -	if (WARN_ON(!i915_has_memcpy_from_wc())) {
> -		ret = -EINVAL;
> -		goto err;
> -	}
> -
>   	vma = intel_guc_allocate_vma(guc, GUC_LOG_SIZE);
>   	if (IS_ERR(vma)) {
>   		ret = PTR_ERR(vma);
> @@ -568,6 +558,16 @@ int intel_guc_log_relay_open(struct intel_guc *guc)
>   		goto out_unlock;
>   	}
>   
> +	/*
> +	 * We require SSE 4.1 for fast reads from the GuC log buffer and
> +	 * it should be present on the chipsets supporting GuC based
> +	 * submisssions.
> +	 */
> +	if (!i915_has_memcpy_from_wc()) {
> +		ret = -EINVAL;
> +		goto out_unlock;
> +	}
> +
>   	ret = guc_log_relay_create(guc);
>   	if (ret)
>   		goto out_unlock;

-- 
Thanks,
Sagar



More information about the Intel-gfx mailing list