March 2018 Archives by subject

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Starting: Thu Mar 1 01:01:35 UTC 2018
Ending: Sat Mar 31 20:41:52 UTC 2018
Messages: 3678

• [Intel-gfx] *cringe* at adding a parameter to workaround issues.   Marc Herbert
• [Intel-gfx] *cringe* at adding a parameter to workaround issues.   Jani Nikula
• [Intel-gfx] [06/10] drm/i915: Replace pcu_lock with sb_lock   Hans de Goede
• [Intel-gfx] [bug report] drm/i915: Eliminate lots of iterations over the execobjects array   Dan Carpenter
• [Intel-gfx] [bug report] drm/i915: Eliminate lots of iterations over the execobjects array   Chris Wilson
• [Intel-gfx] [bug report] drm/i915: Eliminate lots of iterations over the execobjects array   Dan Carpenter
• [Intel-gfx] [CI 1/2] drm/i915/guc: enable guc interrupts unconditionally in uc_resume   Michel Thierry
• [Intel-gfx] [CI 1/2] drm/i915/guc: enable guc interrupts unconditionally in uc_resume   Chris Wilson
• [Intel-gfx] [CI 1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Piotr Piórkowski
• [Intel-gfx] [CI 1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Sagar Arun Kamble
• [Intel-gfx] [CI 1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Michal Wajdeczko
• [Intel-gfx] [CI 1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Yaodong Li
• [Intel-gfx] [CI 1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Michal Wajdeczko
• [Intel-gfx] [CI 1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Yaodong Li
• [Intel-gfx] [CI 1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Michal Wajdeczko
• [Intel-gfx] [CI 1/2] drm/i915: Avoid sleeping inside per-engine reset   Chris Wilson
• [Intel-gfx] [CI 1/2] drm/i915: Kick the rps worker when changing the boost frequency   Chris Wilson
• [Intel-gfx] [CI 1/3] drm/i915/guc: Unify naming of private GuC action functions   Michal Wajdeczko
• [Intel-gfx] [CI 1/3] drm/i915: Suspend submission tasklets around wedging   Chris Wilson
• [Intel-gfx] [CI 1/4] drm/i915/guc: Tidy guc_log_control   Chris Wilson
• [Intel-gfx] [CI 2/2] drm/i915: Index the ring frequency table by HW frequency range   Chris Wilson
• [Intel-gfx] [CI 2/2] drm/i915: Only warn for might_sleep() before a slow wait_for_register   Chris Wilson
• [Intel-gfx] [CI 2/2] HAX: Enable GuC for CI   Piotr Piórkowski
• [Intel-gfx] [CI 2/2] HAX enable GuC submission for CI   Michel Thierry
• [Intel-gfx] [CI 2/3] drm/i915/execlists: Move irq state manipulation inside irq disabled region   Chris Wilson
• [Intel-gfx] [CI 2/3] drm/i915/guc: Drop union guc_log_control   Michal Wajdeczko
• [Intel-gfx] [CI 2/4] drm/i915/guc: Create common entry points for log register/unregister   Chris Wilson
• [Intel-gfx] [CI 3/3] drm/i915/execlists: Split spinlock from its irq disabling side-effect   Chris Wilson
• [Intel-gfx] [CI 3/3] drm/i915/guc: Move enable/disable msg functions to GuC header   Michal Wajdeczko
• [Intel-gfx] [CI 3/4] drm/i915/guc: Move GuC notification handling to separate function   Chris Wilson
• [Intel-gfx] [CI 4/4] HAX: Enable GuC for CI   Chris Wilson
• [Intel-gfx] [CI] drm/i915: Avoid sleeping inside per-engine reset   Chris Wilson
• [Intel-gfx] [CI] drm/i915: Avoid sleeping inside per-engine reset   Chris Wilson
• [Intel-gfx] [CI] drm/i915: Prefer memset64() when filling the iomap   Chris Wilson
• [Intel-gfx] [CI] drm/i915: Replace open-coded wait-for loop   Chris Wilson
• [Intel-gfx] [CI] drm/i915: Split GPU commands definitions into separate header   Chris Wilson
• [Intel-gfx] [CI] drm/i915: Split GPU commands definitions into separate header   Chris Wilson
• [Intel-gfx] [CI] drm/i915: Split GPU commands definitions into separate header   Arkadiusz Hiler
• [Intel-gfx] [CI] Restore "ALSA: hda: Make use of core codec functions to sync power state"   Chris Wilson
• [Intel-gfx] [CI i-g-t] don't look   Tvrtko Ursulin
• [Intel-gfx] [CI i-g-t] tests/perf_pmu: Avoid RT thread for accuracy test   Tvrtko Ursulin
• [Intel-gfx] [CI i-g-t v3] don't look   Tvrtko Ursulin
• [Intel-gfx] [DIM PATCH 1/3] dim: cleanup checkpatch_commit   Jani Nikula
• [Intel-gfx] [DIM PATCH 2/3] dim: add checkpatch profiles to allow different checkpatch options   Jani Nikula
• [Intel-gfx] [DIM PATCH 2/3] dim: add checkpatch profiles to allow different checkpatch options   Daniel Vetter
• [Intel-gfx] [DIM PATCH 2/3] dim: add checkpatch profiles to allow different checkpatch options   Jani Nikula
• [Intel-gfx] [DIM PATCH 2/3] dim: add checkpatch profiles to allow different checkpatch options   Daniel Vetter
• [Intel-gfx] [DIM PATCH 2/3] dim: add checkpatch profiles to allow different checkpatch options   Jani Nikula
• [Intel-gfx] [DIM PATCH 3/3] dim: loosen some drm-intel checkpatch rules   Jani Nikula
• [Intel-gfx] [DIM PATCH 3/3] dim: loosen some drm-intel checkpatch rules   Daniel Vetter
• [Intel-gfx] [DIM PATCH 3/3] dim: loosen some drm-intel checkpatch rules   Jani Nikula
• [Intel-gfx] [drm-intel:drm-intel-next-queued 13/14] drivers/gpu/drm/i915/intel_guc.c:230:12-17: WARNING: Unsigned expression compared with zero: level < 0 (fwd)   Julia Lawall
• [Intel-gfx] [drm-intel:for-linux-next-fixes 4/4] drivers/gpu//drm/i915/i915_gem.c:3223:8: error: 'struct drm_i915_private' has no member named 'caps'; did you mean 'ips'?   kbuild test robot
• [Intel-gfx] [drm-intel:for-linux-next-fixes 4/4] drivers/gpu//drm/i915/i915_gem.c:3223:8: error: 'struct drm_i915_private' has no member named 'caps'; did you mean 'ips'?   Rodrigo Vivi
• [Intel-gfx] [drm-tip:drm-tip 15/1373] arch/frv/include/asm/pgalloc.h:48:2: error: implicit declaration of function 'pgtable_page_dtor'; did you mean 'pgdat_page_nr'?   kbuild test robot
• [Intel-gfx] [drm-tip:drm-tip 15/1373] arch/frv/include/asm/pgalloc.h:48:2: error: implicit declaration of function 'pgtable_page_dtor'; did you mean 'pgdat_page_nr'?   Oded Gabbay
• [Intel-gfx] [igt-dev] [CI i-g-t] tests/perf_pmu: Avoid RT thread for accuracy test   Chris Wilson
• [Intel-gfx] [igt-dev] [CI i-g-t] tests/perf_pmu: Avoid RT thread for accuracy test   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 1/3] lib/dummyload: Add pollable spin batch   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Antonio Argenziano
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Antonio Argenziano
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t 4/5] tests/perf_pmu: Add tests for engine queued/runnable/running stats   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 5/5] tests/i915_query: Engine queues tests   Lionel Landwerlin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 5/5] tests/i915_query: Engine queues tests   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 5/5] tests/i915_query: Engine queues tests   Lionel Landwerlin
• [Intel-gfx] [igt-dev] [PATCH i-g-t 5/5] tests/i915_query: Engine queues tests   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t] intel-gpu-overlay: Update for renamed tracepoints   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t] intel-gpu-overlay: Update for renamed tracepoints   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH i-g-t v2] tests/kms_rotation_crc: Remove hardcoding of platforms in igt_require()   Ville Syrjälä
• [Intel-gfx] [igt-dev] [PATCH i-g-t v2] tests/kms_rotation_crc: Remove hardcoding of platforms in igt_require()   Maarten Lankhorst
• [Intel-gfx] [igt-dev] [PATCH i-g-t v2] tests/kms_rotation_crc: Remove hardcoding of platforms in igt_require()   Ville Syrjälä
• [Intel-gfx] [igt-dev] [PATCH i-g-t v2] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH igt 1/3] igt/gem_eio: Exercise set-wedging against request submission   Antonio Argenziano
• [Intel-gfx] [igt-dev] [PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor   Abdiel Janulgue
• [Intel-gfx] [igt-dev] [PATCH igt 2/3] igt/gem_exec_fence: Exercise merging fences   Antonio Argenziano
• [Intel-gfx] [igt-dev] [PATCH igt 2/3] igt/gem_exec_fence: Exercise merging fences   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH igt 2/3] igt/gem_exec_fence: Exercise merging fences   Antonio Argenziano
• [Intel-gfx] [igt-dev] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently   Michał Winiarski
• [Intel-gfx] [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_ctx_isolation: Reset a scratch context   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_ctx_isolation: Reset a scratch context   Tvrtko Ursulin
• [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_ctx_isolation: Reset a scratch context   Chris Wilson
• [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_mocs_settings: Wait for RC6 EI before polling   Michał Winiarski
• [Intel-gfx] [igt-dev] [PATCH igt] igt/kms_frontbuffer_tracking: Disable FBC testing for -ENODEV   Daniel Vetter
• [Intel-gfx] [igt-dev] [RFC i-g-t] intel-gpu-top: Rewrite the tool to be safe to use   Rinat Ibragimov
• [Intel-gfx] [igt-dev] [RFC i-g-t] intel-gpu-top: Rewrite the tool to be safe to use   Tvrtko Ursulin
• [Intel-gfx] [maintainer-tools PATCH] doc: how to become a drm-intel committer   Jani Nikula
• [Intel-gfx] [maintainer-tools PATCH] doc: how to become a drm-intel committer   Daniel Vetter
• [Intel-gfx] [maintainer-tools PATCH] doc: how to become a drm-intel committer   Jani Nikula
• [Intel-gfx] [maintainer-tools PATCH] doc: how to become a drm-intel committer   Daniel Vetter
• [Intel-gfx] [PATCH 0/2] Guc and HuC for Cannonlake   Anusha Srivatsa
• [Intel-gfx] [PATCH 0/3] CNL port refactoring   Mahesh Kumar
• [Intel-gfx] [PATCH 0/3] drm/i915/uc: Sanitize uC   Michal Wajdeczko
• [Intel-gfx] [PATCH 0/3] PSR lag fixes   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 0/3] PSR lag fixes   Hans de Goede
• [Intel-gfx] [PATCH 0/3] PSR lag fixes   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 0/3] PSR lag fixes   Rodrigo Vivi
• [Intel-gfx] [PATCH 0/3] PSR lag fixes   Hans de Goede
• [Intel-gfx] [PATCH 0/5] PSR interrupts   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 0/6] Implement proper MST fallback retraining in i915   Lyude Paul
• [Intel-gfx] [PATCH 0/7] drm/i915: move dpll_info inside intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH 0/7] drm/i915: move dpll_info inside intel_shared_dpll   Ville Syrjälä
• [Intel-gfx] [PATCH 0/8] drm: Add COLOR_ENCODING and COLOR_RANGE plane properties   Ville Syrjälä
• [Intel-gfx] [PATCH 0/8] ICL PLLs, DP/HDMI and misc display, v2   Paulo Zanoni
• [Intel-gfx] [PATCH 0/9] GPU-bound energy efficiency improvements for the intel_pstate driver.   Francisco Jerez
• [Intel-gfx] [PATCH 0/9] GPU-bound energy efficiency improvements for the intel_pstate driver.   Francisco Jerez
• [Intel-gfx] [PATCH 00/11] drm/i915/perf: optimize perf stream usage on Gen7.5   Lionel Landwerlin
• [Intel-gfx] [PATCH 00/11] drm/i915: Some plane init cleanups   Ville Syrjala
• [Intel-gfx] [PATCH 00/14] drm/i915: Clean up the port pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH 00/17] ICL PLLs, DP/HDMI and misc display   Paulo Zanoni
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Ville Syrjala
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Noralf Trønnes
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Emil Velikov
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Harry Wentland
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Emil Velikov
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Ville Syrjälä
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Noralf Trønnes
• [Intel-gfx] [PATCH 00/23] drm: Eliminate plane->fb/crtc usage for atomic drivers   Daniel Vetter
• [Intel-gfx] [PATCH 00/24] drm_framebuffer boilerplate removal   Daniel Stone
• [Intel-gfx] [PATCH 00/24] drm_framebuffer boilerplate removal   Alex Deucher
• [Intel-gfx] [PATCH 01/10] drm/i915: Disable preemption and sleeping while using the punit sideband   Chris Wilson
• [Intel-gfx] [PATCH 01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Chris Wilson
• [Intel-gfx] [PATCH 01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Mika Kuoppala
• [Intel-gfx] [PATCH 01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Mika Kuoppala
• [Intel-gfx] [PATCH 01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Chris Wilson
• [Intel-gfx] [PATCH 01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Mika Kuoppala
• [Intel-gfx] [PATCH 01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Chris Wilson
• [Intel-gfx] [PATCH 01/11] drm/i915/perf: pass stream to enable metric set vfuncs   Lionel Landwerlin
• [Intel-gfx] [PATCH 01/11] drm/i915/perf: pass stream to enable metric set vfuncs   Matthew Auld
• [Intel-gfx] [PATCH 01/11] drm/i915/perf: pass stream to enable metric set vfuncs   Matthew Auld
• [Intel-gfx] [PATCH 01/11] drm/i915/perf: pass stream to enable metric set vfuncs   Lionel Landwerlin
• [Intel-gfx] [PATCH 01/11] drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function   José Roberto de Souza
• [Intel-gfx] [PATCH 01/11] drm/i915: Constify intel_plane_funcs   Ville Syrjala
• [Intel-gfx] [PATCH 01/12] drm: Add DP PSR2 sink enable bit   José Roberto de Souza
• [Intel-gfx] [PATCH 01/12] drm: Add DP PSR2 sink enable bit   Rodrigo Vivi
• [Intel-gfx] [PATCH 01/14] drm/i915: Clean up ADPA pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH 01/14] drm/i915: Clean up ADPA pipe select bits   Jani Nikula
• [Intel-gfx] [PATCH 01/15] drm/i915/execlists: Refactor out complete_preempt_context()   Chris Wilson
• [Intel-gfx] [PATCH 01/15] drm/i915/guc: Tidy guc_log_control   Sagar Arun Kamble
• [Intel-gfx] [PATCH 01/15] drm/i915/guc: Tidy guc_log_control   Michał Winiarski
• [Intel-gfx] [PATCH 01/15] drm/i915/guc: Tidy guc_log_control   Sagar Arun Kamble
• [Intel-gfx] [PATCH 01/17] drm/i915/execlists: Track begin/end of execlists submission sequences   Chris Wilson
• [Intel-gfx] [PATCH 01/17] drm/i915/icl: add definitions for the ICL PLL registers   Paulo Zanoni
• [Intel-gfx] [PATCH 01/17] drm/i915/icl: add definitions for the ICL PLL registers   Paulo Zanoni
• [Intel-gfx] [PATCH 01/18] drm/i915/selftests: Avoid repeatedly harming the same innocent context   Chris Wilson
• [Intel-gfx] [PATCH 01/23] Revert "drm/atomic-helper: Fix leak in disable_all"   Ville Syrjala
• [Intel-gfx] [PATCH 01/36] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Chris Wilson
• [Intel-gfx] [PATCH 02/10] drm/i915: Lift acquiring the vlv punit magic to a common sb-get   Chris Wilson
• [Intel-gfx] [PATCH 02/10] drm: i915: Get DSC capability from DP sink   Dan Carpenter
• [Intel-gfx] [PATCH 02/11] drm/i915/execlists: Clear user-active flag on preemption completion   Chris Wilson
• [Intel-gfx] [PATCH 02/11] drm/i915/execlists: Clear user-active flag on preemption completion   Chris Wilson
• [Intel-gfx] [PATCH 02/11] drm/i915/execlists: Clear user-active flag on preemption completion   Chris Wilson
• [Intel-gfx] [PATCH 02/11] drm/i915/perf: check the value of PROP_SAMPLE_OA uapi parameter   Lionel Landwerlin
• [Intel-gfx] [PATCH 02/11] drm/i915/perf: check the value of PROP_SAMPLE_OA uapi parameter   Matthew Auld
• [Intel-gfx] [PATCH 02/11] drm/i915/psr: Move PSR exit specific code to hardware specific function   José Roberto de Souza
• [Intel-gfx] [PATCH 02/11] drm/i915: Fix tabs vs. spaces   Ville Syrjala
• [Intel-gfx] [PATCH 02/12] drm: Add DP last received PSR SDP VSC register and bits   José Roberto de Souza
• [Intel-gfx] [PATCH 02/12] drm: Add DP last received PSR SDP VSC register and bits   Rodrigo Vivi
• [Intel-gfx] [PATCH 02/12] drm: Add DP last received PSR SDP VSC register and bits   Souza, Jose
• [Intel-gfx] [PATCH 02/12] drm: Add DP last received PSR SDP VSC register and bits   Rodrigo Vivi
• [Intel-gfx] [PATCH 02/14] drm/i915: Clean up LVDS pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH 02/14] drm/i915: Clean up LVDS pipe select bits   Jani Nikula
• [Intel-gfx] [PATCH 02/15] drm/i915/guc: Create common entry points for log register/unregister   Sagar Arun Kamble
• [Intel-gfx] [PATCH 02/15] drm/i915/guc: Create common entry points for log register/unregister   Michał Winiarski
• [Intel-gfx] [PATCH 02/15] drm/i915/guc: Create common entry points for log register/unregister   Sagar Arun Kamble
• [Intel-gfx] [PATCH 02/15] drm/i915: Move engine reset prepare/finish to backends   Chris Wilson
• [Intel-gfx] [PATCH 02/17] drm/i915/execlists: Set queue priority from secondary port   Chris Wilson
• [Intel-gfx] [PATCH 02/17] drm/i915/icl: add basic support for the ICL clocks   Paulo Zanoni
• [Intel-gfx] [PATCH 02/18] drm/i915/execlists: Track begin/end of execlists submission sequences   Chris Wilson
• [Intel-gfx] [PATCH 02/23] drm/atomic-helper: Make drm_atomic_helper_disable_all() update the plane->fb pointers   Ville Syrjala
• [Intel-gfx] [PATCH 02/23] drm/atomic-helper: Make drm_atomic_helper_disable_all() update the plane->fb pointers   Daniel Vetter
• [Intel-gfx] [PATCH 02/23] drm/atomic-helper: Make drm_atomic_helper_disable_all() update the plane->fb pointers   Daniel Vetter
• [Intel-gfx] [PATCH 02/23] drm/atomic-helper: Make drm_atomic_helper_disable_all() update the plane->fb pointers   Ville Syrjälä
• [Intel-gfx] [PATCH 02/36] drm/i915/stolen: Checkpatch cleansing   Chris Wilson
• [Intel-gfx] [PATCH 03/10] drm/i915: Lift sideband locking for vlv_punit_(read|write)   Chris Wilson
• [Intel-gfx] [PATCH 03/11] drm/i915/perf: simplify OA unit enabling on gen7   Lionel Landwerlin
• [Intel-gfx] [PATCH 03/11] drm/i915/perf: simplify OA unit enabling on gen7   Matthew Auld
• [Intel-gfx] [PATCH 03/11] drm/i915/psr: Share code between disable and exit   José Roberto de Souza
• [Intel-gfx] [PATCH 03/11] drm/i915: Include submission tasklet state in engine dump   Chris Wilson
• [Intel-gfx] [PATCH 03/11] drm/i915: Include submission tasklet state in engine dump   Mika Kuoppala
• [Intel-gfx] [PATCH 03/11] drm/i915: Populate possible_crtcs for primary/cursor planes   Ville Syrjala
• [Intel-gfx] [PATCH 03/12] drm/i915/psr: Nuke aux frame sync   José Roberto de Souza
• [Intel-gfx] [PATCH 03/12] drm/i915/psr: Nuke aux frame sync   Rodrigo Vivi
• [Intel-gfx] [PATCH 03/12] drm/i915/psr: Nuke aux frame sync   Souza, Jose
• [Intel-gfx] [PATCH 03/12] drm/i915/psr: Nuke aux frame sync   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 03/12] drm/i915/psr: Nuke aux frame sync   Souza, Jose
• [Intel-gfx] [PATCH 03/12] drm/i915/psr: Nuke aux frame sync   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 03/12] drm/i915/psr: Nuke aux frame sync   Souza, Jose
• [Intel-gfx] [PATCH 03/14] drm/i915: Clean up SDVO pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH 03/14] drm/i915: Clean up SDVO pipe select bits   Jani Nikula
• [Intel-gfx] [PATCH 03/15] drm/i915/guc: Move GuC notification handling to separate function   Sagar Arun Kamble
• [Intel-gfx] [PATCH 03/15] drm/i915: Split execlists/guc reset prepartions   Chris Wilson
• [Intel-gfx] [PATCH 03/17] drm/i915/execlists: Refactor out complete_preempt_context()   Chris Wilson
• [Intel-gfx] [PATCH 03/18] drm/i915/execlists: Set queue priority from secondary port   Chris Wilson
• [Intel-gfx] [PATCH 03/23] drm: Clear crtc->primary->crtc when disabling the crtc via setcrtc()   Ville Syrjala
• [Intel-gfx] [PATCH 03/23] drm: Clear crtc->primary->crtc when disabling the crtc via setcrtc()   Daniel Vetter
• [Intel-gfx] [PATCH 03/36] drm/i915/stolen: Deduce base of reserved portion as top-size on vlv   Chris Wilson
• [Intel-gfx] [PATCH 04/10] drm/i915: Reduce RPS update frequency on Valleyview/Cherryview   Chris Wilson
• [Intel-gfx] [PATCH 04/11] drm/i915/execlists: Refactor out complete_preempt_context()   Chris Wilson
• [Intel-gfx] [PATCH 04/11] drm/i915/perf: do not warn when OA buffer is already allocated   Lionel Landwerlin
• [Intel-gfx] [PATCH 04/11] drm/i915/perf: do not warn when OA buffer is already allocated   Matthew Auld
• [Intel-gfx] [PATCH 04/11] drm/i915/perf: do not warn when OA buffer is already allocated   Lionel Landwerlin
• [Intel-gfx] [PATCH 04/11] drm/i915/psr: Remove intel_crtc_state parameter from disable()   José Roberto de Souza
• [Intel-gfx] [PATCH 04/11] drm/i915: Don't populate plane->i9xx_plane for sprites   Ville Syrjala
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   José Roberto de Souza
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   Rodrigo Vivi
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   Souza, Jose
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   Souza, Jose
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   Rodrigo Vivi
• [Intel-gfx] [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   Nagaraju, Vathsala
• [Intel-gfx] [PATCH 04/14] drm/i915: Clean up TV pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH 04/14] drm/i915: Clean up TV pipe select bits   Jani Nikula
• [Intel-gfx] [PATCH 04/15] drm/i915/execlists: Flush pending preemption events during reset   Chris Wilson
• [Intel-gfx] [PATCH 04/15] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Sagar Arun Kamble
• [Intel-gfx] [PATCH 04/17] drm/i915: Move engine reset prepare/finish to backends   Chris Wilson
• [Intel-gfx] [PATCH 04/18] drm/i915/execlists: Refactor out complete_preempt_context()   Chris Wilson
• [Intel-gfx] [PATCH 04/23] drm/atomic-helper: WARN if legacy plane fb pointers are bogus when committing duplicated state   Ville Syrjala
• [Intel-gfx] [PATCH 04/23] drm/atomic-helper: WARN if legacy plane fb pointers are bogus when committing duplicated state   Daniel Vetter
• [Intel-gfx] [PATCH 04/36] drm/i915: Trim error mask to known engines   Chris Wilson
• [Intel-gfx] [PATCH 05/10] Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"   Chris Wilson
• [Intel-gfx] [PATCH 05/11] drm/i915/perf: remove empty line   Lionel Landwerlin
• [Intel-gfx] [PATCH 05/11] drm/i915/perf: remove empty line   Matthew Auld
• [Intel-gfx] [PATCH 05/11] drm/i915/psr: Export intel_psr_activate/exit()   José Roberto de Souza
• [Intel-gfx] [PATCH 05/11] drm/i915: Allow horizontal mirroring for cnl+ "sprite" planes   Ville Syrjala
• [Intel-gfx] [PATCH 05/11] drm/i915: Allow horizontal mirroring for cnl+ "sprite" planes   Joonas Lahtinen
• [Intel-gfx] [PATCH 05/11] drm/i915: Move engine reset prepare/finish to backends   Chris Wilson
• [Intel-gfx] [PATCH 05/12] drm/i915/psr/cnl: Enable Y-coordinate support in source   José Roberto de Souza
• [Intel-gfx] [PATCH 05/14] drm/i915: Clean up DVO pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH 05/14] drm/i915: Clean up DVO pipe select bits   Jani Nikula
• [Intel-gfx] [PATCH 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Sagar Arun Kamble
• [Intel-gfx] [PATCH 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Michał Winiarski
• [Intel-gfx] [PATCH 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Sagar Arun Kamble
• [Intel-gfx] [PATCH 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Chris Wilson
• [Intel-gfx] [PATCH 05/15] drm/i915/selftests: Add basic sanitychecks for execlists   Chris Wilson
• [Intel-gfx] [PATCH 05/17] drm/i915/icl: compute the MG PLL registers   Manasi Navare
• [Intel-gfx] [PATCH 05/17] drm/i915: Split execlists/guc reset prepartions   Chris Wilson
• [Intel-gfx] [PATCH 05/18] drm/i915: Move engine reset prepare/finish to backends   Chris Wilson
• [Intel-gfx] [PATCH 05/23] drm: Add local 'plane' variable for primary/cursor planes   Ville Syrjala
• [Intel-gfx] [PATCH 05/23] drm: Add local 'plane' variable for primary/cursor planes   Daniel Vetter
• [Intel-gfx] [PATCH 05/36] drm/i915: Disable preemption and sleeping while using the punit sideband   Chris Wilson
• [Intel-gfx] [PATCH 05/36] drm/i915: Disable preemption and sleeping while using the punit sideband   Mika Kuoppala
• [Intel-gfx] [PATCH 06/10] drm/i915: Replace pcu_lock with sb_lock   Chris Wilson
• [Intel-gfx] [PATCH 06/11] drm/i915/psr: Add intel_psr_activate_block_get()/put()   José Roberto de Souza
• [Intel-gfx] [PATCH 06/11] drm/i915: Disallow plane scaling with specific pixel formats   Ville Syrjala
• [Intel-gfx] [PATCH 06/11] drm/i915: rename PPGTT/GGTT fields OA registers   Lionel Landwerlin
• [Intel-gfx] [PATCH 06/11] drm/i915: rename PPGTT/GGTT fields OA registers   Matthew Auld
• [Intel-gfx] [PATCH 06/11] drm/i915: Split execlists/guc reset prepartions   Chris Wilson
• [Intel-gfx] [PATCH 06/12] drm/i915/psr: Do not override PSR2 sink support   José Roberto de Souza
• [Intel-gfx] [PATCH 06/14] drm/i915: Use intel_ddi_dp_voltage_max() for HSW/BDW too   Ville Syrjala
• [Intel-gfx] [PATCH 06/15] drm/i915/guc: Merge log relay file and channel creation   Sagar Arun Kamble
• [Intel-gfx] [PATCH 06/15] drm/i915: Only warn for might_sleep() before a slow wait_for_register   Chris Wilson
• [Intel-gfx] [PATCH 06/15] drm/i915: Only warn for might_sleep() before a slow wait_for_register   Mika Kuoppala
• [Intel-gfx] [PATCH 06/17] drm/i915/execlists: Flush pending preemption events during reset   Chris Wilson
• [Intel-gfx] [PATCH 06/18] drm/i915: Split execlists/guc reset prepartions   Chris Wilson
• [Intel-gfx] [PATCH 06/23] drm: Adjust whitespace for legibility   Ville Syrjala
• [Intel-gfx] [PATCH 06/23] drm: Adjust whitespace for legibility   Daniel Vetter
• [Intel-gfx] [PATCH 06/36] drm/i915: Lift acquiring the vlv punit magic to a common sb-get   Chris Wilson
• [Intel-gfx] [PATCH 07/10] drm/i915: Separate sideband declarations to intel_sideband.h   Chris Wilson
• [Intel-gfx] [PATCH 07/11] drm/i915/dp: Exit PSR before do a aux channel transaction   José Roberto de Souza
• [Intel-gfx] [PATCH 07/11] drm/i915/execlists: Flush pending preemption events during reset   Chris Wilson
• [Intel-gfx] [PATCH 07/11] drm/i915/perf: pass stream as argument to oa enable vfunc   Lionel Landwerlin
• [Intel-gfx] [PATCH 07/11] drm/i915/perf: pass stream as argument to oa enable vfunc   Matthew Auld
• [Intel-gfx] [PATCH 07/11] drm/i915: Add missing pixel formats for skl+ "sprites"   Ville Syrjala
• [Intel-gfx] [PATCH 07/12] drm/i915/psr: Use PSR2 macro for PSR2   José Roberto de Souza
• [Intel-gfx] [PATCH 07/12] drm/i915/psr: Use PSR2 macro for PSR2   Rodrigo Vivi
• [Intel-gfx] [PATCH 07/14] drm/i915: Use the same vswing->max_preemph mapping on HSW/BDW as on SKL+   Ville Syrjala
• [Intel-gfx] [PATCH 07/15] drm/i915/breadcrumbs: Keep the fake irq armed across reset   Chris Wilson
• [Intel-gfx] [PATCH 07/15] drm/i915/guc: Flush directly in log unregister   Sagar Arun Kamble
• [Intel-gfx] [PATCH 07/15] drm/i915/guc: Flush directly in log unregister   Michał Winiarski
• [Intel-gfx] [PATCH 07/15] drm/i915/guc: Flush directly in log unregister   Sagar Arun Kamble
• [Intel-gfx] [PATCH 07/17] drm/i915/selftests: Add basic sanitychecks for execlists   Chris Wilson
• [Intel-gfx] [PATCH 07/18] drm/i915/execlists: Flush pending preemption events during reset   Chris Wilson
• [Intel-gfx] [PATCH 07/23] drm: Make the fb refcount handover less magic   Ville Syrjala
• [Intel-gfx] [PATCH 07/23] drm: Make the fb refcount handover less magic   Daniel Vetter
• [Intel-gfx] [PATCH 07/36] drm/i915: Lift sideband locking for vlv_punit_(read|write)   Chris Wilson
• [Intel-gfx] [PATCH 08/10] drm/i915: Merge sbi read/write into a single accessor   Chris Wilson
• [Intel-gfx] [PATCH 08/11] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 08/11] drm/i915/execlists: Force preemption via reset on timeout   Tvrtko Ursulin
• [Intel-gfx] [PATCH 08/11] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 08/11] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 08/11] drm/i915/execlists: Force preemption via reset on timeout   Jeff McGee
• [Intel-gfx] [PATCH 08/11] drm/i915/execlists: Force preemption via reset on timeout   Jeff McGee
• [Intel-gfx] [PATCH 08/11] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 08/11] drm/i915/perf: add more debug message on open perf open & configs   Lionel Landwerlin
• [Intel-gfx] [PATCH 08/11] drm/i915/perf: add more debug message on open perf open & configs   Matthew Auld
• [Intel-gfx] [PATCH 08/11] drm/i915: Keep IGT PSR and frontbuffer tests functional   José Roberto de Souza
• [Intel-gfx] [PATCH 08/11] drm/i915: Move plane_state->scaler_id initialization into intel_create_plane_state()   Ville Syrjala
• [Intel-gfx] [PATCH 08/12] drm/i915/psr: Cache sink synchronization latency   José Roberto de Souza
• [Intel-gfx] [PATCH 08/12] drm/i915/psr: Cache sink synchronization latency   Rodrigo Vivi
• [Intel-gfx] [PATCH 08/12] drm/i915/psr: Cache sink synchronization latency   Souza, Jose
• [Intel-gfx] [PATCH 08/13] drm/i915/guc: Always print log stats in i915_guc_info when using GuC   Michał Winiarski
• [Intel-gfx] [PATCH 08/14] drm/i915: Check for IVB instead of gen7 when we think about IVB CPU eDP   Ville Syrjala
• [Intel-gfx] [PATCH 08/14] drm/i915: Check for IVB instead of gen7 when we think about IVB CPU eDP   Jani Nikula
• [Intel-gfx] [PATCH 08/15] drm/i915/guc: Split relay control and GuC log level   Sagar Arun Kamble
• [Intel-gfx] [PATCH 08/15] drm/i915: Combine tasklet_kill and tasklet_disable   Chris Wilson
• [Intel-gfx] [PATCH 08/17] drm/i915/breadcrumbs: Keep the fake irq armed across reset   Chris Wilson
• [Intel-gfx] [PATCH 08/17] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 08/17] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 08/18] drm/i915/selftests: Add basic sanitychecks for execlists   Chris Wilson
• [Intel-gfx] [PATCH 08/23] drm: Use plane->state->fb over plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 08/23] drm: Use plane->state->fb over plane->fb   Daniel Vetter
• [Intel-gfx] [PATCH 08/36] drm/i915: Reduce RPS update frequency on Valleyview/Cherryview   Chris Wilson
• [Intel-gfx] [PATCH 08/36] drm/i915: Reduce RPS update frequency on Valleyview/Cherryview   Sagar Arun Kamble
• [Intel-gfx] [PATCH 09/10] drm/i915: Merge sandybridge_pcode_(read|write)   Chris Wilson
• [Intel-gfx] [PATCH 09/11] drm/i915/perf: allowing opening the perf stream without sampling   Lionel Landwerlin
• [Intel-gfx] [PATCH 09/11] drm/i915/perf: allowing opening the perf stream without sampling   Matthew Auld
• [Intel-gfx] [PATCH 09/11] drm/i915/preemption: Select timeout when scheduling   Chris Wilson
• [Intel-gfx] [PATCH 09/11] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink   José Roberto de Souza
• [Intel-gfx] [PATCH 09/11] drm/i915: Introduce intel_plane_alloc()   Ville Syrjala
• [Intel-gfx] [PATCH 09/12] drm/i915/psr: Set DPCD PSR2 enable bit when needed   José Roberto de Souza
• [Intel-gfx] [PATCH 09/12] drm/i915/psr: Set DPCD PSR2 enable bit when needed   Rodrigo Vivi
• [Intel-gfx] [PATCH 09/14] drm/i915: Move intel_ddi_get_crtc_new_encoder() out from ddi code   Ville Syrjala
• [Intel-gfx] [PATCH 09/14] drm/i915: Move intel_ddi_get_crtc_new_encoder() out from ddi code   Jani Nikula
• [Intel-gfx] [PATCH 09/15] drm/i915/guc: Move check for fast memcpy_wc to relay creation   Sagar Arun Kamble
• [Intel-gfx] [PATCH 09/15] drm/i915/guc: Move check for fast memcpy_wc to relay creation   Chris Wilson
• [Intel-gfx] [PATCH 09/15] drm/i915: Stop parking the signaler around reset   Chris Wilson
• [Intel-gfx] [PATCH 09/17] drm/i915: Combine tasklet_kill and tasklet_disable   Chris Wilson
• [Intel-gfx] [PATCH 09/18] drm/i915/breadcrumbs: Keep the fake irq armed across reset   Chris Wilson
• [Intel-gfx] [PATCH 09/23] drm/i915: Stop consulting plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 09/36] Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"   Chris Wilson
• [Intel-gfx] [patch 1/1] drivers/gpu/drm/i915/intel_guc_log.c: work around gcc-4.4.4 union initializer issue   Jani Nikula
• [Intel-gfx] [patch 1/1] drivers/gpu/drm/i915/intel_guc_log.c: work around gcc-4.4.4 union initializer issue   Andrew Morton
• [Intel-gfx] [PATCH 1/1] drm/i915/guc: s/intel_guc_fw_upload/intel_guc_init_hw/   Sagar Arun Kamble
• [Intel-gfx] [PATCH 1/1] drm/i915/guc: s/intel_guc_fw_upload/intel_guc_init_hw/   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/1] drm/i915/guc: s/intel_guc_fw_upload/intel_guc_init_hw/   Sagar Arun Kamble
• [Intel-gfx] [PATCH 1/1] drm/i915/guc: s/intel_guc_fw_upload/intel_guc_init_hw/   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/1] drm/i915: move audio component intialization before audio driver use it   Yang
• [Intel-gfx] [PATCH 1/1] drm/i915: move audio component intialization before audio driver use it   Chris Wilson
• [Intel-gfx] [PATCH 1/1] drm/i915: move audio component intialization before audio driver use it   Jani Nikula
• [Intel-gfx] [PATCH 1/1] intel: align reuse buffer's size on page size instead   James Xiong
• [Intel-gfx] [PATCH 1/1] intel: align reuse buffer's size on page size instead   Chris Wilson
• [Intel-gfx] [PATCH 1/1] intel: align reuse buffer's size on page size instead   Xiong, James
• [Intel-gfx] [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper   Jani Nikula
• [Intel-gfx] [PATCH 1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list   Joonas Lahtinen
• [Intel-gfx] [PATCH 1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Mika Kuoppala
• [Intel-gfx] [PATCH 1/2] drm/i915/debugfs: Print sink PSR status   José Roberto de Souza
• [Intel-gfx] [PATCH 1/2] drm/i915/psr: Move PSR aux setup to it's own function.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 1/2] drm/i915/psr: Move PSR aux setup to it's own function.   Rodrigo Vivi
• [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Include the trace as a debug aide   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Ville Syrjälä
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Jackie Li
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Michał Winiarski
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Yaodong Li
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Michał Winiarski
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Joonas Lahtinen
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Michał Winiarski
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Yaodong Li
• [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values   Joonas Lahtinen
• [Intel-gfx] [PATCH 1/2] drm/i915: Avoid setting ring freq on invalid rps freqs   Mika Kuoppala
• [Intel-gfx] [PATCH 1/2] drm/i915: Avoid setting ring freq on invalid rps freqs   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Avoid setting ring freq on invalid rps freqs   Mika Kuoppala
• [Intel-gfx] [PATCH 1/2] drm/i915: Only call finish_reset after a prepare_reset   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Jani Nikula
• [Intel-gfx] [PATCH 1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Jani Nikula
• [Intel-gfx] [PATCH 1/2] drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Remove variable length arrays from sseu debugfs printers   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Remove variable length arrays from sseu debugfs printers   Tvrtko Ursulin
• [Intel-gfx] [PATCH 1/2] drm/i915: Remove variable length arrays from sseu debugfs printers   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Specify which engines to reset following semaphore/event lockups   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Specify which engines to reset following semaphore/event lockups   Michel Thierry
• [Intel-gfx] [PATCH 1/2] drm/i915: Stop engines around GPU reset preparations   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Stop engines around GPU reset preparations   Mika Kuoppala
• [Intel-gfx] [PATCH 1/2] drm/i915: Stop engines around GPU reset preparations   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Stop engines around GPU reset preparations   Mika Kuoppala
• [Intel-gfx] [PATCH 1/2] drm/i915: Stop engines around GPU reset preparations   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Stop kicking the signaling thread on seqno wraparound   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Stop kicking the signaling thread on seqno wraparound   Joonas Lahtinen
• [Intel-gfx] [PATCH 1/2] drm/i915: Trace GEM steps between submit and wedging   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Trace GEM steps between submit and wedging   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: use engine->irq_keep_mask when resetting irqs   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 1/2] drm/i915: use engine->irq_keep_mask when resetting irqs   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/i915: Use full serialisation around engine->irq_posted   Chris Wilson
• [Intel-gfx] [PATCH 1/2] drm/simple-kms-helper: Plumb plane state to the enable hook   Ville Syrjala
• [Intel-gfx] [PATCH 1/2] drm/simple-kms-helper: Plumb plane state to the enable hook   David Lechner
• [Intel-gfx] [PATCH 1/2] drm/simple-kms-helper: Plumb plane state to the enable hook   Ville Syrjälä
• [Intel-gfx] [PATCH 1/2] drm/simple-kms-helper: Plumb plane state to the enable hook   David Lechner
• [Intel-gfx] [PATCH 1/2] linux-firmware/guc/cnl: Load GuC on Cannonlake   Anusha Srivatsa
• [Intel-gfx] [PATCH 1/3] drm/i915/cnl; Add macro to get PORT_TX register   Mahesh Kumar
• [Intel-gfx] [PATCH 1/3] drm/i915/cnl; Add macro to get PORT_TX register   Rodrigo Vivi
• [Intel-gfx] [PATCH 1/3] drm/i915/cnl; Add macro to get PORT_TX register   Lucas De Marchi
• [Intel-gfx] [PATCH 1/3] drm/i915/cnl; Add macro to get PORT_TX register   Kumar, Mahesh
• [Intel-gfx] [PATCH 1/3] drm/i915/error: remove unused gen8_engine_sync_index   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 1/3] drm/i915/error: remove unused gen8_engine_sync_index   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915/execlists: Reset ring registers on rebinding contexts   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915/execlists: Reset ring registers on rebinding contexts   Mika Kuoppala
• [Intel-gfx] [PATCH 1/3] drm/i915/uc: Sanitize uC options early   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/3] drm/i915/uc: Sanitize uC options early   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915: Improve PSR activation timing   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/3] drm/i915: Reorder early initialization   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/3] drm/i915: Reorder early initialization   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915: Reorder early initialization   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/3] drm/i915: Trim error mask to known engines   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915: Trim error mask to known engines   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915: Trim error mask to known engines   Michel Thierry
• [Intel-gfx] [PATCH 1/3] drm/i915: Trim error mask to known engines   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm/i915: Trim error mask to known engines   Chris Wilson
• [Intel-gfx] [PATCH 1/3] drm: Add the optional .fb_modifier() hook   Ville Syrjala
• [Intel-gfx] [PATCH 1/3] drm: Don't create properties without names   Ville Syrjala
• [Intel-gfx] [PATCH 1/3] drm: Don't create properties without names   Daniel Vetter
• [Intel-gfx] [PATCH 1/3] drm: Don't create properties without names   Emil Velikov
• [Intel-gfx] [PATCH 1/3] drm: Don't create properties without names   Ville Syrjälä
• [Intel-gfx] [PATCH 1/3] drm: Don't create properties without names   Emil Velikov
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Ville Syrjala
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Eric Anholt
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Ville Syrjälä
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Alex Deucher
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Harry Wentland
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Eric Anholt
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Ville Syrjälä
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Daniel Vetter
• [Intel-gfx] [PATCH 1/3] drm: Make sure at least one plane supports the fb format   Harry Wentland
• [Intel-gfx] [PATCH 1/3] drm: Nuke the useless 'ret' variable from drm_mode_convert_umode()   Ville Syrjala
• [Intel-gfx] [PATCH 1/3] drm: Nuke the useless 'ret' variable from drm_mode_convert_umode()   Daniel Vetter
• [Intel-gfx] [PATCH 1/3] drm: prefer inline over __inline__   Jani Nikula
• [Intel-gfx] [PATCH 1/4] drm/i915/selftests: Include the trace as a debug aide   Chris Wilson
• [Intel-gfx] [PATCH 1/4] drm/i915: Make header i915_pmu.h more robust   Michal Wajdeczko
• [Intel-gfx] [PATCH 1/4] drm/i915: Make header i915_pmu.h more robust   Tvrtko Ursulin
• [Intel-gfx] [PATCH 1/4] drm/i915: Use intel_fb_obj() everywhere   Daniel Stone
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Daniel Vetter
• [Intel-gfx] [PATCH 1/4] drm/uapi: The ctm matrix uses sign-magnitude representation   Harry Wentland
• [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()   Chris Wilson
• [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()   Michel Thierry
• [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()   Chris Wilson
• [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()   Michel Thierry
• [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()   Chris Wilson
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Ville Syrjälä
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Ville Syrjälä
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Ville Syrjälä
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Rodrigo Vivi
• [Intel-gfx] [PATCH 1/5] drm/i915: Enable edp psr error interrupts on hsw   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 1/5] drm/i915: Stop engines around GPU reset preparations   Chris Wilson
• [Intel-gfx] [PATCH 1/5] drm/i915: Stop engines around GPU reset preparations   Chris Wilson
• [Intel-gfx] [PATCH 1/6] drm/i915/icl: Ringbuffer interrupt handling   Mika Kuoppala
• [Intel-gfx] [PATCH 1/6] drm/i915/psr: Nuke aux_frame_sync   José Roberto de Souza
• [Intel-gfx] [PATCH 1/6] drm/i915/psr: Nuke aux_frame_sync   Rodrigo Vivi
• [Intel-gfx] [PATCH 1/6] drm/i915: Finish the wait-for-wedge by retiring all the inflight requests   Chris Wilson
• [Intel-gfx] [PATCH 1/6] drm/i915: Finish the wait-for-wedge by retiring all the inflight requests   Mika Kuoppala
• [Intel-gfx] [PATCH 1/6] drm/i915: Remove unused DP_LINK_CHECK_TIMEOUT   Lyude Paul
• [Intel-gfx] [PATCH 1/6] drm/i915: Remove unused DP_LINK_CHECK_TIMEOUT   Manasi Navare
• [Intel-gfx] [PATCH 1/6] drm: Reject replacing property enum values   Ville Syrjala
• [Intel-gfx] [PATCH 1/6] drm: Reject replacing property enum values   Daniel Vetter
• [Intel-gfx] [PATCH 1/6] Revert "drm/atomic-helper: Fix leak in disable_all"   Ville Syrjala
• [Intel-gfx] [PATCH 1/6] Revert "drm/atomic-helper: Fix leak in disable_all"   Daniel Vetter
• [Intel-gfx] [PATCH 1/6] Revert "drm/atomic-helper: Fix leak in disable_all"   Ville Syrjälä
• [Intel-gfx] [PATCH 1/7] drm/i915/icl: Add register definitions for Combo PHY vswing sequences.   Paulo Zanoni
• [Intel-gfx] [PATCH 1/7] drm/i915/pmu: Fix enable count array size and bounds checking   Tvrtko Ursulin
• [Intel-gfx] [PATCH 1/7] drm/i915: move dpll_info to header   Lucas De Marchi
• [Intel-gfx] [PATCH 1/7] drm/i915: move dpll_info to header   Ville Syrjälä
• [Intel-gfx] [PATCH 1/7] drm/i915: move dpll_info to header   Lucas De Marchi
• [Intel-gfx] [PATCH 1/7] drm/i915: move dpll_info to header   Ville Syrjälä
• [Intel-gfx] [PATCH 1/7] drm/i915: move dpll_info to header   Lucas De Marchi
• [Intel-gfx] [PATCH 1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Michał Winiarski
• [Intel-gfx] [PATCH 1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Joonas Lahtinen
• [Intel-gfx] [PATCH 1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Joonas Lahtinen
• [Intel-gfx] [PATCH 1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Michał Winiarski
• [Intel-gfx] [PATCH 1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Mika Kuoppala
• [Intel-gfx] [PATCH 1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Sagar Arun Kamble
• [Intel-gfx] [PATCH 1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Lionel Landwerlin
• [Intel-gfx] [PATCH 1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Paulo Zanoni
• [Intel-gfx] [PATCH 1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Paulo Zanoni
• [Intel-gfx] [PATCH 1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Lionel Landwerlin
• [Intel-gfx] [PATCH 1/8] drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL   Paulo Zanoni
• [Intel-gfx] [PATCH 1/9] cpufreq: Implement infrastructure keeping track of aggregated IO active time.   Francisco Jerez
• [Intel-gfx] [PATCH 10/10] drm/i915: Move sandybride pcode access to intel_sideband.c   Chris Wilson
• [Intel-gfx] [PATCH 10/11] drm/i915/perf: limit OA buffer size to minimum when unread   Lionel Landwerlin
• [Intel-gfx] [PATCH 10/11] drm/i915/perf: limit OA buffer size to minimum when unread   Lionel Landwerlin
• [Intel-gfx] [PATCH 10/11] drm/i915/psr: Handle PSR RFB storage error   José Roberto de Souza
• [Intel-gfx] [PATCH 10/11] drm/i915: Extract skl_universal_plane_init()   Ville Syrjala
• [Intel-gfx] [PATCH 10/11] drm/i915: Use a preemption timeout to enforce interactivity   Chris Wilson
• [Intel-gfx] [PATCH 10/11] drm/i915: Use a preemption timeout to enforce interactivity   Tvrtko Ursulin
• [Intel-gfx] [PATCH 10/11] drm/i915: Use a preemption timeout to enforce interactivity   Chris Wilson
• [Intel-gfx] [PATCH 10/11] drm/i915: Use a preemption timeout to enforce interactivity   Tvrtko Ursulin
• [Intel-gfx] [PATCH 10/12] drm/i915/debugfs: Print sink PSR state and debug info   José Roberto de Souza
• [Intel-gfx] [PATCH 10/12] drm/i915/debugfs: Print sink PSR state and debug info   Rodrigo Vivi
• [Intel-gfx] [PATCH 10/12] drm/i915/debugfs: Print sink PSR state and debug info   Souza, Jose
• [Intel-gfx] [PATCH 10/12] drm/i915/debugfs: Print sink PSR state and debug info   Rodrigo Vivi
• [Intel-gfx] [PATCH 10/12] drm/i915/debugfs: Print sink PSR state and debug info   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 10/14] drm/i915: Parametrize TRANS_DP_PORT_SEL   Ville Syrjala
• [Intel-gfx] [PATCH 10/14] drm/i915: Parametrize TRANS_DP_PORT_SEL   Jani Nikula
• [Intel-gfx] [PATCH 10/15] drm/i915/guc: Get rid of GuC log runtime   Sagar Arun Kamble
• [Intel-gfx] [PATCH 10/15] drm/i915/guc: Get rid of GuC log runtime   Chris Wilson
• [Intel-gfx] [PATCH 10/15] drm/i915: Avoid sleeping inside per-engine reset   Chris Wilson
• [Intel-gfx] [PATCH 10/15] drm/i915: Avoid sleeping inside per-engine reset   Michel Thierry
• [Intel-gfx] [PATCH 10/15] drm/i915: Avoid sleeping inside per-engine reset   Chris Wilson
• [Intel-gfx] [PATCH 10/15] drm/i915: Avoid sleeping inside per-engine reset   Michel Thierry
• [Intel-gfx] [PATCH 10/17] drm/i915: Stop parking the signaler around reset   Chris Wilson
• [Intel-gfx] [PATCH 10/18] drm/i915: Combine tasklet_kill and tasklet_disable   Chris Wilson
• [Intel-gfx] [PATCH 10/23] drm/msm: Stop consulting plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 10/36] drm/i915: Replace pcu_lock with sb_lock   Chris Wilson
• [Intel-gfx] [PATCH 10/36] drm/i915: Replace pcu_lock with sb_lock   Sagar Arun Kamble
• [Intel-gfx] [PATCH 11/11] drm/i915/perf: remove redundant oa buffer initialization   Lionel Landwerlin
• [Intel-gfx] [PATCH 11/11] drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side   José Roberto de Souza
• [Intel-gfx] [PATCH 11/11] drm/i915: Allow user control over preempt timeout on the important context   Chris Wilson
• [Intel-gfx] [PATCH 11/11] drm/i915: Allow user control over preempt timeout on the important context   Tvrtko Ursulin
• [Intel-gfx] [PATCH 11/11] drm/i915: Allow user control over preempt timeout on the important context   Chris Wilson
• [Intel-gfx] [PATCH 11/11] drm/i915: Allow user control over preempt timeout on the important context   Chris Wilson
• [Intel-gfx] [PATCH 11/11] drm/i915: s/intel_plane/plane/ in sprite init   Ville Syrjala
• [Intel-gfx] [PATCH 11/12] drm/i915/debugfs: Print information about what caused a PSR exit   José Roberto de Souza
• [Intel-gfx] [PATCH 11/12] drm/i915/debugfs: Print information about what caused a PSR exit   Rodrigo Vivi
• [Intel-gfx] [PATCH 11/12] drm/i915/debugfs: Print information about what caused a PSR exit   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 11/12] drm/i915/debugfs: Print information about what caused a PSR exit   Souza, Jose
• [Intel-gfx] [PATCH 11/12] drm/i915/debugfs: Print information about what caused a PSR exit   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 11/14] drm/i915: Nuke intel_trans_dp_port_sel()   Ville Syrjala
• [Intel-gfx] [PATCH 11/15] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 11/15] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 11/15] drm/i915/guc: Always print log stats in i915_guc_info when using GuC   Sagar Arun Kamble
• [Intel-gfx] [PATCH 11/15] drm/i915/guc: Always print log stats in i915_guc_info when using GuC   Michał Winiarski
• [Intel-gfx] [PATCH 11/17] drm/i915/icl: Implement voltage swing programming sequence for MG PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 11/17] drm/i915: Be irqsafe inside reset   Chris Wilson
• [Intel-gfx] [PATCH 11/18] drm/i915: Stop parking the signaler around reset   Chris Wilson
• [Intel-gfx] [PATCH 11/23] drm/sti: Stop consulting plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 11/23] drm/sti: Stop consulting plane->fb   Benjamin Gaignard
• [Intel-gfx] [PATCH 11/36] drm/i915: Separate sideband declarations to intel_sideband.h   Chris Wilson
• [Intel-gfx] [PATCH 12/12] drm/i915/debugfs: Print how many blocks were sent in a selective update   José Roberto de Souza
• [Intel-gfx] [PATCH 12/12] drm/i915/debugfs: Print how many blocks were sent in a selective update   Rodrigo Vivi
• [Intel-gfx] [PATCH 12/12] drm/i915/debugfs: Print how many blocks were sent in a selective update   Souza, Jose
• [Intel-gfx] [PATCH 12/13] drm/i915/guc: Demote GuC error messages   Michał Winiarski
• [Intel-gfx] [PATCH 12/13] drm/i915/guc: Demote GuC error messages   Chris Wilson
• [Intel-gfx] [PATCH 12/14] drm/i915: Clean up DP pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH 12/15] drm/i915/execlists: Try preempt-reset from softirq context   Chris Wilson
• [Intel-gfx] [PATCH 12/15] drm/i915/guc: Don't print out relay statistics when relay is disabled   Sagar Arun Kamble
• [Intel-gfx] [PATCH 12/15] drm/i915/guc: Don't print out relay statistics when relay is disabled   Michał Winiarski
• [Intel-gfx] [PATCH 12/15] drm/i915/guc: Don't print out relay statistics when relay is disabled   Sagar Arun Kamble
• [Intel-gfx] [PATCH 12/17] drm/i915: Allow init_breadcrumbs to be used from irq context   Chris Wilson
• [Intel-gfx] [PATCH 12/18] drm/i915: Be irqsafe inside reset   Chris Wilson
• [Intel-gfx] [PATCH 12/23] drm/vmwgfx: Stop consulting plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 12/23] drm/vmwgfx: Stop consulting plane->fb   Thomas Hellstrom
• [Intel-gfx] [PATCH 12/36] drm/i915: Merge sbi read/write into a single accessor   Chris Wilson
• [Intel-gfx] [PATCH 12/36] drm/i915: Merge sbi read/write into a single accessor   Sagar Arun Kamble
• [Intel-gfx] [PATCH 13/13] HAX enable guc for CI   Michał Winiarski
• [Intel-gfx] [PATCH 13/14] drm/i915: Allow eDP on port C in theory   Ville Syrjala
• [Intel-gfx] [PATCH 13/15] drm/i915/guc: Allow user to control default GuC logging   Sagar Arun Kamble
• [Intel-gfx] [PATCH 13/15] drm/i915/preemption: Select timeout when scheduling   Chris Wilson
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Ville Syrjälä
• [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane   Srinivas, Vidya
• [Intel-gfx] [PATCH 13/17] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 13/18] drm/i915: Allow init_breadcrumbs to be used from irq context   Chris Wilson
• [Intel-gfx] [PATCH 13/23] drm/zte: Stop consulting plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 13/23] drm/zte: Stop consulting plane->fb   Maarten Lankhorst
• [Intel-gfx] [PATCH 13/36] drm/i915: Merge sandybridge_pcode_(read|write)   Chris Wilson
• [Intel-gfx] [PATCH 13/36] drm/i915: Merge sandybridge_pcode_(read|write)   Imre Deak
• [Intel-gfx] [PATCH 14/14] drm/i915: Implement the missing bits of assert_panel_unlocked()   Ville Syrjala
• [Intel-gfx] [PATCH 14/15] drm/i915/guc: Default to non-verbose GuC logging   Sagar Arun Kamble
• [Intel-gfx] [PATCH 14/15] drm/i915: Use a preemption timeout to enforce interactivity   Chris Wilson
• [Intel-gfx] [PATCH 14/17] drm/i915/execlists: Try preempt-reset from softirq context   Chris Wilson
• [Intel-gfx] [PATCH 14/17] drm/i915/icl: Calculate link clock using the new registers   Paulo Zanoni
• [Intel-gfx] [PATCH 14/18] drm/i915/execlists: Force preemption via reset on timeout   Chris Wilson
• [Intel-gfx] [PATCH 14/23] drm/atmel-hlcdc: Stop using plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 14/23] drm/atmel-hlcdc: Stop using plane->fb   Maarten Lankhorst
• [Intel-gfx] [PATCH 14/23] drm/atmel-hlcdc: Stop using plane->fb   Ville Syrjälä
• [Intel-gfx] [PATCH 14/23] drm/atmel-hlcdc: Stop using plane->fb   Daniel Vetter
• [Intel-gfx] [PATCH 14/36] drm/i915: Move sandybride pcode access to intel_sideband.c   Chris Wilson
• [Intel-gfx] [PATCH 15/15] drm/i915: Allow user control over preempt timeout on the important context   Chris Wilson
• [Intel-gfx] [PATCH 15/15] HAX enable guc for CI   Michał Winiarski
• [Intel-gfx] [PATCH 15/17] drm/i915/preemption: Select timeout when scheduling   Chris Wilson
• [Intel-gfx] [PATCH 15/18] drm/i915/execlists: Try preempt-reset from softirq context   Chris Wilson
• [Intel-gfx] [PATCH 15/23] drm: Stop updating plane->crtc/fb/old_fb on atomic drivers   Ville Syrjala
• [Intel-gfx] [PATCH 15/23] drm: Stop updating plane->crtc/fb/old_fb on atomic drivers   Daniel Vetter
• [Intel-gfx] [PATCH 15/23] drm: Stop updating plane->crtc/fb/old_fb on atomic drivers   Daniel Vetter
• [Intel-gfx] [PATCH 15/23] drm: Stop updating plane->crtc/fb/old_fb on atomic drivers   Daniel Vetter
• [Intel-gfx] [PATCH 15/23] drm: Stop updating plane->crtc/fb/old_fb on atomic drivers   Ville Syrjälä
• [Intel-gfx] [PATCH 15/36] drm/i915: Mark up Ironlake ips with rpm wakerefs   Chris Wilson
• [Intel-gfx] [PATCH 15/36] drm/i915: Mark up Ironlake ips with rpm wakerefs   Sagar Arun Kamble
• [Intel-gfx] [PATCH 15/36] drm/i915: Mark up Ironlake ips with rpm wakerefs   Sagar Arun Kamble
• [Intel-gfx] [PATCH 16/17] drm/i915: Use a preemption timeout to enforce interactivity   Chris Wilson
• [Intel-gfx] [PATCH 16/18] drm/i915/preemption: Select timeout when scheduling   Chris Wilson
• [Intel-gfx] [PATCH 16/23] drm/amdgpu/dc: Stop updating plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 16/23] drm/amdgpu/dc: Stop updating plane->fb   Harry Wentland
• [Intel-gfx] [PATCH 16/36] drm/i915: Record logical context support in driver caps   Chris Wilson
• [Intel-gfx] [PATCH 17/17] drm/i915/icl: Fix the DP Max Voltage for ICL   Rodrigo Vivi
• [Intel-gfx] [PATCH 17/17] drm/i915: Allow user control over preempt timeout on their important context   Chris Wilson
• [Intel-gfx] [PATCH 17/18] drm/i915: Use a preemption timeout to enforce interactivity   Chris Wilson
• [Intel-gfx] [PATCH 17/23] drm/i915: Stop updating plane->fb/crtc   Ville Syrjala
• [Intel-gfx] [PATCH 17/36] drm/i915: Generalize i915_gem_sanitize() to reset contexts   Chris Wilson
• [Intel-gfx] [PATCH 18/18] drm/i915: Allow user control over preempt timeout on their important context   Chris Wilson
• [Intel-gfx] [PATCH 18/23] drm/exynos: Stop updating plane->crtc   Ville Syrjala
• [Intel-gfx] [PATCH 18/36] drm/i915: Enable render context support for Ironlake (gen5)   Chris Wilson
• [Intel-gfx] [PATCH 19/23] drm/msm: Stop updating plane->fb/crtc   Ville Syrjala
• [Intel-gfx] [PATCH 19/36] drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH 2/2] drm/i915/breadcrumbs: Assert all missed breadcrumbs were signaled   Joonas Lahtinen
• [Intel-gfx] [PATCH 2/2] drm/i915/icl: Enable 2nd DBuf slice only when needed   Mahesh Kumar
• [Intel-gfx] [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP   José Roberto de Souza
• [Intel-gfx] [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 2/2] drm/i915/psr/cnl: Set y-coordinate as valid in SDP   Souza, Jose
• [Intel-gfx] [PATCH 2/2] drm/i915/psr: Remove open-coded PSR AUX transactions for SKL+   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 2/2] drm/i915/psr: Remove open-coded PSR AUX transactions for SKL+   Souza, Jose
• [Intel-gfx] [PATCH 2/2] drm/i915/psr: Remove open-coded PSR AUX transactions for SKL+   Rodrigo Vivi
• [Intel-gfx] [PATCH 2/2] drm/i915/selftests: Stress resets-vs-request-priority   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915/stolen: Intepret reserved_base=0 as deduce from top   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915/stolen: Intepret reserved_base=0 as deduce from top   Ville Syrjälä
• [Intel-gfx] [PATCH 2/2] drm/i915: Add control flags to i915_handle_error()   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Add control flags to i915_handle_error()   Michel Thierry
• [Intel-gfx] [PATCH 2/2] drm/i915: Add control flags to i915_handle_error()   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Always assume the GPU reset occurs   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Flush pending interrupt following a GPU reset   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Flush waiters on seqno wraparound   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Flush waiters on seqno wraparound   Joonas Lahtinen
• [Intel-gfx] [PATCH 2/2] drm/i915: hint gen and gen_mask shouldn't be used directly   Jani Nikula
• [Intel-gfx] [PATCH 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH 2/2] drm/i915: move gen8 irq shifts to intel_lrc.c   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 2/2] drm/i915: move gen8 irq shifts to intel_lrc.c   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Stop engines when declaring the machine wedged   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Suspend submission tasklets around wedging   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Suspend submission tasklets around wedging   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Suspend submission tasklets around wedging   Mika Kuoppala
• [Intel-gfx] [PATCH 2/2] drm/i915: Trim gen11_gt_irq_handler   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Warn against variable length arrays   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/i915: Warn against variable length arrays   Jani Nikula
• [Intel-gfx] [PATCH 2/2] drm/i915: Warn if rps max frequency is not set   Mika Kuoppala
• [Intel-gfx] [PATCH 2/2] drm/i915: Warn if rps max frequency is not set   Mika Kuoppala
• [Intel-gfx] [PATCH 2/2] drm/i915: Warn if rps max frequency is not set   Chris Wilson
• [Intel-gfx] [PATCH 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Ville Syrjala
• [Intel-gfx] [PATCH 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Noralf Trønnes
• [Intel-gfx] [PATCH 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Ville Syrjälä
• [Intel-gfx] [PATCH 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Noralf Trønnes
• [Intel-gfx] [PATCH 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Ville Syrjälä
• [Intel-gfx] [PATCH 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Ville Syrjälä
• [Intel-gfx] [PATCH 2/2] HAX enable guc for CI   Jackie Li
• [Intel-gfx] [PATCH 2/2] linux-firmware/huc/cnl: Load HuC on Cannonlake   Anusha Srivatsa
• [Intel-gfx] [PATCH 2/3] drm/i915/cnl: Replace PORT_TX register macros with new ones   Mahesh Kumar
• [Intel-gfx] [PATCH 2/3] drm/i915/error: standardize function style in error capture   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 2/3] drm/i915/error: standardize function style in error capture   Michal Wajdeczko
• [Intel-gfx] [PATCH 2/3] drm/i915/error: standardize function style in error capture   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915/error: standardize function style in error capture   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915/execlists: Delay updating ring register state after resume   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915/execlists: Delay updating ring register state after resume   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915/uc: Fetch uC firmware in init_early   Michal Wajdeczko
• [Intel-gfx] [PATCH 2/3] drm/i915/uc: Fetch uC firmware in init_early   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915/uc: Sanitize uC together with GEM   Michal Wajdeczko
• [Intel-gfx] [PATCH 2/3] drm/i915/uc: Sanitize uC together with GEM   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915/uc: Sanitize uC together with GEM   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 2/3] drm/i915/uc: Sanitize uC together with GEM   Sagar Arun Kamble
• [Intel-gfx] [PATCH 2/3] drm/i915: Add control flags to i915_handle_error()   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915: Add control flags to i915_handle_error()   Michel Thierry
• [Intel-gfx] [PATCH 2/3] drm/i915: Add control flags to i915_handle_error()   Chris Wilson
• [Intel-gfx] [PATCH 2/3] drm/i915: Eliminate the horrendous format check code   Ville Syrjala
• [Intel-gfx] [PATCH 2/3] drm: Check property/enum name length   Ville Syrjala
• [Intel-gfx] [PATCH 2/3] drm: Make drm_mode_vrefresh() a bit more accurate   Ville Syrjala
• [Intel-gfx] [PATCH 2/3] drm: Make drm_mode_vrefresh() a bit more accurate   Daniel Vetter
• [Intel-gfx] [PATCH 2/3] drm: Make drm_mode_vrefresh() a bit more accurate   Ville Syrjälä
• [Intel-gfx] [PATCH 2/3] drm: Make drm_mode_vrefresh() a bit more accurate   Ville Syrjälä
• [Intel-gfx] [PATCH 2/3] drm: Make sure at least one plane supports the fb format   Ville Syrjala
• [Intel-gfx] [PATCH 2/3] drm: Make sure at least one plane supports the fb format   Eric Anholt
• [Intel-gfx] [PATCH 2/3] drm: Make sure at least one plane supports the fb format   Ville Syrjälä
• [Intel-gfx] [PATCH 2/3] drm: Make sure at least one plane supports the fb format   Ville Syrjälä
• [Intel-gfx] [PATCH 2/3] drm: Make sure at least one plane supports the fb format   Ville Syrjälä
• [Intel-gfx] [PATCH 2/3] drm: Make sure at least one plane supports the fb format   Eric Anholt
• [Intel-gfx] [PATCH 2/3] drm: remove old documentation comment cruft from drmP.h   Jani Nikula
• [Intel-gfx] [PATCH 2/4] drm/i915/selftests: Stress resets-vs-request-priority   Chris Wilson
• [Intel-gfx] [PATCH 2/4] drm/i915: Change parameters order in i915_gem_batch_pool_init   Michal Wajdeczko
• [Intel-gfx] [PATCH 2/4] drm/i915: Change parameters order in i915_gem_batch_pool_init   Chris Wilson
• [Intel-gfx] [PATCH 2/4] drm/i915: Change parameters order in i915_gem_batch_pool_init   Michal Wajdeczko
• [Intel-gfx] [PATCH 2/4] drm/i915: Move GEM BO inside drm_framebuffer   Daniel Stone
• [Intel-gfx] [PATCH 2/4] drm/i915: Move GEM BO inside drm_framebuffer   Ville Syrjälä
• [Intel-gfx] [PATCH 2/4] drm/i915: Move GEM BO inside drm_framebuffer   Daniel Stone
• [Intel-gfx] [PATCH 2/5] drm/i915/execlists: Refactor out complete_preempt_context()   Chris Wilson
• [Intel-gfx] [PATCH 2/5] drm/i915/execlists: Refactor out complete_preempt_context()   Jeff McGee
• [Intel-gfx] [PATCH 2/5] drm/i915/psr: Use more PSR HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 2/5] drm/i915: Drop reg_write from the PSR mask   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 2/5] drm/i915: Suspend submission tasklets around wedging   Chris Wilson
• [Intel-gfx] [PATCH 2/5] drm/i915: Suspend submission tasklets around wedging   Mika Kuoppala
• [Intel-gfx] [PATCH 2/6] drm/atomic-helper: Make drm_atomic_helper_disable_all() update the plane->fb pointers   Ville Syrjala
• [Intel-gfx] [PATCH 2/6] drm/i915/icl: Correctly initialize the Gen11 engines   Mika Kuoppala
• [Intel-gfx] [PATCH 2/6] drm/i915/icl: Correctly initialize the Gen11 engines   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 2/6] drm/i915/icl: Correctly initialize the Gen11 engines   Tvrtko Ursulin
• [Intel-gfx] [PATCH 2/6] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   José Roberto de Souza
• [Intel-gfx] [PATCH 2/6] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   Rodrigo Vivi
• [Intel-gfx] [PATCH 2/6] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   Souza, Jose
• [Intel-gfx] [PATCH 2/6] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   Rodrigo Vivi
• [Intel-gfx] [PATCH 2/6] drm/i915: Move DP modeset retry work into intel_dp   Lyude Paul
• [Intel-gfx] [PATCH 2/6] drm/i915: Reset ring space estimate after unwinding the request   Chris Wilson
• [Intel-gfx] [PATCH 2/6] drm/i915: Reset ring space estimate after unwinding the request   Mika Kuoppala
• [Intel-gfx] [PATCH 2/6] drm/i915: Reset ring space estimate after unwinding the request   Chris Wilson
• [Intel-gfx] [PATCH 2/6] drm/i915: Reset ring space estimate after unwinding the request   Chris Wilson
• [Intel-gfx] [PATCH 2/6] drm: Remove now pointelss blob->data casts   Sharma, Shashank
• [Intel-gfx] [PATCH 2/6] drm: WARN when trying add enum values to non-enum/bitmask properties   Ville Syrjala
• [Intel-gfx] [PATCH 2/6] drm: WARN when trying add enum values to non-enum/bitmask properties   Daniel Vetter
• [Intel-gfx] [PATCH 2/7] drm/i915/icl: Add Combo PHY DDI Buffer translation tables for Icelake.   Paulo Zanoni
• [Intel-gfx] [PATCH 2/7] drm/i915: embed dpll_info inside intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU   Tvrtko Ursulin
• [Intel-gfx] [PATCH 2/8] drm/i915/guc: Move FW size sanity check back to fetch   Michał Winiarski
• [Intel-gfx] [PATCH 2/8] drm/i915/icl: add definitions for the ICL PLL registers   Paulo Zanoni
• [Intel-gfx] [PATCH 2/8] drm/i915/icl: Enable the extra video decode and enhancement boxes for Icelake 11   Mika Kuoppala
• [Intel-gfx] [PATCH 2/8] drm: Add BT.2020 constant luminance enum value for the COLOR_ENCODING property   Ville Syrjälä
• [Intel-gfx] [PATCH 2/9] Revert "cpufreq: intel_pstate: Replace bxt_funcs with core_funcs"   Francisco Jerez
• [Intel-gfx] [PATCH 20/23] drm/virtio: Stop updating plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH 20/23] drm/virtio: Stop updating plane->fb   Gerd Hoffmann
• [Intel-gfx] [PATCH 20/36] drm/i915: Remove obsolete min/max freq setters from debugfs   Chris Wilson
• [Intel-gfx] [PATCH 20/36] drm/i915: Remove obsolete min/max freq setters from debugfs   Sagar Arun Kamble
• [Intel-gfx] [PATCH 21/23] drm/vc4: Stop updating plane->fb/crtc   Ville Syrjala
• [Intel-gfx] [PATCH 21/23] drm/vc4: Stop updating plane->fb/crtc   Maarten Lankhorst
• [Intel-gfx] [PATCH 21/36] drm/i915: Split GT powermanagement functions to intel_gt_pm.c   Chris Wilson
• [Intel-gfx] [PATCH 21/36] drm/i915: Split GT powermanagement functions to intel_gt_pm.c   Sagar Arun Kamble
• [Intel-gfx] [PATCH 21/36] drm/i915: Split GT powermanagement functions to intel_gt_pm.c   Sagar Arun Kamble
• [Intel-gfx] [PATCH 22/23] drm/i915: Restore planes after load detection   Ville Syrjala
• [Intel-gfx] [PATCH 22/36] drm/i915: Move rps worker to intel_gt_pm.c   Chris Wilson
• [Intel-gfx] [PATCH 22/36] drm/i915: Move rps worker to intel_gt_pm.c   Sagar Arun Kamble
• [Intel-gfx] [PATCH 23/23] drm/i915: Make force_load_detect effective even w/ DMI quirks/hotplug   Ville Syrjala
• [Intel-gfx] [PATCH 23/23] drm/i915: Make force_load_detect effective even w/ DMI quirks/hotplug   Maarten Lankhorst
• [Intel-gfx] [PATCH 23/36] drm/i915: Move all the RPS irq handlers to intel_gt_pm   Chris Wilson
• [Intel-gfx] [PATCH 23/36] drm/i915: Move all the RPS irq handlers to intel_gt_pm   Sagar Arun Kamble
• [Intel-gfx] [PATCH 24/36] drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info   Chris Wilson
• [Intel-gfx] [PATCH 24/36] drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info   Sagar Arun Kamble
• [Intel-gfx] [PATCH 25/36] drm/i915: Remove defunct intel_suspend_gt_powersave()   Chris Wilson
• [Intel-gfx] [PATCH 25/36] drm/i915: Remove defunct intel_suspend_gt_powersave()   Sagar Arun Kamble
• [Intel-gfx] [PATCH 26/36] drm/i915: Reorder GT interface code   Chris Wilson
• [Intel-gfx] [PATCH 26/36] drm/i915: Reorder GT interface code   Sagar Arun Kamble
• [Intel-gfx] [PATCH 27/27] drm/i915/gen11: add support for reading the timestamp frequency   Lionel Landwerlin
• [Intel-gfx] [PATCH 27/36] drm/i915: Split control of rps and rc6   Chris Wilson
• [Intel-gfx] [PATCH 27/36] drm/i915: Split control of rps and rc6   Sagar Arun Kamble
• [Intel-gfx] [PATCH 27/36] drm/i915: Split control of rps and rc6   Sagar Arun Kamble
• [Intel-gfx] [PATCH 28/36] drm/i915: Enabling rc6 and rps have different requirements, so separate them   Chris Wilson
• [Intel-gfx] [PATCH 28/36] drm/i915: Enabling rc6 and rps have different requirements, so separate them   Sagar Arun Kamble
• [Intel-gfx] [PATCH 29/36] drm/i915: Simplify rc6/rps enabling   Chris Wilson
• [Intel-gfx] [PATCH 29/36] drm/i915: Simplify rc6/rps enabling   Sagar Arun Kamble
• [Intel-gfx] [PATCH 3/3] drm/i915/cnl: Kill _MMIO_PORT6 macro   Mahesh Kumar
• [Intel-gfx] [PATCH 3/3] drm/i915/cnl: Kill _MMIO_PORT6 macro   Rodrigo Vivi
• [Intel-gfx] [PATCH 3/3] drm/i915/error: capture uc_state after gen_state   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 3/3] drm/i915/error: capture uc_state after gen_state   Chris Wilson
• [Intel-gfx] [PATCH 3/3] drm/i915/error: capture uc_state after gen_state   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 3/3] drm/i915/execlists: Refactor out complete_preempt_context()   Chris Wilson
• [Intel-gfx] [PATCH 3/3] drm/i915: Eliminate the horrendous format check code   Ville Syrjala
• [Intel-gfx] [PATCH 3/3] drm/i915: Include the HW breadcrumb whenever we trace the global_seqno   Chris Wilson
• [Intel-gfx] [PATCH 3/3] drm/i915: Include the HW breadcrumb whenever we trace the global_seqno   Tvrtko Ursulin
• [Intel-gfx] [PATCH 3/3] drm/i915: Include the HW breadcrumb whenever we trace the global_seqno   Chris Wilson
• [Intel-gfx] [PATCH 3/3] drm/i915: Include the HW breadcrumb whenever we trace the global_seqno   Tvrtko Ursulin
• [Intel-gfx] [PATCH 3/3] drm/i915: Include the HW breadcrumb whenever we trace the global_seqno   Chris Wilson
• [Intel-gfx] [PATCH 3/3] drm: Fix some coding style issues   Ville Syrjala
• [Intel-gfx] [PATCH 3/3] drm: Fix some coding style issues   Daniel Vetter
• [Intel-gfx] [PATCH 3/3] drm: make drm_core_check_feature() bool that it is   Jani Nikula
• [Intel-gfx] [PATCH 3/3] drm: make drm_core_check_feature() bool that it is   Chris Wilson
• [Intel-gfx] [PATCH 3/3] drm: make drm_core_check_feature() bool that it is   Jani Nikula
• [Intel-gfx] [PATCH 3/3] drm: Store the calculated vrefresh in the user mode   Ville Syrjala
• [Intel-gfx] [PATCH 3/3] drm: Store the calculated vrefresh in the user mode   Maarten Lankhorst
• [Intel-gfx] [PATCH 3/3] drm: Store the calculated vrefresh in the user mode   Ville Syrjälä
• [Intel-gfx] [PATCH 3/3] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH 3/3] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH 3/4] drm/i915/icl: Prepare for more rings   Mika Kuoppala
• [Intel-gfx] [PATCH 3/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Michal Wajdeczko
• [Intel-gfx] [PATCH 3/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Tvrtko Ursulin
• [Intel-gfx] [PATCH 3/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Tvrtko Ursulin
• [Intel-gfx] [PATCH 3/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Michal Wajdeczko
• [Intel-gfx] [PATCH 3/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted   Mika Kuoppala
• [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted   Jeff McGee
• [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted   Chris Wilson
• [Intel-gfx] [PATCH 3/4] drm: Fix some coding style issues   Ville Syrjala
• [Intel-gfx] [PATCH 3/5] drm/i915/execlists: Move irq state manipulation inside irq disabled region   Chris Wilson
• [Intel-gfx] [PATCH 3/5] drm/i915: Enable edp psr error interrupts on bdw+   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 3/5] drm/i915: Move engine reset prepare/finish to backends   Chris Wilson
• [Intel-gfx] [PATCH 3/5] drm/i915: Move engine reset prepare/finish to backends   Jeff McGee
• [Intel-gfx] [PATCH 3/6] drm/i915/icl: new context descriptor support   Mika Kuoppala
• [Intel-gfx] [PATCH 3/6] drm/i915/icl: new context descriptor support   Oscar Mateo
• [Intel-gfx] [PATCH 3/6] drm/i915/psr: Enable Y-coordinate support in source   José Roberto de Souza
• [Intel-gfx] [PATCH 3/6] drm/i915/psr: Enable Y-coordinate support in source   Rodrigo Vivi
• [Intel-gfx] [PATCH 3/6] drm/i915/psr: Enable Y-coordinate support in source   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 3/6] drm/i915: Only use one link bw config for MST topologies   Lyude Paul
• [Intel-gfx] [PATCH 3/6] drm/i915: Update ring position from request on retiring   Chris Wilson
• [Intel-gfx] [PATCH 3/6] drm/i915: Update ring position from request on retiring   Mika Kuoppala
• [Intel-gfx] [PATCH 3/6] drm/i915: Update ring position from request on retiring   Chris Wilson
• [Intel-gfx] [PATCH 3/6] drm: Clear crtc->primary->crtc when disabling the crtc via setcrtc()   Ville Syrjala
• [Intel-gfx] [PATCH 3/6] drm: Verify gamma/degamma LUT size   Sharma, Shashank
• [Intel-gfx] [PATCH 3/6] drm: Verify gamma/degamma LUT size   Ville Syrjälä
• [Intel-gfx] [PATCH 3/6] drm: Verify gamma/degamma LUT size   Sharma, Shashank
• [Intel-gfx] [PATCH 3/6] drm: Verify gamma/degamma LUT size   Ville Syrjälä
• [Intel-gfx] [PATCH 3/6] drm: Verify gamma/degamma LUT size   Daniel Vetter
• [Intel-gfx] [PATCH 3/6] drm: WARN when trying to add enum value > 63 to a bitmask property   Ville Syrjala
• [Intel-gfx] [PATCH 3/6] drm: WARN when trying to add enum value > 63 to a bitmask property   Daniel Vetter
• [Intel-gfx] [PATCH 3/7] drm/i915/icl: Add register defs for voltage swing sequences for MG PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace   Tvrtko Ursulin
• [Intel-gfx] [PATCH 3/7] drm/i915: use funcs from dpll_info embedded in intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH 3/8] drm/i915/guc: Extend the GEN9 WOPCM HW restrictions to early CNL   Michał Winiarski
• [Intel-gfx] [PATCH 3/8] drm/i915/guc: Extend the GEN9 WOPCM HW restrictions to early CNL   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 3/8] drm/i915/icl: add basic support for the ICL clocks   Paulo Zanoni
• [Intel-gfx] [PATCH 3/8] drm/i915/icl: Update subslice define for ICL 11   Mika Kuoppala
• [Intel-gfx] [PATCH 3/8] drm/i915/icl: Update subslice define for ICL 11   Mika Kuoppala
• [Intel-gfx] [PATCH 3/9] Revert "cpufreq: intel_pstate: Shorten a couple of long names"   Francisco Jerez
• [Intel-gfx] [PATCH 30/36] drm/i915: Refactor frequency bounds computation   Chris Wilson
• [Intel-gfx] [PATCH 30/36] drm/i915: Refactor frequency bounds computation   Sagar Arun Kamble
• [Intel-gfx] [PATCH 31/36] drm/i915: Don't fiddle with rps/rc6 across GPU reset   Chris Wilson
• [Intel-gfx] [PATCH 31/36] drm/i915: Don't fiddle with rps/rc6 across GPU reset   Sagar Arun Kamble
• [Intel-gfx] [PATCH 32/36] drm/i915: Rename rps min/max frequencies   Chris Wilson
• [Intel-gfx] [PATCH 32/36] drm/i915: Rename rps min/max frequencies   Sagar Arun Kamble
• [Intel-gfx] [PATCH 33/36] drm/i915: Pull IPS into RPS   Chris Wilson
• [Intel-gfx] [PATCH 33/36] drm/i915: Pull IPS into RPS   Sagar Arun Kamble
• [Intel-gfx] [PATCH 34/36] drm/i915, intel_ips: Enable GPU wait-boosting with IPS   Chris Wilson
• [Intel-gfx] [PATCH 35/36] drm/i915: Remove unwarranted clamping for hsw/bdw   Chris Wilson
• [Intel-gfx] [PATCH 35/36] drm/i915: Remove unwarranted clamping for hsw/bdw   Sagar Arun Kamble
• [Intel-gfx] [PATCH 36/36] drm/i915: Support per-context user requests for GPU frequency control   Chris Wilson
• [Intel-gfx] [PATCH 36/36] drm/i915: Support per-context user requests for GPU frequency control   Sagar Arun Kamble
• [Intel-gfx] [PATCH 4.14 057/140] drm/i915/perf: fix perf stream opening lock   Greg Kroah-Hartman
• [Intel-gfx] [PATCH 4.15 010/146] drm/i915/audio: fix check for av_enc_map overflow   Greg Kroah-Hartman
• [Intel-gfx] [PATCH 4.15 016/146] drm/i915/perf: fix perf stream opening lock   Greg Kroah-Hartman
• [Intel-gfx] [PATCH 4/4] drm/i915/icl: Interrupt handling   Mika Kuoppala
• [Intel-gfx] [PATCH 4/4] drm/i915: Flush pending interrupt following a GPU reset   Chris Wilson
• [Intel-gfx] [PATCH 4/4] drm/i915: Move i915_gpu_error into its own header   Michal Wajdeczko
• [Intel-gfx] [PATCH 4/4] drm/vc4: Validate framebuffer pixel format/modifier   Ville Syrjala
• [Intel-gfx] [PATCH 4/4] drm/vc4: Validate framebuffer pixel format/modifier   Eric Anholt
• [Intel-gfx] [PATCH 4/4] drm/vc4: Validate framebuffer pixel format/modifier   Ville Syrjälä
• [Intel-gfx] [PATCH 4/4] drm/vc4: Validate framebuffer pixel format/modifier   Daniel Vetter
• [Intel-gfx] [PATCH 4/5] drm/i915/execlists: Split spinlock from its irq disabling side-effect   Chris Wilson
• [Intel-gfx] [PATCH 4/5] drm/i915/execlists: Split spinlock from its irq disabling side-effect   Mika Kuoppala
• [Intel-gfx] [PATCH 4/5] drm/i915/execlists: Split spinlock from its irq disabling side-effect   Chris Wilson
• [Intel-gfx] [PATCH 4/5] drm/i915/execlists: Split spinlock from its irq disabling side-effect   Mika Kuoppala
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Rodrigo Vivi
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Rodrigo Vivi
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 4/5] drm/i915/frontbuffer: Remove early frontbuffer flush in prepare_plane_fb()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/5] drm/i915/psr: Control PSR interrupts via debugfs   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 4/5] drm/i915/psr: Control PSR interrupts via debugfs   Ville Syrjälä
• [Intel-gfx] [PATCH 4/5] drm/i915/psr: Control PSR interrupts via debugfs   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 4/5] drm/i915: Split execlists/guc reset prepartions   Chris Wilson
• [Intel-gfx] [PATCH 4/5] drm/i915: Split execlists/guc reset prepartions   Jeff McGee
• [Intel-gfx] [PATCH 4/6] drm/atomic-helper: WARN if legacy plane fb pointers are bogus when committing duplicated state   Ville Syrjala
• [Intel-gfx] [PATCH 4/6] drm/dp_mst: Add drm_dp_mst_topology_mgr_lower_link_rate()   Lyude Paul
• [Intel-gfx] [PATCH 4/6] drm/i915/icl: Enhanced execution list support   Mika Kuoppala
• [Intel-gfx] [PATCH 4/6] drm/i915/icl: Enhanced execution list support   Chris Wilson
• [Intel-gfx] [PATCH 4/6] drm/i915/psr: Do not override PSR2 sink support   José Roberto de Souza
• [Intel-gfx] [PATCH 4/6] drm/i915: Include ring->emit in debugging   Chris Wilson
• [Intel-gfx] [PATCH 4/6] drm/i915: Include ring->emit in debugging   Mika Kuoppala
• [Intel-gfx] [PATCH 4/6] drm/uapi: Deprecate DRM_MODE_PROP_PENDING   Ville Syrjala
• [Intel-gfx] [PATCH 4/6] drm/uapi: Deprecate DRM_MODE_PROP_PENDING   Daniel Vetter
• [Intel-gfx] [PATCH 4/6] drm: Introduce drm_color_lut_size()   Daniel Vetter
• [Intel-gfx] [PATCH 4/6] drm: Introduce drm_color_lut_size()   Ville Syrjälä
• [Intel-gfx] [PATCH 4/7] drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer   Paulo Zanoni
• [Intel-gfx] [PATCH 4/7] drm/i915/pmu: Add queued counter   Tvrtko Ursulin
• [Intel-gfx] [PATCH 4/7] drm/i915: use name from dpll_info embedded in intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH 4/8] drm/i915/guc: Separate WOPCM partitioning from constraints check   Michał Winiarski
• [Intel-gfx] [PATCH 4/8] drm/i915/guc: Separate WOPCM partitioning from constraints check   Yaodong Li
• [Intel-gfx] [PATCH 4/8] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Mika Kuoppala
• [Intel-gfx] [PATCH 4/8] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Lionel Landwerlin
• [Intel-gfx] [PATCH 4/8] drm/i915/icl: compute the combo PHY (DPLL) HDMI registers   Paulo Zanoni
• [Intel-gfx] [PATCH 4/9] Revert "cpufreq: intel_pstate: Simplify intel_pstate_adjust_pstate()"   Francisco Jerez
• [Intel-gfx] [PATCH 5/5] drm/i915/execlists: Flush pending preemption events during reset   Chris Wilson
• [Intel-gfx] [PATCH 5/5] drm/i915/execlists: Flush pending preemption events during reset   Jeff McGee
• [Intel-gfx] [PATCH 5/5] drm/i915/execlists: Flush pending preemption events during reset   Jeff McGee
• [Intel-gfx] [PATCH 5/5] drm/i915/execlists: Flush pending preemption events during reset   Chris Wilson
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Ville Syrjälä
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Ville Syrjälä
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Chris Wilson
• [Intel-gfx] [PATCH 5/5] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 5/5] drm/i915: Call prepare/finish around intel_gpu_reset() during GEM sanitize   Chris Wilson
• [Intel-gfx] [PATCH 5/5] drm/i915: Call prepare/finish around intel_gpu_reset() during GEM sanitize   Mika Kuoppala
• [Intel-gfx] [PATCH 5/5] drm/i915: Move hdcp msg detection into shim   Ramalingam C
• [Intel-gfx] [PATCH 5/6] drm/dp_mst: Add drm_atomic_dp_mst_retrain_topology()   Lyude Paul
• [Intel-gfx] [PATCH 5/6] drm/i915/icl: Add Indirect Context Offset for Gen11   Mika Kuoppala
• [Intel-gfx] [PATCH 5/6] drm/i915/psr: Rename intel_crtc_state has_psr to can_psr   José Roberto de Souza
• [Intel-gfx] [PATCH 5/6] drm/i915/psr: Rename intel_crtc_state has_psr to can_psr   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 5/6] drm/i915/psr: Rename intel_crtc_state has_psr to can_psr   Souza, Jose
• [Intel-gfx] [PATCH 5/6] drm/i915: Restore planes after load detection   Ville Syrjala
• [Intel-gfx] [PATCH 5/6] drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Chris Wilson
• [Intel-gfx] [PATCH 5/6] drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Mika Kuoppala
• [Intel-gfx] [PATCH 5/6] drm: Make property flags u32   Ville Syrjala
• [Intel-gfx] [PATCH 5/6] drm: Make property flags u32   Daniel Vetter
• [Intel-gfx] [PATCH 5/7] drm/i915/icl: HPD pin for port F   Paulo Zanoni
• [Intel-gfx] [PATCH 5/7] drm/i915/pmu: Add runnable counter   Tvrtko Ursulin
• [Intel-gfx] [PATCH 5/7] drm/i915: use id from dpll_info embedded in intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH 5/8] drm/i915/guc: Use GuC FW size and HW restrictions to determine WOPCM partition   Michał Winiarski
• [Intel-gfx] [PATCH 5/8] drm/i915/guc: Use GuC FW size and HW restrictions to determine WOPCM partition   Yaodong Li
• [Intel-gfx] [PATCH 5/8] drm/i915/guc: Use GuC FW size and HW restrictions to determine WOPCM partition   Michał Winiarski
• [Intel-gfx] [PATCH 5/8] drm/i915/icl: Add reset control register changes   Mika Kuoppala
• [Intel-gfx] [PATCH 5/8] drm/i915/icl: Add reset control register changes   Mika Kuoppala
• [Intel-gfx] [PATCH 5/8] drm/i915/icl: Add reset control register changes   Chris Wilson
• [Intel-gfx] [PATCH 5/8] drm/i915/icl: Add reset control register changes   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 5/8] drm/i915/icl: Add reset control register changes   Chris Wilson
• [Intel-gfx] [PATCH 5/8] drm/i915/icl: Add reset control register changes   Michel Thierry
• [Intel-gfx] [PATCH 5/8] drm/i915/icl: compute the combo PHY (DPLL) DP registers   Paulo Zanoni
• [Intel-gfx] [PATCH 5/9] Revert "cpufreq: intel_pstate: Drop ->update_util from pstate_funcs"   Francisco Jerez
• [Intel-gfx] [PATCH 6/6] drm/i915/icl: Gen11 forcewake support   Mika Kuoppala
• [Intel-gfx] [PATCH 6/6] drm/i915/psr: Enable aux frame sync in source   José Roberto de Souza
• [Intel-gfx] [PATCH 6/6] drm/i915/psr: Enable aux frame sync in source   Rodrigo Vivi
• [Intel-gfx] [PATCH 6/6] drm/i915/psr: Enable aux frame sync in source   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH 6/6] drm/i915: Implement proper fallback training for MST   Lyude Paul
• [Intel-gfx] [PATCH 6/6] drm/i915: Make force_load_detect effective even w/ DMI quirks/hotplug   Ville Syrjala
• [Intel-gfx] [PATCH 6/6] drm/i915: Only call tasklet_kill() on the first prepare_reset   Chris Wilson
• [Intel-gfx] [PATCH 6/6] drm/i915: Only call tasklet_kill() on the first prepare_reset   Mika Kuoppala
• [Intel-gfx] [PATCH 6/6] drm/i915: Only call tasklet_kill() on the first prepare_reset   Chris Wilson
• [Intel-gfx] [PATCH 6/6] drm/i915: Only call tasklet_kill() on the first prepare_reset   Chris Wilson
• [Intel-gfx] [PATCH 6/6] drm: Reject bad property flag combinations   Ville Syrjala
• [Intel-gfx] [PATCH 6/6] drm: Reject bad property flag combinations   Daniel Vetter
• [Intel-gfx] [PATCH 6/6] drm: Reject bad property flag combinations   Ville Syrjälä
• [Intel-gfx] [PATCH 6/7] drm/i915/icl: Added 5k source scaling support for Gen11 platform   Paulo Zanoni
• [Intel-gfx] [PATCH 6/7] drm/i915/pmu: Add running counter   Tvrtko Ursulin
• [Intel-gfx] [PATCH 6/7] drm/i915: use flags from dpll_info embedded in intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH 6/8] drm/i915/guc: Don't give up on WOPCM partitioning regs mismatch   Michał Winiarski
• [Intel-gfx] [PATCH 6/8] drm/i915/icl: compute the MG PLL registers   Paulo Zanoni
• [Intel-gfx] [PATCH 6/8] drm/i915/icl: Handle RPS interrupts correctly for Gen11   Mika Kuoppala
• [Intel-gfx] [PATCH 6/9] cpufreq/intel_pstate: Implement variably low-pass filtering controller for small core.   Francisco Jerez
• [Intel-gfx] [PATCH 7/7] drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL   Paulo Zanoni
• [Intel-gfx] [PATCH 7/7] drm/i915: Engine queues query   Tvrtko Ursulin
• [Intel-gfx] [PATCH 7/7] drm/i915: Engine queues query   Lionel Landwerlin
• [Intel-gfx] [PATCH 7/7] drm/i915: Engine queues query   Chris Wilson
• [Intel-gfx] [PATCH 7/7] drm/i915: rename dpll_info to intel_dpll_info   Lucas De Marchi
• [Intel-gfx] [PATCH 7/8] drm/i915/guc: Don't touch WOPCM if we're not using GuC   Michał Winiarski
• [Intel-gfx] [PATCH 7/8] drm/i915/guc: Don't touch WOPCM if we're not using GuC   Yaodong Li
• [Intel-gfx] [PATCH 7/8] drm/i915/icl: Enable RC6 and RPS in Gen11   Mika Kuoppala
• [Intel-gfx] [PATCH 7/8] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI   Paulo Zanoni
• [Intel-gfx] [PATCH 7/8] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI   kbuild test robot
• [Intel-gfx] [PATCH 7/9] SQUASH: cpufreq/intel_pstate: Enable LP controller based on ACPI FADT profile.   Francisco Jerez
• [Intel-gfx] [PATCH 8/8] drm/i915/icl: Fix the DP Max Voltage for ICL   Paulo Zanoni
• [Intel-gfx] [PATCH 8/8] drm/i915/icl: Use hw engine class, instance to find irq handler   Mika Kuoppala
• [Intel-gfx] [PATCH 8/8] drm/i915/icl: Use hw engine class, instance to find irq handler   Michel Thierry
• [Intel-gfx] [PATCH 8/8] drm/i915/icl: Use hw engine class, instance to find irq handler   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 8/8] drm/i915/icl: Use hw engine class, instance to find irq handler   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH 8/8] HAX enable guc for CI   Michał Winiarski
• [Intel-gfx] [PATCH 8/9] OPTIONAL: cpufreq/intel_pstate: Expose LP controller parameters via debugfs.   Francisco Jerez
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Francisco Jerez
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Chris Wilson
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Francisco Jerez
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Chris Wilson
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Chris Wilson
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Francisco Jerez
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Chris Wilson
• [Intel-gfx] [PATCH 9/9] drm/i915/execlists: Report GPU rendering as IO activity to cpufreq.   Chris Wilson
• [Intel-gfx] [PATCH][drm-next] drm/i915/gvt: fix spelling mistake: "destoried" -> "destroyed"   Colin King
• [Intel-gfx] [PATCH][drm-next] drm/i915/gvt: fix spelling mistake: "destoried" -> "destroyed"   Zhenyu Wang
• [Intel-gfx] [PATCH] [v2] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Arnd Bergmann
• [Intel-gfx] [PATCH] [v2] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Chris Wilson
• [Intel-gfx] [PATCH] [v2] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Tvrtko Ursulin
• [Intel-gfx] [PATCH] [v2] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Arnd Bergmann
• [Intel-gfx] [PATCH] [v2] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Tvrtko Ursulin
• [Intel-gfx] [PATCH] dri2: Sync i965_pci_ids.h from Mesa.   Rodrigo Vivi
• [Intel-gfx] [PATCH] dri2: Sync i965_pci_ids.h from Mesa.   Adam Jackson
• [Intel-gfx] [PATCH] drm/atomic: Call ww_acquire_done after drm_modeset_lock_all   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Benson Leung
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Manasi Navare
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Manasi Navare
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Ilia Mirkin
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Manasi Navare
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Benson Leung
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Benson Leung
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Jani Nikula
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Atwood, Matthew S
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   kbuild test robot
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   kbuild test robot
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Benson Leung
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Jani Nikula
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   kbuild test robot
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   kbuild test robot
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   kbuild test robot
• [Intel-gfx] [PATCH] drm/edid: Dump valid EDIDs too   Ville Syrjala
• [Intel-gfx] [PATCH] drm/edid: Dump valid EDIDs too   Chris Wilson
• [Intel-gfx] [PATCH] drm/edid: Dump valid EDIDs too   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/edid: Dump valid EDIDs too   Chris Wilson
• [Intel-gfx] [PATCH] drm/i195: Index the ring frequency table by HW frequency range   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/breadcrumbs: Keep the fake irq armed across reset   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/cnl: Add Wa_2201832410   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnl: Add Wa_2201832410   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnl: Add Wa_2201832410   Rafael Antognolli
• [Intel-gfx] [PATCH] drm/i915/cnl: Add Wa_2201832410   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnl: Add Wa_2201832410   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/cnl: Add Wa_2201832410   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnl: document WaVFUnitClockGatingDisable   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnl: document WaVFUnitClockGatingDisable   Rafael Antognolli
• [Intel-gfx] [PATCH] drm/i915/cnl: document WaVFUnitClockGatingDisable   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating   Radhakrishna Sripada
• [Intel-gfx] [PATCH] drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/cnp: Properly handle VBT ddc pin out of bounds.   Timo Aaltonen
• [Intel-gfx] [PATCH] drm/i915/dp: clean up leftover references to CHV HBR2 support   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/dp: clean up leftover references to CHV HBR2 support   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/dp: Do not set the eDP link rate/lane count to max   Manasi Navare
• [Intel-gfx] [PATCH] drm/i915/dp: Do not set the eDP link rate/lane count to max   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/dp: Do not set the eDP link rate/lane count to max   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/dp: Fix alt mode handling.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915/dp: Fix alt mode handling.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/dp: Fix alt mode handling.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915/dp: Fix alt mode handling.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/dp: Fix intel_edp_compare_alt_mode.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915/dp: Fix intel_edp_compare_alt_mode.   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/dp: Fix intel_edp_compare_alt_mode.   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/dp: Fix intel_edp_compare_alt_mode.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915/dp: Fix intel_edp_compare_alt_mode.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH] drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.   Laura Abbott
• [Intel-gfx] [PATCH] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Clear user-active flag on preemption completion   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Clear user-active flag on preemption completion   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Clear user-active flag on preemption completion   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Clear user-active flag on preemption completion   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Clear user-active flag on preemption completion   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Consistent seqno reporting in GEM_TRACE   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915/execlists: Consistent seqno reporting in GEM_TRACE   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Consistent seqno reporting in GEM_TRACE   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915/execlists: Move irq state manipulation inside irq disabled region   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Move irq state manipulation inside irq disabled region   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Move irq state manipulation inside irq disabled region   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Reset ring registers on rebinding contexts   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Reset ring registers on rebinding contexts   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Reset ring registers on rebinding contexts   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Reset ring registers on rebinding contexts   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915/execlists: Reset ring registers on rebinding contexts   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915/execlists: Reset ring registers on rebinding contexts   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Set queue priority from secondary port   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences   Francisco Jerez
• [Intel-gfx] [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/glk: Disable Guc and HuC on GLK   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/glk: Disable Guc and HuC on GLK   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/glk: Disable Guc and HuC on GLK   Greg KH
• [Intel-gfx] [PATCH] drm/i915/glk: Disable Guc and HuC on GLK   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/glk: Disable Guc and HuC on GLK   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/glk: Disable Guc and HuC on GLK   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/guc: Don't try to enable GuC logging when we're not using GuC   Michał Winiarski
• [Intel-gfx] [PATCH] drm/i915/guc: Don't try to enable GuC logging when we're not using GuC   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/guc: enable guc interrupts unconditionally in uc_resume   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/guc: enable guc interrupts unconditionally in uc_resume   Michał Winiarski
• [Intel-gfx] [PATCH] drm/i915/guc: Fix build break on config without DEBUG_FS   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Fix build break on config without DEBUG_FS   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Piotr Piórkowski
• [Intel-gfx] [PATCH] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Yaodong Li
• [Intel-gfx] [PATCH] drm/i915/guc: Handle GuC log flush event in dedicated function   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Handle GuC log flush event in dedicated function   Sagar Arun Kamble
• [Intel-gfx] [PATCH] drm/i915/guc: Handle GuC log flush event in dedicated function   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   Sagar Arun Kamble
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   John Spotswood
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   Sagar Arun Kamble
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   Piorkowski, Piotr
• [Intel-gfx] [PATCH] drm/i915/guc: Removed unused GuC parameters.   John Spotswood
• [Intel-gfx] [PATCH] drm/i915/guc: Unify naming of private GuC action functions   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Unify naming of private GuC action functions   Michał Winiarski
• [Intel-gfx] [PATCH] drm/i915/guc: Unify naming of private GuC action functions   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Unify naming of private GuC action functions   Michał Winiarski
• [Intel-gfx] [PATCH] drm/i915/guc: Unify parameters of public CT functions   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Unify parameters of public CT functions   Sagar Arun Kamble
• [Intel-gfx] [PATCH] drm/i915/guc: Unify parameters of public CT functions   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Unify parameters of public CT functions   Sagar Arun Kamble
• [Intel-gfx] [PATCH] drm/i915/guc: Unify parameters of public CT functions   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/guc: Update syntax of GuC log functions   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/guc: Update syntax of GuC log functions   Michał Winiarski
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference   Gustavo A. R. Silva
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference   Gustavo A. R. Silva
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference   Gustavo A. R. Silva
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: Remove unnecessary NULL checks in sr_oa_regs   Gustavo A. R. Silva
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: Remove unnecessary NULL checks in sr_oa_regs   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: Remove unnecessary NULL checks in sr_oa_regs   Zhenyu Wang
• [Intel-gfx] [PATCH] drm/i915/gvt: don't dereference 'workload' before null checking it   Colin King
• [Intel-gfx] [PATCH] drm/i915/gvt: don't dereference 'workload' before null checking it   Joe Perches
• [Intel-gfx] [PATCH] drm/i915/gvt: don't dereference 'workload' before null checking it   Colin Ian King
• [Intel-gfx] [PATCH] drm/i915/gvt: don't dereference 'workload' before null checking it   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/gvt: don't dereference 'workload' before null checking it   Joe Perches
• [Intel-gfx] [PATCH] drm/i915/gvt: don't dereference 'workload' before null checking it   Colin Ian King
• [Intel-gfx] [PATCH] drm/i915/gvt: fix spelling mistake: "registeration" -> "registration"   Colin King
• [Intel-gfx] [PATCH] drm/i915/gvt: Mark expected switch fall-through in handle_g2v_notification   Gustavo A. R. Silva
• [Intel-gfx] [PATCH] drm/i915/huc: Check HuC status in dedicated function   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/huc: Check HuC status in dedicated function   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/huc: Check HuC status in dedicated function   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915/huc: Check HuC status in dedicated function   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/huc: Check HuC status in dedicated function   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL   Paulo Zanoni
• [Intel-gfx] [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/icl: do not save DDI A/E sharing bit for ICL   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915/icl: local_clock returns an u64   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/icl: local_clock returns an u64   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/icl: local_clock returns an u64   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/icl: Use hw engine class, instance to find irq handler   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/icl: Use hw engine class, instance to find irq handler   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/icl: Use hw engine class, instance to find irq handler   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/icl: Use hw engine class, instance to find irq handler   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH] drm/i915/icl: Use hw engine class, instance to find irq handler   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/icl: Use hw engine class, instance to find irq handler   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH] drm/i915/icl: Use hw engine class, instance to find irq handler   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915/perf: enable perf support on ICL   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915/perf: enable perf support on ICL   Matthew Auld
• [Intel-gfx] [PATCH] drm/i915/perf: enable perf support on ICL   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915/perf: fix perf stream opening lock   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/perf: fix perf stream opening lock   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915/perf: fix perf stream opening lock   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915/perf: fix perf stream opening lock   Greg KH
• [Intel-gfx] [PATCH] drm/i915/pm: Warn if rpm frequencies are not set   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/pm: Warn if rpm frequencies are not set   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/pm: Warn if rpm frequencies are not set   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Arnd Bergmann
• [Intel-gfx] [PATCH] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Arnd Bergmann
• [Intel-gfx] [PATCH] drm/i915/pmu: Work around compiler warnings on some kernel configs   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915/pmu: Work around compiler warnings on some kernel configs   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/psr: Comment to clarify SRD_DEBUG is called PSR_MASK SKL+   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH] drm/i915/psr: Comment to clarify SRD_DEBUG is called PSR_MASK SKL+   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Comment to clarify SRD_DEBUG is called PSR_MASK SKL+   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Kill scheduled work for Core platforms.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Kill scheduled work for Core platforms.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Kill scheduled work for Core platforms.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Test PSR.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH] drm/i915/psr: Test PSR.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/selftests: Add basic sanitychecks for execlists   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/selftests: Add basic sanitychecks for execlists   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915/selftests: Extend partial vma coverage to check parallel creation   Joonas Lahtinen
• [Intel-gfx] [PATCH] drm/i915/selftests: Include the trace as a debug aide   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/selftests: Stress resets-vs-request-priority   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/skl+: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915/stolen: Deduce base of reserved portion as top-size on vlv   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/stolen: Deduce base of reserved portion as top-size on vlv   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915/stolen: Intepret reserved_base=0 as deduce from top   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Daniel Vetter
• [Intel-gfx] [PATCH] drm/i915: Actually flush interrupts on reset not just wedging   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Add debugfs file to clear FIFO underruns.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Add debugfs file to clear FIFO underruns.   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Add debugfs file to clear FIFO underruns.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Allow control of PSR at runtime through debugfs.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Allow control of PSR at runtime through debugfs.   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Allow control of PSR at runtime through debugfs.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Allow control of PSR at runtime through debugfs.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Allow control of PSR at runtime through debugfs.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Allow control of PSR at runtime through debugfs.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Assert that the request is indeed complete when signaled from irq   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Assert that the request is indeed complete when signaled from irq   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915: Assert that the request is indeed complete when signaled from irq   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Assert that the request is indeed complete when signaled from irq   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915: Assert that the request is indeed complete when signaled from irq   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: avoid false fence signaling when enabling preemption   Min He
• [Intel-gfx] [PATCH] drm/i915: avoid false fence signaling when enabling preemption   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: avoid false fence signaling when enabling preemption   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: avoid false fence signaling when enabling preemption   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: avoid false fence signaling when enabling preemption   He, Min
• [Intel-gfx] [PATCH] drm/i915: Check all requests have been retired on switching to kernel context   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset   Lyude Paul
• [Intel-gfx] [PATCH] drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset   Lofstedt, Marta
• [Intel-gfx] [PATCH] drm/i915: Check rq->timeline before deference   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Check rq->timeline before deference   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Check rq->timeline before deference   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Configure GPU PM in ->suspend() if not configured   Rushikesh S Kadam
• [Intel-gfx] [PATCH] drm/i915: Configure GPU PM in ->suspend() if not configured   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Control PSR at runtime through debugfs only   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Control PSR at runtime through debugfs only   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Disable LVDS on Radiant P845   Ondrej Zary
• [Intel-gfx] [PATCH] drm/i915: Disable LVDS on Radiant P845   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Disable pipe CRC before disabling the pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Disable pipe CRC before disabling the pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Disable some extra clang warnings   Matthias Kaehlcke
• [Intel-gfx] [PATCH] drm/i915: Disable some extra clang warnings   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Zhang, Xiong Y
• [Intel-gfx] [PATCH] drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Joonas Lahtinen
• [Intel-gfx] [PATCH] drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Xiong Zhang
• [Intel-gfx] [PATCH] drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Zhang, Xiong Y
• [Intel-gfx] [PATCH] drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Zhenyu Wang
• [Intel-gfx] [PATCH] drm/i915: Don't initialize plane_to_crtc_mapping[] on SKL+   Ville Syrjala
• [Intel-gfx] [PATCH] drm/i915: Don't initialize plane_to_crtc_mapping[] on SKL+   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Don't initialize plane_to_crtc_mapping[] on SKL+   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: don't leak the pin_map on error   Matthew Auld
• [Intel-gfx] [PATCH] drm/i915: don't leak the pin_map on error   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: don't leak the pin_map on error   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: don't leak the pin_map on error   Matthew Auld
• [Intel-gfx] [PATCH] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Ville Syrjala
• [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Hans de Goede
• [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Hans de Goede
• [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Hans de Goede
• [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Hans de Goede
• [Intel-gfx] [PATCH] drm/i915: drop various VLAs in i915_debugfs.c   Salvatore Mesoraca
• [Intel-gfx] [PATCH] drm/i915: drop various VLAs in i915_debugfs.c   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: drop various VLAs in i915_debugfs.c   Joonas Lahtinen
• [Intel-gfx] [PATCH] drm/i915: drop various VLAs in i915_debugfs.c   Salvatore Mesoraca
• [Intel-gfx] [PATCH] drm/i915: drop various VLAs in i915_debugfs.c   Salvatore Mesoraca
• [Intel-gfx] [PATCH] drm/i915: Fix hibernation with ACPI S0 target state   Imre Deak
• [Intel-gfx] [PATCH] drm/i915: Fix hibernation with ACPI S0 target state   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Fix hibernation with ACPI S0 target state   Imre Deak
• [Intel-gfx] [PATCH] drm/i915: Fix tracing of submit seqno   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Fix tracing of submit seqno   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Flush pending interrupt following a GPU reset   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Flush pending interrupt following a GPU reset   Jeff McGee
• [Intel-gfx] [PATCH] drm/i915: Flush pending interrupt following a GPU reset   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Flush pending interrupt following a GPU reset   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Flush pending interrupt following a GPU reset   Jeff McGee
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_fbc parameter at runtime better.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_fbc parameter at runtime better.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_fbc parameter at runtime better.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_fbc parameter at runtime better.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_fbc parameter at runtime better.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_fbc parameter at runtime better.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_psr parameter at runtime better   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_psr parameter at runtime better   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_psr parameter at runtime better   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_psr parameter at runtime better   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_psr parameter at runtime better   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_psr parameter at runtime better   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Handle changing enable_psr parameter at runtime better   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Handle pipe CRC around enabling/disabling pipe.   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Include submission tasklet state in engine dump   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Index the ring frequency table by HW frequency range   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Index the ring frequency table by HW frequency range   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Kick the rps worker when changing the boost frequency   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Kick the rps worker when changing the boost frequency   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Kick the rps worker when changing the boost frequency   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Kill the remaining CHV HBR2 leftovers   Ville Syrjala
• [Intel-gfx] [PATCH] drm/i915: Kill the remaining CHV HBR2 leftovers   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Kill the remaining CHV HBR2 leftovers   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Kill the remaining CHV HBR2 leftovers   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   Benson Leung
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   Atwood, Matthew S
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   matthew.s.atwood at intel.com
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915: make edp optimize config   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible   Matthew Auld
• [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible   Matthew Auld
• [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Move CUR_SURFLIFE definition to a better place.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Move CUR_SURFLIFE definition to a better place.   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Move CUR_SURFLIFE definition to a better place.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Move CUR_SURFLIFE definition to a better place.   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Only prune fences after wait-for-all   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Only warn for might_sleep() before a slow wait_for_register   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Only warn for might_sleep() before a slow wait_for_register   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Only warn for might_sleep() before a slow wait_for_register   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Only warn for might_sleep() before a slow wait_for_register   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm/i915: Prefer memset64() when filling the iomap   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Prefer memset64() when filling the iomap   Matthew Auld
• [Intel-gfx] [PATCH] drm/i915: prefer vma->size for vma iomap   Matthew Auld
• [Intel-gfx] [PATCH] drm/i915: prefer vma->size for vma iomap   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Promote .format_mod_supported() to the lead role   Ville Syrjala
• [Intel-gfx] [PATCH] drm/i915: Promote .format_mod_supported() to the lead role   Eric Anholt
• [Intel-gfx] [PATCH] drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER   Paulo Zanoni
• [Intel-gfx] [PATCH] drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Protect PIPE_CONF_CHECK macros with do {} while(0)   Ville Syrjala
• [Intel-gfx] [PATCH] drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH] drm/i915: Register definitions for DP Phy compiance   clinton.a.taylor at intel.com
• [Intel-gfx] [PATCH] drm/i915: Register definitions for DP Phy compiance   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Register definitions for DP Phy compiance   Clint Taylor
• [Intel-gfx] [PATCH] drm/i915: Register definitions for DP Phy compiance   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH] drm/i915: Remove hole and padding from intel_shared_dpll   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Remove local timeline var from submit/unsubmit   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Remove support for legacy debugfs crc interface   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915: Request driver probe from an async task   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Request driver probe from an async task   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Reword warning for missing cases   Lucas De Marchi
• [Intel-gfx] [PATCH] drm/i915: Reword warning for missing cases   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Reword warning for missing cases   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Reword warning for missing cases   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Reword warning for missing cases   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Reword warning for missing cases   Lucas De Marchi
• [Intel-gfx] [PATCH] drm/i915: Rework FBC schedule locking   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm/i915: Rework FBC schedule locking   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Rework FBC schedule locking   Paulo Zanoni
• [Intel-gfx] [PATCH] drm/i915: Select STACKDEPOT for DRM_I915_DEBUG   Daniel Vetter
• [Intel-gfx] [PATCH] drm/i915: Select STACKDEPOT for DRM_I915_DEBUG   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Select STACKDEPOT for DRM_I915_DEBUG   Daniel Vetter
• [Intel-gfx] [PATCH] drm/i915: Show dmc debug registers on CFL and GLK   David Weinehall
• [Intel-gfx] [PATCH] drm/i915: Show dmc debug registers on CFL and GLK   David Weinehall
• [Intel-gfx] [PATCH] drm/i915: Show dmc debug registers on CFL and GLK   Rodrigo Vivi
• [Intel-gfx] [PATCH] drm/i915: Show dmc debug registers on CFL and GLK   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915: Show dmc debug registers on CFL and GLK   kbuild test robot
• [Intel-gfx] [PATCH] drm/i915: Show dmc debug registers on CFL and GLK   David Weinehall
• [Intel-gfx] [PATCH] drm/i915: Show GEM_TRACE when detecting a failed GPU idle   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Tvrtko Ursulin
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Joonas Lahtinen
• [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Split GPU commands definitions into separate header   Michal Wajdeczko
• [Intel-gfx] [PATCH] drm/i915: Split GPU commands definitions into separate header   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Split GPU commands definitions into separate header   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Stop engines around GPU reset preparations   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Stop engines around GPU reset preparations   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Stop engines when declaring the machine wedged   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Stop engines when declaring the machine wedged   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Store preemption capability in engine->flags   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Tell vga_switcheroo whether runtime PM is used   Imre Deak
• [Intel-gfx] [PATCH] drm/i915: Tell vga_switcheroo whether runtime PM is used   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Tell vga_switcheroo whether runtime PM is used   Lukas Wunner
• [Intel-gfx] [PATCH] drm/i915: Trace GEM steps between submit and wedging   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Trace GEM steps between submit and wedging   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Trim error mask to known engines   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Trim error mask to known engines   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Unwind vma pinning for intel_pin_and_fence_fb_obj error path   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Unwind vma pinning for intel_pin_and_fence_fb_obj error path   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Unwind vma pinning for intel_pin_and_fence_fb_obj error path   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Jackie Li
• [Intel-gfx] [PATCH] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Jani Nikula
• [Intel-gfx] [PATCH] drm/i915: Use full serialisation around engine->irq_posted   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Use sseu size for determining eu_regs[]   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Use sseu size for determining eu_regs[]   Lionel Landwerlin
• [Intel-gfx] [PATCH] drm/i915: warn only once about ddi translation table missing   Michel Thierry
• [Intel-gfx] [PATCH] drm/i915: warn only once about ddi translation table missing   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: warn only once about ddi translation table missing   Ville Syrjälä
• [Intel-gfx] [PATCH] drm/i915: Wedged engine mask makes more sense in hex   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Mika Kuoppala
• [Intel-gfx] [PATCH] drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Chris Wilson
• [Intel-gfx] [PATCH] drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Chris Wilson
• [Intel-gfx] [PATCH] drm/scdc-helper: Convert errors into debug messages   Ville Syrjala
• [Intel-gfx] [PATCH] drm/scdc-helper: Convert errors into debug messages   Sharma, Shashank
• [Intel-gfx] [PATCH] drm/scdc-helper: Convert errors into debug messages   Ville Syrjälä
• [Intel-gfx] [PATCH] drm: Don't pass the index to drm_property_add_enum()   Ville Syrjala
• [Intel-gfx] [PATCH] drm: Fix uabi regression by allowing garbage mode->type from userspace   Ville Syrjala
• [Intel-gfx] [PATCH] drm: Fix uabi regression by allowing garbage mode->type from userspace   Thomas Hellstrom
• [Intel-gfx] [PATCH] drm: Fix uabi regression by allowing garbage mode->type from userspace   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm: Fix uabi regression by allowing garbage mode->type from userspace   Daniel Stone
• [Intel-gfx] [PATCH] drm: Fix uabi regression by allowing garbage mode->type from userspace   Ville Syrjälä
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Singh, Gaurav K
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Mullah, Abid A
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Singh, Gaurav K
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH] drm: i915: Fix audio issue on BXT   Gaurav K Singh
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Joe Perches
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Ville Syrjälä
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Joe Perches
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Ville Syrjälä
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Joe Perches
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Ville Syrjälä
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Joe Perches
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Ville Syrjälä
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Joe Perches
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Daniel Vetter
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Joe Perches
• [Intel-gfx] [PATCH] drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Daniel Vetter
• [Intel-gfx] [PATCH] drm: Restore planes after load detection   Ville Syrjala
• [Intel-gfx] [PATCH] drm: Restore planes after load detection   Maarten Lankhorst
• [Intel-gfx] [PATCH] drm: Use srcu to protect drm_device.unplugged   Oleksandr Andrushchenko
• [Intel-gfx] [PATCH] drm: Use srcu to protect drm_device.unplugged   Daniel Vetter
• [Intel-gfx] [PATCH] drm: Use srcu to protect drm_device.unplugged   Oleksandr Andrushchenko
• [Intel-gfx] [PATCH] force-preempt-reset   Chris Wilson
• [Intel-gfx] [PATCH] input/psmouse: Don't hold the mutex while calling ->disconnect   Daniel Vetter
• [Intel-gfx] [PATCH] kthread: finer-grained lockdep/cross-release completion   Daniel Vetter
• [Intel-gfx] [PATCH] kthread: finer-grained lockdep/cross-release completion   Peter Zijlstra
• [Intel-gfx] [PATCH] kthread: finer-grained lockdep/cross-release completion   Byungchul Park
• [Intel-gfx] [PATCH] RFC: debugobjects: capture stack traces at _init() time   Daniel Vetter
• [Intel-gfx] [PATCH] RFC: debugobjects: capture stack traces at _init() time   Thomas Gleixner
• [Intel-gfx] [PATCH] RFC: debugobjects: capture stack traces at _init() time   Daniel Vetter
• [Intel-gfx] [PATCH] semaphore: might_lock(->pi_lock) in up()   Daniel Vetter
• [Intel-gfx] [PATCH] sna/uxa: Fix colormap handling at screen depth 30.   Mario Kleiner
• [Intel-gfx] [PATCH] sna/uxa: Fix colormap handling at screen depth 30.   Ville Syrjälä
• [Intel-gfx] [PATCH] sna/uxa: Fix colormap handling at screen depth 30.   Chris Wilson
• [Intel-gfx] [PATCH] sna/uxa: Fix colormap handling at screen depth 30.   Ville Syrjälä
• [Intel-gfx] [PATCH] sna/uxa: Fix colormap handling at screen depth 30.   Chris Wilson
• [Intel-gfx] [PATCH] sna/uxa: Fix colormap handling at screen depth 30.   Mario Kleiner
• [Intel-gfx] [PATCH] sna/uxa: Fix colormap handling at screen depth 30.   Ville Syrjälä
• [Intel-gfx] [PATCH] sna: CustomEDID fix   Chris Wilson
• [Intel-gfx] [PATCH] trace: Default to using trace_global_clock if sched_clock is unstable   Chris Wilson
• [Intel-gfx] [PATCH] trace: Default to using trace_global_clock if sched_clock is unstable   Steven Rostedt
• [Intel-gfx] [PATCH] trace: Default to using trace_global_clock if sched_clock is unstable   Chris Wilson
• [Intel-gfx] [PATCH] trace: Default to using trace_global_clock if sched_clock is unstable   Steven Rostedt
• [Intel-gfx] [PATCH] trace: Default to using trace_global_clock is sched_clock is unstable   Chris Wilson
• [Intel-gfx] [PATCH] trace: Default to using trace_global_clock is sched_clock is unstable   Chris Wilson
• [Intel-gfx] [PATCH CI 0/7] ICL reviewed mergeable patches   Paulo Zanoni
• [Intel-gfx] [PATCH i-g-t 0/5] Queued/runnable/running engine stats   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 0/6] igt: Add support for testing writeback connectors   Liviu Dudau
• [Intel-gfx] [PATCH i-g-t 01/11] trace.pl: Catch-up with tracepoint renames   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 02/11] scripts/trace.pl: More hash key optimisations   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 03/11] scripts/trace.pl: Sort order   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 04/11] scripts/trace.pl: Calculate stats only after all munging   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 05/11] scripts/trace.pl: Simplify 'end' & 'notify' generation   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 06/11] trace.pl: Move sortQueue near its user   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 07/11] trace.pl: Move min/max timestamp lookup to last loop   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 08/11] trace.pl: Fix engine busy accounting in split mode   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 09/11] trace.pl: Add support for colouring context execution   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 1/2] tools: Introduce intel_cgroup tool   Matt Roper
• [Intel-gfx] [PATCH i-g-t 1/3] lib/dummyload: Add pollable spin batch   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 1/3] lib/dummyload: Add pollable spin batch   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 1/5] include: i915 uAPI headers   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 1/6] lib/igt_kms: Add writeback support in lib/   Liviu Dudau
• [Intel-gfx] [PATCH i-g-t 10/11] trace.pl: Fix incomplete request handling   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 11/11] trace.pl: Fix request split mode   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 2/2] tests/gem_eio: Add context destroyer test   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 2/2] tests: Introduce drv_cgroup   Matt Roper
• [Intel-gfx] [PATCH i-g-t 2/3] meson: gtkdoc support   Daniel Vetter
• [Intel-gfx] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 2/5] intel-gpu-overlay: Add engine queue stats   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 2/6] kms_writeback: Add initial writeback tests   Liviu Dudau
• [Intel-gfx] [PATCH i-g-t 3/3] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 3/3] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 3/5] intel-gpu-overlay: Show 1s, 30s and 15m GPU load   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 3/6] lib: Add function to hash a framebuffer   Liviu Dudau
• [Intel-gfx] [PATCH i-g-t 4/5] tests/perf_pmu: Add tests for engine queued/runnable/running stats   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 4/5] tests/perf_pmu: Add tests for engine queued/runnable/running stats   Chris Wilson
• [Intel-gfx] [PATCH i-g-t 4/6] kms_writeback: Add writeback-check-output   Liviu Dudau
• [Intel-gfx] [PATCH i-g-t 5/5] tests/i915_query: Engine queues tests   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t 5/6] lib/igt_kms: Add igt_output_clone_pipe for cloning   Liviu Dudau
• [Intel-gfx] [PATCH i-g-t 6/6] kms_writeback: Add tests using a cloned output   Liviu Dudau
• [Intel-gfx] [PATCH i-g-t] HACK: enable the chamelium HDMI-CRC-multiple test   Maxime Ripard
• [Intel-gfx] [PATCH i-g-t] HACK: enable the chamelium HDMI-CRC-multiple test   Petri Latvala
• [Intel-gfx] [PATCH i-g-t] intel-gpu-overlay: Update for renamed tracepoints   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] lib/gpgpu_fill: Adding missing configuration parameters for gpgpu_fill function   Katarzyna Dec
• [Intel-gfx] [PATCH i-g-t] lib/gpgpu_fill: Adding missing configuration parameters for gpgpu_fill function   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH i-g-t] lib/gpgpu_fill: Adding missing configuration parameters for gpgpu_fill function   Katarzyna Dec
• [Intel-gfx] [PATCH i-g-t] meson: Chamelium depends on GSL   Daniel Stone
• [Intel-gfx] [PATCH i-g-t] meson: Chamelium depends on GSL   Petri Latvala
• [Intel-gfx] [PATCH i-g-t] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/gen7_forcewake_mt: Fix test   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/gen7_forcewake_mt: Fix test   Chris Wilson
• [Intel-gfx] [PATCH i-g-t] tests/gen7_forcewake_mt: Fix test   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/kms_chamelium: Make tests run without pipe color management support.   Maarten Lankhorst
• [Intel-gfx] [PATCH i-g-t] tests/kms_chamelium: Make tests run without pipe color management support.   Maxime Ripard
• [Intel-gfx] [PATCH i-g-t] tests/kms_chamelium: Make tests run without pipe color management support.   Maarten Lankhorst
• [Intel-gfx] [PATCH i-g-t] tests/kms_chamelium: Make tests run without pipe color management support.   Maxime Ripard
• [Intel-gfx] [PATCH i-g-t] tests/kms_chamelium: Make tests run without pipe color management support.   Maarten Lankhorst
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Fix usage of for_each_engine_class_instance   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Fix usage of for_each_engine_class_instance   Chris Wilson
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Fix usage of for_each_engine_class_instance   Michel Thierry
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Use absolute tolerance in accuracy tests   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Use absolute tolerance in accuracy tests   Chris Wilson
• [Intel-gfx] [PATCH i-g-t] tests: Introduce drv_cgroup (v2)   Matt Roper
• [Intel-gfx] [PATCH i-g-t v2 00/11] trace.pl fixes   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2 03/14] lib/igt_kms: Rework pipe properties to be more atomic, v7.   Maxime Ripard
• [Intel-gfx] [PATCH i-g-t v2 03/14] lib/igt_kms: Rework pipe properties to be more atomic, v7.   Daniel Vetter
• [Intel-gfx] [PATCH i-g-t v2 03/14] lib/igt_kms: Rework pipe properties to be more atomic, v7.   Maarten Lankhorst
• [Intel-gfx] [PATCH i-g-t v2 1/2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] blacklist: Don't run DRRS test on Intel CI system   Marta Lofstedt
• [Intel-gfx] [PATCH i-g-t v2] intel-gpu-overlay: Update for renamed tracepoints   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] intel-gpu-overlay: Update for renamed tracepoints   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v2] intel-gpu-top: Rewrite the tool to be safe to use   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] intel-gpu-top: Rewrite the tool to be safe to use   Eero Tamminen
• [Intel-gfx] [PATCH i-g-t v2] intel-gpu-top: Rewrite the tool to be safe to use   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v2] lib/igt_pm: Restore runtime pm state on test exit   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v2] lib/igt_pm: Restore runtime pm state on test exit   Imre Deak
• [Intel-gfx] [PATCH i-g-t v2] lib/igt_pm: Restore runtime pm state on test exit   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] lib/igt_pm: Restore runtime pm state on test exit   Imre Deak
• [Intel-gfx] [PATCH i-g-t v2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/gem_eio: Never re-use contexts which were in the middle of GPU reset   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v2] tests/gen7_forcewake_mt: Fix test   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/kms_rotation_crc: Remove hardcoding of platforms in igt_require()   Radhakrishna Sripada
• [Intel-gfx] [PATCH i-g-t v2] tests/kms_rotation_crc: Remove hardcoding of platforms in igt_require()   Maarten Lankhorst
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Handle CPU hotplug failures better   Petri Latvala
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Handle CPU hotplug failures better   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Test busyness reporting in face of GPU hangs   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Test busyness reporting in face of GPU hangs   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Test busyness reporting in face of GPU hangs   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Use absolute tolerance in accuracy tests   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Use absolute tolerance in accuracy tests   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v3 2/3] tests/gem_eio: Speed up test execution   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v3 2/3] tests/gem_eio: Speed up test execution   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v3] intel-gpu-top: Rewrite the tool to be safe to use   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v3] intel-gpu-top: Rewrite the tool to be safe to use   Rinat Ibragimov
• [Intel-gfx] [PATCH i-g-t v3] lib/igt_pm: Restore runtime pm state on test exit   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v3] tests/kms_rotation_crc: Move platform checks to one place for non exhaust fence cases   Radhakrishna Sripada
• [Intel-gfx] [PATCH i-g-t v3] tests/kms_rotation_crc: Move platform checks to one place for non exhaust fence cases   Mika Kahola
• [Intel-gfx] [PATCH i-g-t v3] tests/kms_rotation_crc: Move platform checks to one place for non exhaust fence cases   Maarten Lankhorst
• [Intel-gfx] [PATCH i-g-t v3] tests/kms_rotation_crc: Move platform checks to one place for non exhaust fence cases   Ville Syrjälä
• [Intel-gfx] [PATCH i-g-t v3] tests/kms_rotation_crc: Move platform checks to one place for non exhaust fence cases   Srivatsa, Anusha
• [Intel-gfx] [PATCH i-g-t v3] tests/kms_rotation_crc: Move platform checks to one place for non exhaust fence cases   Sripada, Radhakrishna
• [Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Handle CPU hotplug failures better   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Test busyness reporting in face of GPU hangs   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v4] tests/perf_pmu: Handle CPU hotplug failures better   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v4] tests/perf_pmu: Handle CPU hotplug failures better   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v4] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v5] tests/perf_pmu: Handle CPU hotplug failures better   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v5] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v6] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v7] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v7] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v7] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v7] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Chris Wilson
• [Intel-gfx] [PATCH i-g-t v8] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH i-g-t v9] tests/perf_pmu: Improve accuracy by waiting on spinner to start   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt 0/8] Non-Intel test suite fixes   Ulrich Hecht
• [Intel-gfx] [PATCH igt 0/8] Non-Intel test suite fixes   Daniel Vetter
• [Intel-gfx] [PATCH igt 0/8] Non-Intel test suite fixes   Ulrich Hecht
• [Intel-gfx] [PATCH igt 0/8] Non-Intel test suite fixes   Laurent Pinchart
• [Intel-gfx] [PATCH igt 0/8] Non-Intel test suite fixes   Daniel Vetter
• [Intel-gfx] [PATCH igt 01/16] igt/gem_sync: Exercise and measure idle requests   Joonas Lahtinen
• [Intel-gfx] [PATCH igt 01/16] igt/gem_sync: Exercise and measure idle requests   Chris Wilson
• [Intel-gfx] [PATCH igt 1/2] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt 1/3] igt/gem_eio: Exercise set-wedging against request submission   Chris Wilson
• [Intel-gfx] [PATCH igt 1/8] tests/kms_addfb_basic: skip i915-specific tests on other platforms   Ulrich Hecht
• [Intel-gfx] [PATCH igt 1/8] tests/kms_addfb_basic: skip i915-specific tests on other platforms   Daniel Vetter
• [Intel-gfx] [PATCH igt 1/8] tests/kms_addfb_basic: skip i915-specific tests on other platforms   Laurent Pinchart
• [Intel-gfx] [PATCH igt 2/2] igt: Remoe gen7_forcewake_mt   Chris Wilson
• [Intel-gfx] [PATCH igt 2/3] igt/gem_exec_fence: Exercise merging fences   Chris Wilson
• [Intel-gfx] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently   Chris Wilson
• [Intel-gfx] [PATCH igt 2/8] tests/kms_panel_fitting: check for i915 before checking version   Ulrich Hecht
• [Intel-gfx] [PATCH igt 2/8] tests/kms_panel_fitting: check for i915 before checking version   Daniel Vetter
• [Intel-gfx] [PATCH igt 2/8] tests/kms_panel_fitting: check for i915 before checking version   Laurent Pinchart
• [Intel-gfx] [PATCH igt 2/8] tests/kms_panel_fitting: check for i915 before checking version   Daniel Vetter
• [Intel-gfx] [PATCH igt 2/8] tests/kms_panel_fitting: check for i915 before checking version   Laurent Pinchart
• [Intel-gfx] [PATCH igt 2/8] tests/kms_panel_fitting: check for i915 before checking version   Daniel Vetter
• [Intel-gfx] [PATCH igt 3/3] igt/gem_exec_schedule: Exercise "deep" preemption   Chris Wilson
• [Intel-gfx] [PATCH igt 3/8] lib/igt_gt: has_gpu_reset(): fix failed assertion on non-i915 platforms   Ulrich Hecht
• [Intel-gfx] [PATCH igt 3/8] lib/igt_gt: has_gpu_reset(): fix failed assertion on non-i915 platforms   Ville Syrjälä
• [Intel-gfx] [PATCH igt 3/8] lib/igt_gt: has_gpu_reset(): fix failed assertion on non-i915 platforms   Daniel Vetter
• [Intel-gfx] [PATCH igt 4/5] igt/gem_exec_capture: Exercise readback of userptr   Michał Winiarski
• [Intel-gfx] [PATCH igt 4/8] lib/igt_gt: check for presence of GPU reset before using it   Ulrich Hecht
• [Intel-gfx] [PATCH igt 5/8] tests/kms_plane_lowres: skip i915-specific tests on other platforms   Ulrich Hecht
• [Intel-gfx] [PATCH igt 5/8] tests/kms_plane_lowres: skip i915-specific tests on other platforms   Ville Syrjälä
• [Intel-gfx] [PATCH igt 6/8] lib/igt_pm: turn absence of autosuspend_delay_ms from fail to skip   Ulrich Hecht
• [Intel-gfx] [PATCH igt 6/8] lib/igt_pm: turn absence of autosuspend_delay_ms from fail to skip   Ville Syrjälä
• [Intel-gfx] [PATCH igt 7/8] tests/kms_addfb_basic: size_tests(): reduce test buffer size   Ulrich Hecht
• [Intel-gfx] [PATCH igt 7/8] tests/kms_addfb_basic: size_tests(): reduce test buffer size   Daniel Vetter
• [Intel-gfx] [PATCH igt 8/8] test/kms_addfb_basic: tolerate absence of 8-bit format   Ulrich Hecht
• [Intel-gfx] [PATCH igt 8/8] test/kms_addfb_basic: tolerate absence of 8-bit format   Daniel Vetter
• [Intel-gfx] [PATCH igt] Bump measure_ring_size() timer interval   Chris Wilson
• [Intel-gfx] [PATCH igt] Bump measure_ring_size() timer interval   Antonio Argenziano
• [Intel-gfx] [PATCH igt] igt/drv_hangman: Check that the error state does hold the expected state   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/drv_hangman: Check that the error state does hold the expected state   Antonio Argenziano
• [Intel-gfx] [PATCH igt] igt/drv_hangman: Check that the error state does hold the expected state   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_ctx_switch: Measure qlen for timing loops   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_ctx_switch: Measure qlen for timing loops   Joonas Lahtinen
• [Intel-gfx] [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_exec_fence: Exercise merging fences   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gem_mocs_settings: Wait for RC6 EI before polling   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/kms_frontbuffer_tracking: Wait for PSR to be disabled   Daniel Vetter
• [Intel-gfx] [PATCH igt] igt/perf_pmu: Most-busy requires at least one busy engine   Chris Wilson
• [Intel-gfx] [PATCH igt] igt/perf_pmu: Most-busy requires at least one busy engine   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt] igt/perf_pmu: Most-busy requires at least one busy engine   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Antonio Argenziano
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Antonio Argenziano
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Antonio Argenziano
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Antonio Argenziano
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Antonio Argenziano
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Sagar Arun Kamble
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Sagar Arun Kamble
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Sagar Arun Kamble
• [Intel-gfx] [PATCH igt] lib: Fix MI_BATCH_BUFFER_START for hang injection   Chris Wilson
• [Intel-gfx] [PATCH igt] lib: Fix MI_BATCH_BUFFER_START for hang injection   Ville Syrjälä
• [Intel-gfx] [PATCH igt] lib: Fix MI_BATCH_BUFFER_START for hang injection   Chris Wilson
• [Intel-gfx] [PATCH igt] lib: Run gem_test_engine() in an isolated context   Chris Wilson
• [Intel-gfx] [PATCH igt] lib: Run gem_test_engine() in an isolated context   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt] lib: Run gem_test_engine() in an isolated context   Chris Wilson
• [Intel-gfx] [PATCH igt] overlay: Call setlocale around strtod   Chris Wilson
• [Intel-gfx] [PATCH igt] overlay: Call setlocale around strtod   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt] tests/gem_eio: use lib to force a gpu reset   Mika Kuoppala
• [Intel-gfx] [PATCH igt] tests/gem_eio: use lib to force a gpu reset   Chris Wilson
• [Intel-gfx] [PATCH igt] tests/gem_eio: use lib to force a gpu reset   Mika Kuoppala
• [Intel-gfx] [PATCH igt v2] igt/gem_ctx_switch: Exercise all engines at once   Chris Wilson
• [Intel-gfx] [PATCH igt v2] igt/gem_ctx_switch: Exercise all engines at once   Antonio Argenziano
• [Intel-gfx] [PATCH igt v2] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt v2] igt/gen7_forcewake_mt: Make the mmio register as volatile   Ville Syrjälä
• [Intel-gfx] [PATCH igt v2] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt v2] igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Chris Wilson
• [Intel-gfx] [PATCH igt v3] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt v3] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt v3] igt/gen7_forcewake_mt: Make the mmio register as volatile   Tvrtko Ursulin
• [Intel-gfx] [PATCH igt v3] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt v4] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH igt v5] igt/gen7_forcewake_mt: Make the mmio register as volatile   Chris Wilson
• [Intel-gfx] [PATCH libdrm 0/5] improve reuse implementation   James Xiong
• [Intel-gfx] [PATCH libdrm 0/5] improve reuse implementation   Daniel Vetter
• [Intel-gfx] [PATCH libdrm 0/5] improve reuse implementation   Emil Velikov
• [Intel-gfx] [PATCH libdrm 0/5] improve reuse implementation   Xiong, James
• [Intel-gfx] [PATCH libdrm 0/5] improve reuse implementation   Daniel Vetter
• [Intel-gfx] [PATCH libdrm 1/1] intel: allocate buffer with the requested size when reuse is disabled   James Xiong
• [Intel-gfx] [PATCH libdrm 1/1] intel: allocate the requested size when reuse is disabled   James Xiong
• [Intel-gfx] [PATCH libdrm 1/5] drm: add a macro DRMLISTFOREACHENTRYREVERSE   James Xiong
• [Intel-gfx] [PATCH libdrm 2/5] intel: reorganize internal function   James Xiong
• [Intel-gfx] [PATCH libdrm 3/5] intel: get a cached bucket by size   James Xiong
• [Intel-gfx] [PATCH libdrm 4/5] intel: get a cached buffer by size for reuse   James Xiong
• [Intel-gfx] [PATCH libdrm 5/5] intel: purge cached bucket when its cached buffer is evicted   James Xiong
• [Intel-gfx] [PATCH v11 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Jackie Li
• [Intel-gfx] [PATCH v11 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Michal Wajdeczko
• [Intel-gfx] [PATCH v11 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Jackie Li
• [Intel-gfx] [PATCH v11 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Michal Wajdeczko
• [Intel-gfx] [PATCH v11 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Yaodong Li
• [Intel-gfx] [PATCH v11 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size   Jackie Li
• [Intel-gfx] [PATCH v11 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size   Michal Wajdeczko
• [Intel-gfx] [PATCH v11 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0   Jackie Li
• [Intel-gfx] [PATCH v11 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0   Michal Wajdeczko
• [Intel-gfx] [PATCH v11 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0   Yaodong Li
• [Intel-gfx] [PATCH v11 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Jackie Li
• [Intel-gfx] [PATCH v11 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Chris Wilson
• [Intel-gfx] [PATCH v11 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Michal Wajdeczko
• [Intel-gfx] [PATCH v11 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Yaodong Li
• [Intel-gfx] [PATCH v11 6/6] HAX Enable GuC Submission for CI   Jackie Li
• [Intel-gfx] [PATCH v12 00/17] Add support for GuC-based SLPC   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 01/17] drm/i915/guc/slpc: Add SLPC control to enable_guc modparam   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 01/17] drm/i915/guc/slpc: Add SLPC control to enable_guc modparam   Michal Wajdeczko
• [Intel-gfx] [PATCH v12 01/17] drm/i915/guc/slpc: Add SLPC control to enable_guc modparam   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 02/17] drm/i915/guc/slpc: Disable host RPS   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 03/17] drm/i915/guc/slpc: Lay out SLPC init/enable/disable/fini helpers   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 04/17] drm/i915/guc/slpc: Enable SLPC in GuC load control params   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 05/17] drm/i915/guc/slpc: Add SLPC communication interfaces   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 05/17] drm/i915/guc/slpc: Add SLPC communication interfaces   Michal Wajdeczko
• [Intel-gfx] [PATCH v12 05/17] drm/i915/guc/slpc: Add SLPC communication interfaces   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 06/17] drm/i915/guc/slpc: Allocate/initialize/release SLPC shared data   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 07/17] drm/i915/guc/slpc: Send RESET event to restart/enable SLPC tasks   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 08/17] drm/i915/guc/slpc: Send SHUTDOWN event to stop SLPC tasks   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 09/17] drm/i915/guc/slpc: Reset SLPC on engine reset with flag TDR_OCCURRED   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Jackie Li
• [Intel-gfx] [PATCH v12 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Yaodong Li
• [Intel-gfx] [PATCH v12 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Joonas Lahtinen
• [Intel-gfx] [PATCH v12 10/17] drm/i915/guc/slpc: Add parameter set/unset/get, task control/status functions   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 11/17] drm/i915/guc/slpc: Add support for sysfs min/max frequency control   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 12/17] drm/i915/guc/slpc: Add enable/disable controls for SLPC tasks   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 13/17] drm/i915/debugfs: Create generic string tokenize function and update CRC control parsing   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 14/17] drm/i915/guc/slpc: Add debugfs support to read/write/revert the parameters   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 15/17] drm/i915/guc/slpc: Add i915_guc_slpc_info to debugfs   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 16/17] drm/i915/guc/slpc: Add SLPC banner to RPS debugfs interfaces   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 17/17] HAX: drm/i915/guc: Enable GuC   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Jackie Li
• [Intel-gfx] [PATCH v12 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Sagar Arun Kamble
• [Intel-gfx] [PATCH v12 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Yaodong Li
• [Intel-gfx] [PATCH v12 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Joonas Lahtinen
• [Intel-gfx] [PATCH v12 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size   Jackie Li
• [Intel-gfx] [PATCH v12 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size   Joonas Lahtinen
• [Intel-gfx] [PATCH v12 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0   Jackie Li
• [Intel-gfx] [PATCH v12 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0   Joonas Lahtinen
• [Intel-gfx] [PATCH v12 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Jackie Li
• [Intel-gfx] [PATCH v12 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Joonas Lahtinen
• [Intel-gfx] [PATCH v12 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Yaodong Li
• [Intel-gfx] [PATCH v12 6/6] HAX Enable GuC Submission for CI   Jackie Li
• [Intel-gfx] [PATCH v13 00/17] Add NV12 support   Vidya Srinivas
• [Intel-gfx] [PATCH v13 00/17] Add NV12 support   Juha-Pekka Heikkila
• [Intel-gfx] [PATCH v13 00/17] Add NV12 support   Srinivas, Vidya
• [Intel-gfx] [PATCH v13 01/17] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values   Vidya Srinivas
• [Intel-gfx] [PATCH v13 02/17] drm/i915/skl+: refactor WM calculation for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v13 03/17] drm/i915/skl+: add NV12 in skl_format_to_fourcc   Vidya Srinivas
• [Intel-gfx] [PATCH v13 04/17] drm/i915/skl+: support verification of DDB HW state for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v13 05/17] drm/i915/skl+: NV12 related changes for WM   Vidya Srinivas
• [Intel-gfx] [PATCH v13 06/17] drm/i915/skl+: pass skl_wm_level struct to wm compute func   Vidya Srinivas
• [Intel-gfx] [PATCH v13 07/17] drm/i915/skl+: make sure higher latency level has higher wm value   Vidya Srinivas
• [Intel-gfx] [PATCH v13 08/17] drm/i915/skl+: nv12 workaround disable WM level 1-7   Vidya Srinivas
• [Intel-gfx] [PATCH v13 09/17] drm/i915/skl: split skl_compute_ddb function   Vidya Srinivas
• [Intel-gfx] [PATCH v13 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Jackie Li
• [Intel-gfx] [PATCH v13 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Joonas Lahtinen
• [Intel-gfx] [PATCH v13 10/17] drm/i915: Set scaler mode for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v13 11/17] drm/i915: Update format_is_yuv() to include NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Maarten Lankhorst
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Maarten Lankhorst
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Maarten Lankhorst
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Ville Syrjälä
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Maarten Lankhorst
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Ville Syrjälä
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Maarten Lankhorst
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v13 12/17] drm/i915: Upscale scaler max scale for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v13 13/17] drm/i915: Add NV12 as supported format for primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v13 14/17] drm/i915: Add NV12 as supported format for sprite plane   Vidya Srinivas
• [Intel-gfx] [PATCH v13 15/17] drm/i915: Add NV12 support to intel_framebuffer_init   Vidya Srinivas
• [Intel-gfx] [PATCH v13 16/17] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg   Vidya Srinivas
• [Intel-gfx] [PATCH v13 17/17] drm/i915: Display WA 827   Vidya Srinivas
• [Intel-gfx] [PATCH v13 17/17] drm/i915: Display WA 827   Juha-Pekka Heikkila
• [Intel-gfx] [PATCH v13 17/17] drm/i915: Display WA 827   Maarten Lankhorst
• [Intel-gfx] [PATCH v13 17/17] drm/i915: Display WA 827   Srinivas, Vidya
• [Intel-gfx] [PATCH v13 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Jackie Li
• [Intel-gfx] [PATCH v13 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation   Joonas Lahtinen
• [Intel-gfx] [PATCH v13 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size   Jackie Li
• [Intel-gfx] [PATCH v13 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size   Joonas Lahtinen
• [Intel-gfx] [PATCH v13 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0   Jackie Li
• [Intel-gfx] [PATCH v13 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0   Joonas Lahtinen
• [Intel-gfx] [PATCH v13 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Jackie Li
• [Intel-gfx] [PATCH v13 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers   Joonas Lahtinen
• [Intel-gfx] [PATCH v13 6/6] HAX Enable GuC Submission for CI   Jackie Li
• [Intel-gfx] [PATCH v14 00/17] Add NV12 support   Vidya Srinivas
• [Intel-gfx] [PATCH v14 01/17] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values   Vidya Srinivas
• [Intel-gfx] [PATCH v14 02/17] drm/i915/skl+: refactor WM calculation for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v14 03/17] drm/i915/skl+: add NV12 in skl_format_to_fourcc   Vidya Srinivas
• [Intel-gfx] [PATCH v14 04/17] drm/i915/skl+: support verification of DDB HW state for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v14 05/17] drm/i915/skl+: NV12 related changes for WM   Vidya Srinivas
• [Intel-gfx] [PATCH v14 06/17] drm/i915/skl+: pass skl_wm_level struct to wm compute func   Vidya Srinivas
• [Intel-gfx] [PATCH v14 07/17] drm/i915/skl+: make sure higher latency level has higher wm value   Vidya Srinivas
• [Intel-gfx] [PATCH v14 08/17] drm/i915/skl+: nv12 workaround disable WM level 1-7   Vidya Srinivas
• [Intel-gfx] [PATCH v14 09/17] drm/i915/skl: split skl_compute_ddb function   Vidya Srinivas
• [Intel-gfx] [PATCH v14 10/17] drm/i915: Set scaler mode for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v14 11/17] drm/i915: Update format_is_yuv() to include NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v14 12/17] drm/i915: Upscale scaler max scale for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v14 13/17] drm/i915: Add NV12 as supported format for primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v14 14/17] drm/i915: Add NV12 as supported format for sprite plane   Vidya Srinivas
• [Intel-gfx] [PATCH v14 15/17] drm/i915: Add NV12 support to intel_framebuffer_init   Vidya Srinivas
• [Intel-gfx] [PATCH v14 16/17] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg   Vidya Srinivas
• [Intel-gfx] [PATCH v14 17/17] drm/i915: Display WA 827   Vidya Srinivas
• [Intel-gfx] [PATCH v14 5/6] drm/i915: add query uAPI   Joonas Lahtinen
• [Intel-gfx] [PATCH v14 5/6] drm/i915: add query uAPI   Lionel Landwerlin
• [Intel-gfx] [PATCH v14 6/6] drm/i915: expose rcs topology through query uAPI   Joonas Lahtinen
• [Intel-gfx] [PATCH v15 00/18] Add NV12 support   Vidya Srinivas
• [Intel-gfx] [PATCH v15 01/18] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values   Vidya Srinivas
• [Intel-gfx] [PATCH v15 02/18] drm/i915/skl+: refactor WM calculation for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v15 03/18] drm/i915/skl+: add NV12 in skl_format_to_fourcc   Vidya Srinivas
• [Intel-gfx] [PATCH v15 04/18] drm/i915/skl+: support verification of DDB HW state for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v15 05/18] drm/i915/skl+: NV12 related changes for WM   Vidya Srinivas
• [Intel-gfx] [PATCH v15 06/18] drm/i915/skl+: pass skl_wm_level struct to wm compute func   Vidya Srinivas
• [Intel-gfx] [PATCH v15 07/18] drm/i915/skl+: make sure higher latency level has higher wm value   Vidya Srinivas
• [Intel-gfx] [PATCH v15 08/18] drm/i915/skl+: nv12 workaround disable WM level 1-7   Vidya Srinivas
• [Intel-gfx] [PATCH v15 09/18] drm/i915/skl: split skl_compute_ddb function   Vidya Srinivas
• [Intel-gfx] [PATCH v15 10/18] drm/i915: Set scaler mode for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v15 11/18] drm/i915: Update format_is_yuv() to include NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v15 12/18] drm/i915: Upscale scaler max scale for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v15 13/18] drm/i915: Add NV12 as supported format for primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v15 14/18] drm/i915: Add NV12 as supported format for sprite plane   Vidya Srinivas
• [Intel-gfx] [PATCH v15 15/18] drm/i915: Add NV12 support to intel_framebuffer_init   Vidya Srinivas
• [Intel-gfx] [PATCH v15 16/18] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg   Vidya Srinivas
• [Intel-gfx] [PATCH v15 17/18] drm/i915: Display WA 827   Vidya Srinivas
• [Intel-gfx] [PATCH v15 18/18] drm/i915: Add checks to primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v16 00/18] Add NV12 support   Vidya Srinivas
• [Intel-gfx] [PATCH v16 01/18] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values   Vidya Srinivas
• [Intel-gfx] [PATCH v16 02/18] drm/i915/skl+: refactor WM calculation for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v16 03/18] drm/i915/skl+: add NV12 in skl_format_to_fourcc   Vidya Srinivas
• [Intel-gfx] [PATCH v16 04/18] drm/i915/skl+: support verification of DDB HW state for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v16 05/18] drm/i915/skl+: NV12 related changes for WM   Vidya Srinivas
• [Intel-gfx] [PATCH v16 06/18] drm/i915/skl+: pass skl_wm_level struct to wm compute func   Vidya Srinivas
• [Intel-gfx] [PATCH v16 07/18] drm/i915/skl+: make sure higher latency level has higher wm value   Vidya Srinivas
• [Intel-gfx] [PATCH v16 08/18] drm/i915/skl+: nv12 workaround disable WM level 1-7   Vidya Srinivas
• [Intel-gfx] [PATCH v16 09/18] drm/i915/skl: split skl_compute_ddb function   Vidya Srinivas
• [Intel-gfx] [PATCH v16 10/18] drm/i915: Set scaler mode for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v16 11/18] drm/i915: Update format_is_yuv() to include NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v16 12/18] drm/i915: Upscale scaler max scale for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v16 13/18] drm/i915: Add NV12 as supported format for primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v16 14/18] drm/i915: Add NV12 as supported format for sprite plane   Vidya Srinivas
• [Intel-gfx] [PATCH v16 15/18] drm/i915: Add NV12 support to intel_framebuffer_init   Vidya Srinivas
• [Intel-gfx] [PATCH v16 16/18] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg   Vidya Srinivas
• [Intel-gfx] [PATCH v16 17/18] drm/i915: Display WA 827   Vidya Srinivas
• [Intel-gfx] [PATCH v16 18/18] drm/i915: Add checks to primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v17 0/6] drm/i915: expose RCS topology to userspace   Lionel Landwerlin
• [Intel-gfx] [PATCH v17 00/19] Add NV12 support   Vidya Srinivas
• [Intel-gfx] [PATCH v17 01/19] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values   Vidya Srinivas
• [Intel-gfx] [PATCH v17 02/19] drm/i915/skl+: refactor WM calculation for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v17 03/19] drm/i915/skl+: add NV12 in skl_format_to_fourcc   Vidya Srinivas
• [Intel-gfx] [PATCH v17 04/19] drm/i915/skl+: support verification of DDB HW state for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v17 05/19] drm/i915/skl+: NV12 related changes for WM   Vidya Srinivas
• [Intel-gfx] [PATCH v17 06/19] drm/i915/skl+: pass skl_wm_level struct to wm compute func   Vidya Srinivas
• [Intel-gfx] [PATCH v17 07/19] drm/i915/skl+: make sure higher latency level has higher wm value   Vidya Srinivas
• [Intel-gfx] [PATCH v17 08/19] drm/i915/skl+: nv12 workaround disable WM level 1-7   Vidya Srinivas
• [Intel-gfx] [PATCH v17 09/19] drm/i915/skl: split skl_compute_ddb function   Vidya Srinivas
• [Intel-gfx] [PATCH v17 1/6] drm/i915: store all subslice masks   Lionel Landwerlin
• [Intel-gfx] [PATCH v17 10/19] drm/i915: Set scaler mode for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v17 11/19] drm/i915: Update format_is_yuv() to include NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v17 12/19] drm/i915: Upscale scaler max scale for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v17 13/19] drm/i915: Add NV12 as supported format for primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v17 14/19] drm/i915: Add NV12 as supported format for sprite plane   Vidya Srinivas
• [Intel-gfx] [PATCH v17 15/19] drm/i915: Add NV12 support to intel_framebuffer_init   Vidya Srinivas
• [Intel-gfx] [PATCH v17 16/19] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg   Vidya Srinivas
• [Intel-gfx] [PATCH v17 17/19] drm/i915: Display WA 827   Vidya Srinivas
• [Intel-gfx] [PATCH v17 18/19] drm/i915: Add checks to primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v17 19/19] drm/i915: Do not truncate fb sizes for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v17 2/6] drm/i915/debugfs: reuse max slice/subslices already stored in sseu   Lionel Landwerlin
• [Intel-gfx] [PATCH v17 3/6] drm/i915/debugfs: add rcs topology entry   Lionel Landwerlin
• [Intel-gfx] [PATCH v17 4/6] drm/i915: add rcs topology to error state   Lionel Landwerlin
• [Intel-gfx] [PATCH v17 5/6] drm/i915: add query uAPI   Lionel Landwerlin
• [Intel-gfx] [PATCH v17 6/6] drm/i915: expose rcs topology through query uAPI   Lionel Landwerlin
• [Intel-gfx] [PATCH v18 00/18] Add NV12 support   Vidya Srinivas
• [Intel-gfx] [PATCH v18 01/18] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values   Vidya Srinivas
• [Intel-gfx] [PATCH v18 02/18] drm/i915/skl+: refactor WM calculation for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v18 03/18] drm/i915/skl+: add NV12 in skl_format_to_fourcc   Vidya Srinivas
• [Intel-gfx] [PATCH v18 04/18] drm/i915/skl+: support verification of DDB HW state for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v18 05/18] drm/i915/skl+: NV12 related changes for WM   Vidya Srinivas
• [Intel-gfx] [PATCH v18 06/18] drm/i915/skl+: pass skl_wm_level struct to wm compute func   Vidya Srinivas
• [Intel-gfx] [PATCH v18 07/18] drm/i915/skl+: make sure higher latency level has higher wm value   Vidya Srinivas
• [Intel-gfx] [PATCH v18 08/18] drm/i915/skl+: nv12 workaround disable WM level 1-7   Vidya Srinivas
• [Intel-gfx] [PATCH v18 09/18] drm/i915/skl: split skl_compute_ddb function   Vidya Srinivas
• [Intel-gfx] [PATCH v18 10/18] drm/i915: Set scaler mode for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v18 11/18] drm/i915: Update format_is_yuv() to include NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v18 12/18] drm/i915: Upscale scaler max scale for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v18 13/18] drm/i915: Add NV12 as supported format for primary plane   Vidya Srinivas
• [Intel-gfx] [PATCH v18 14/18] drm/i915: Add NV12 as supported format for sprite plane   Vidya Srinivas
• [Intel-gfx] [PATCH v18 15/18] drm/i915: Add NV12 support to intel_framebuffer_init   Vidya Srinivas
• [Intel-gfx] [PATCH v18 16/18] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg   Vidya Srinivas
• [Intel-gfx] [PATCH v18 17/18] drm/i915: Display WA 827   Vidya Srinivas
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Vidya Srinivas
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Maarten Lankhorst
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Ville Syrjälä
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Ville Syrjälä
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Maarten Lankhorst
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Srinivas, Vidya
• [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12   Ville Syrjälä
• [Intel-gfx] [PATCH v1] drm/i915/gen11: Preempt-to-idle support in execlists.   Tomasz Lis
• [Intel-gfx] [PATCH v1] drm/i915/gen11: Preempt-to-idle support in execlists.   Chris Wilson
• [Intel-gfx] [PATCH v1] drm/i915/gen11: Preempt-to-idle support in execlists.   Lis, Tomasz
• [Intel-gfx] [PATCH v1] drm/i915/gen11: Preempt-to-idle support in execlists.   Chris Wilson
• [Intel-gfx] [PATCH v1] drm/i915/gen11: Preempt-to-idle support in execlists.   Lis, Tomasz
• [Intel-gfx] [PATCH v1] drm/i915/gen11: Preempt-to-idle support in execlists.   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v1] drm/i915/gen11: Preempt-to-idle support in execlists.   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v1] drm/i915: Add Exec param to control data port coherency.   Tomasz Lis
• [Intel-gfx] [PATCH v1] drm/i915: Add Exec param to control data port coherency.   kbuild test robot
• [Intel-gfx] [PATCH v2 0/1] Documentation patch for batchbuffer submission   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v2 0/3] drm/i915/perf: enable perf support on ICL   Lionel Landwerlin
• [Intel-gfx] [PATCH v2 0/3] drm/i915/uc: Sanitize uC   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 0/4] drm/i915: misc fixes in headers (RESEND)   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 0/4] drm/i915: misc fixes in headers (RESEND)   Chris Wilson
• [Intel-gfx] [PATCH v2 0/4] drm/i915: misc fixes in headers (RESEND)   Jani Nikula
• [Intel-gfx] [PATCH v2 0/4] drm/i915: misc fixes in headers (RESEND)   Petri Latvala
• [Intel-gfx] [PATCH v2 0/4] drm/i915: misc fixes in headers (RESEND)   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 0/4] drm/i915: misc fixes in headers (RESEND)   Arkadiusz Hiler
• [Intel-gfx] [PATCH v2 0/4] HDCP1.4 fixes   Ramalingam C
• [Intel-gfx] [PATCH v2 0/4] HDCP1.4 fixes   Ramalingam C
• [Intel-gfx] [PATCH v2 0/7] drm/i915: move dpll_info inside intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH v2 00/42] drm/i915: Implement HDCP2.2   Ramalingam C
• [Intel-gfx] [PATCH v2 00/42] drm/i915: Implement HDCP2.2   Winkler, Tomas
• [Intel-gfx] [PATCH v2 00/42] drm/i915: Implement HDCP2.2   Ramalingam C
• [Intel-gfx] [PATCH v2 00/42] drm/i915: Implement HDCP2.2   Daniel Vetter
• [Intel-gfx] [PATCH v2 00/42] drm/i915: Implement HDCP2.2   Ramalingam C
• [Intel-gfx] [PATCH v2 01/10] drm: Add DP PSR2 sink enable bit   José Roberto de Souza
• [Intel-gfx] [PATCH v2 01/15] drm/i915/guc: Tidy guc_log_control   Michał Winiarski
• [Intel-gfx] [PATCH v2 01/15] drm/i915/guc: Tidy guc_log_control   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 01/42] drm: hdcp2.2 authentication msg definitions   Ramalingam C
• [Intel-gfx] [PATCH v2 02/10] drm: Add DP last received PSR SDP VSC register and bits   José Roberto de Souza
• [Intel-gfx] [PATCH v2 02/15] drm/i915/guc: Create common entry points for log register/unregister   Michał Winiarski
• [Intel-gfx] [PATCH v2 02/15] drm/i915/guc: Create common entry points for log register/unregister   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 02/42] drm: HDMI and DP specific HDCP2.2 defines   Ramalingam C
• [Intel-gfx] [PATCH v2 03/10] drm/i915/psr: Nuke aux frame sync   José Roberto de Souza
• [Intel-gfx] [PATCH v2 03/15] drm/i915/guc: Move GuC notification handling to separate function   Michał Winiarski
• [Intel-gfx] [PATCH v2 03/15] drm/i915/guc: Move GuC notification handling to separate function   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 03/42] mei: bus: whitelist hdcp client   Ramalingam C
• [Intel-gfx] [PATCH v2 04/10] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   José Roberto de Souza
• [Intel-gfx] [PATCH v2 04/13] drm/i915/guc: Flush directly in log unregister   Michał Winiarski
• [Intel-gfx] [PATCH v2 04/15] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Michał Winiarski
• [Intel-gfx] [PATCH v2 04/42] misc/mei/hdcp: Client driver for HDCP application   Ramalingam C
• [Intel-gfx] [PATCH v2 04/42] misc/mei/hdcp: Client driver for HDCP application   Winkler, Tomas
• [Intel-gfx] [PATCH v2 04/42] misc/mei/hdcp: Client driver for HDCP application   Ramalingam C
• [Intel-gfx] [PATCH v2 04/42] misc/mei/hdcp: Client driver for HDCP application   Ramalingam C
• [Intel-gfx] [PATCH v2 04/42] misc/mei/hdcp: Client driver for HDCP application   Winkler, Tomas
• [Intel-gfx] [PATCH v2 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source   José Roberto de Souza
• [Intel-gfx] [PATCH v2 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Michał Winiarski
• [Intel-gfx] [PATCH v2 05/15] drm/i915/guc: Log runtime should consist of both mapping and relay   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 05/42] misc/mei/hdcp: Add KBuild for mei hdcp driver   Ramalingam C
• [Intel-gfx] [PATCH v2 06/10] drm/i915/psr: Do not override PSR2 sink support   José Roberto de Souza
• [Intel-gfx] [PATCH v2 06/13] drm/i915/guc: Move check for fast memcpy_wc to relay creation   Michał Winiarski
• [Intel-gfx] [PATCH v2 06/15] drm/i915/guc: Merge log relay file and channel creation   Michał Winiarski
• [Intel-gfx] [PATCH v2 06/15] drm/i915/guc: Merge log relay file and channel creation   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 06/42] misc/mei/hdcp: Verify mei client device status   Ramalingam C
• [Intel-gfx] [PATCH v2 06/42] misc/mei/hdcp: Verify mei client device status   Winkler, Tomas
• [Intel-gfx] [PATCH v2 06/42] misc/mei/hdcp: Verify mei client device status   Ramalingam C
• [Intel-gfx] [PATCH v2 07/10] drm/i915/psr: Use PSR2 macro for PSR2   José Roberto de Souza
• [Intel-gfx] [PATCH v2 07/13] drm/i915/guc: Get rid of GuC log runtime   Michał Winiarski
• [Intel-gfx] [PATCH v2 07/15] drm/i915/guc: Flush directly in log unregister   Michał Winiarski
• [Intel-gfx] [PATCH v2 07/15] drm/i915/guc: Flush directly in log unregister   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 07/42] misc/mei/hdcp: Get & Put for mei cl_device   Ramalingam C
• [Intel-gfx] [PATCH v2 07/42] misc/mei/hdcp: Get & Put for mei cl_device   Winkler, Tomas
• [Intel-gfx] [PATCH v2 07/42] misc/mei/hdcp: Get & Put for mei cl_device   Ramalingam C
• [Intel-gfx] [PATCH v2 08/10] drm/i915/psr: Cache sink synchronization latency   José Roberto de Souza
• [Intel-gfx] [PATCH v2 08/15] drm/i915/guc: Split relay control and GuC log level   Michał Winiarski
• [Intel-gfx] [PATCH v2 08/15] drm/i915/guc: Split relay control and GuC log level   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 08/15] drm/i915/guc: Split relay control and GuC log level   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 08/15] drm/i915/guc: Split relay control and GuC log level   Michał Winiarski
• [Intel-gfx] [PATCH v2 08/15] drm/i915/guc: Split relay control and GuC log level   Chris Wilson
• [Intel-gfx] [PATCH v2 08/42] misc/mei/hdcp: Define ME FW interface for HDCP2.2   Ramalingam C
• [Intel-gfx] [PATCH v2 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed   José Roberto de Souza
• [Intel-gfx] [PATCH v2 09/15] drm/i915/guc: Move check for fast memcpy_wc to relay creation   Michał Winiarski
• [Intel-gfx] [PATCH v2 09/42] linux/mei: Header for mei_hdcp driver interface   Ramalingam C
• [Intel-gfx] [PATCH v2 09/42] linux/mei: Header for mei_hdcp driver interface   Winkler, Tomas
• [Intel-gfx] [PATCH v2 09/42] linux/mei: Header for mei_hdcp driver interface   Ramalingam C
• [Intel-gfx] [PATCH v2 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 1/1] i915: additional GEM documentation   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v2 1/1] i915: additional GEM documentation   Abdiel Janulgue
• [Intel-gfx] [PATCH v2 1/1] i915: additional GEM documentation   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2 1/1] i915: additional GEM documentation   Rogovin, Kevin
• [Intel-gfx] [PATCH v2 1/2] drm/i915/huc: Mark firmware as failed on auth failure   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/2] drm/i915/huc: Mark firmware as failed on auth failure   Chris Wilson
• [Intel-gfx] [PATCH v2 1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Chris Wilson
• [Intel-gfx] [PATCH v2 1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Jani Nikula
• [Intel-gfx] [PATCH v2 1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2 1/2] trace: Default to using trace_global_clock if sched_clock is unstable   Chris Wilson
• [Intel-gfx] [PATCH v2 1/3] drm/i915/error: remove unused gen8_engine_sync_index   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 1/3] drm/i915/frontbuffer: Pull frontbuffer_flush out of gem_obj_pin_to_display   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 1/3] drm/i915/frontbuffer: Pull frontbuffer_flush out of gem_obj_pin_to_display   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/3] drm/i915/frontbuffer: Pull frontbuffer_flush out of gem_obj_pin_to_display   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 1/3] drm/i915/frontbuffer: Pull frontbuffer_flush out of gem_obj_pin_to_display   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 1/3] drm/i915/guc: Unify naming of private GuC action functions   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/3] drm/i915/guc: Unify naming of private GuC action functions   Michał Winiarski
• [Intel-gfx] [PATCH v2 1/3] drm/i915/icl: read timestamp frequency information   Lionel Landwerlin
• [Intel-gfx] [PATCH v2 1/3] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Chris Wilson
• [Intel-gfx] [PATCH v2 1/3] drm/i915/uc: Sanitize uC options early   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/3] drm/i915: Reorder early initialization   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/3] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 1/3] drm/i915: store all mmio bases in intel_engines   Chris Wilson
• [Intel-gfx] [PATCH v2 1/3] drm: Add the optional .fb_modifier() hook   Ville Syrjala
• [Intel-gfx] [PATCH v2 1/3] drm: Add the optional .fb_modifier() hook   Michel Dänzer
• [Intel-gfx] [PATCH v2 1/3] drm: Add the optional .fb_modifier() hook   Ville Syrjälä
• [Intel-gfx] [PATCH v2 1/3] drm: Add the optional .fb_modifier() hook   Michel Dänzer
• [Intel-gfx] [PATCH v2 1/3] drm: Add the optional .fb_modifier() hook   Daniel Vetter
• [Intel-gfx] [PATCH v2 1/3] drm: Add the optional .fb_modifier() hook   Michel Dänzer
• [Intel-gfx] [PATCH v2 1/3] drm: Add the optional .fb_modifier() hook   Ville Syrjälä
• [Intel-gfx] [PATCH v2 1/3] drm: Make sure at least one plane supports the fb format   Ville Syrjala
• [Intel-gfx] [PATCH v2 1/3] drm: Make sure at least one plane supports the fb format   Ville Syrjälä
• [Intel-gfx] [PATCH v2 1/3] drm: Make sure at least one plane supports the fb format   Ville Syrjälä
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes   Jackie Li
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Enable edp psr error interrupts on hsw   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Chris Wilson
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Include i915_reg.h in intel_ringbuffer.h   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Read HDCP R0 thrice in case of mismatch   Ramalingam C
• [Intel-gfx] [PATCH v2 1/4] drm/i915: Read HDCP R0 thrice in case of mismatch   Sean Paul
• [Intel-gfx] [PATCH v2 1/5] drm/i915/psr: Nuke aux_frame_sync   José Roberto de Souza
• [Intel-gfx] [PATCH v2 1/5] drm/i915/psr: Nuke aux_frame_sync   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 1/7] drm/i915: move dpll_info to header   Lucas De Marchi
• [Intel-gfx] [PATCH v2 10/10] drm/i915/debugfs: Print sink PSR status   José Roberto de Souza
• [Intel-gfx] [PATCH v2 10/11] drm/i915: Extract skl_universal_plane_init()   Ville Syrjala
• [Intel-gfx] [PATCH v2 10/15] drm/i915/guc: Get rid of GuC log runtime   Michał Winiarski
• [Intel-gfx] [PATCH v2 10/15] drm/i915/guc: Get rid of GuC log runtime   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 10/42] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session   Ramalingam C
• [Intel-gfx] [PATCH v2 10/42] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session   Winkler, Tomas
• [Intel-gfx] [PATCH v2 10/42] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session   Ramalingam C
• [Intel-gfx] [PATCH v2 10/42] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session   Winkler, Tomas
• [Intel-gfx] [PATCH v2 10/42] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session   Ramalingam C
• [Intel-gfx] [PATCH v2 11/13] drm/i915/guc: Default to non-verbose GuC logging   Michał Winiarski
• [Intel-gfx] [PATCH v2 11/42] misc/mei/hdcp: Verify Receiver Cert and prepare km   Ramalingam C
• [Intel-gfx] [PATCH v2 12/14] drm/i915: Clean up DP pipe select bits   Ville Syrjala
• [Intel-gfx] [PATCH v2 12/15] drm/i915/guc: Don't print out relay statistics when relay is disabled   Michał Winiarski
• [Intel-gfx] [PATCH v2 12/15] drm/i915/guc: Don't print out relay statistics when relay is disabled   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 12/42] misc/mei/hdcp: Verify H_prime   Ramalingam C
• [Intel-gfx] [PATCH v2 13/15] drm/i915/guc: Allow user to control default GuC logging   Michał Winiarski
• [Intel-gfx] [PATCH v2 13/23] drm/zte: Stop consulting plane->fb   Ville Syrjala
• [Intel-gfx] [PATCH v2 13/23] drm/zte: Stop consulting plane->fb   Shawn Guo
• [Intel-gfx] [PATCH v2 13/42] misc/mei/hdcp: Store the HDCP Pairing info   Ramalingam C
• [Intel-gfx] [PATCH v2 14/15] drm/i915/guc: Default to non-verbose GuC logging   Michał Winiarski
• [Intel-gfx] [PATCH v2 14/15] drm/i915/guc: Default to non-verbose GuC logging   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2 14/42] misc/mei/hdcp: Initiate Locality check   Ramalingam C
• [Intel-gfx] [PATCH v2 15/42] misc/mei/hdcp: Verify L_prime   Ramalingam C
• [Intel-gfx] [PATCH v2 16/42] misc/mei/hdcp: Prepare Session Key   Ramalingam C
• [Intel-gfx] [PATCH v2 17/42] misc/mei/hdcp: Repeater topology verifcation and ack   Ramalingam C
• [Intel-gfx] [PATCH v2 18/42] misc/mei/hdcp: Verify M_prime   Ramalingam C
• [Intel-gfx] [PATCH v2 19/42] misc/mei/hdcp: Enabling the HDCP authentication   Ramalingam C
• [Intel-gfx] [PATCH v2 2/2] drm/i915: hint gen and gen_mask shouldn't be used directly   Jani Nikula
• [Intel-gfx] [PATCH v2 2/2] drm/i915: hint gen and gen_mask shouldn't be used directly   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Ville Syrjala
• [Intel-gfx] [PATCH v2 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Noralf Trønnes
• [Intel-gfx] [PATCH v2 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   David Lechner
• [Intel-gfx] [PATCH v2 2/2] drm/tinydrm: Make fb_dirty into a lower level hook   Ville Syrjälä
• [Intel-gfx] [PATCH v2 2/2] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/2] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/2] trace: Mention trace_clock=global when warning about unstable clocks   Chris Wilson
• [Intel-gfx] [PATCH v2 2/3] drm/i915/error: standardize function style in error capture   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 2/3] drm/i915/error: standardize function style in error capture   Michel Thierry
• [Intel-gfx] [PATCH v2 2/3] drm/i915/error: standardize function style in error capture   Chris Wilson
• [Intel-gfx] [PATCH v2 2/3] drm/i915/error: standardize function style in error capture   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/3] drm/i915/error: standardize function style in error capture   Chris Wilson
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Chris Wilson
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 2/3] drm/i915/frontbuffer: HW tracking for cursor moves to fix PSR lags.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 2/3] drm/i915/guc: Drop union guc_log_control   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/3] drm/i915/guc: Drop union guc_log_control   Michał Winiarski
• [Intel-gfx] [PATCH v2 2/3] drm/i915/guc: Drop union guc_log_control   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/3] drm/i915/perf: enable perf support on ICL   Lionel Landwerlin
• [Intel-gfx] [PATCH v2 2/3] drm/i915/stolen: Checkpatch cleansing   Chris Wilson
• [Intel-gfx] [PATCH v2 2/3] drm/i915/uc: Fetch uC firmware in init_early   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/3] drm/i915/uc: Sanitize uC together with GEM   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/3] drm/i915/uc: Sanitize uC together with GEM   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 2/3] drm/i915: add a selftest for the mmio_bases table   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 2/3] drm/i915: add a selftest for the mmio_bases table   Chris Wilson
• [Intel-gfx] [PATCH v2 2/3] drm/i915: add a selftest for the mmio_bases table   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 2/3] drm/i915: Eliminate the horrendous format check code   Ville Syrjala
• [Intel-gfx] [PATCH v2 2/3 drm: Check property/enum name length   Ville Syrjala
• [Intel-gfx] [PATCH v2 2/3 drm: Check property/enum name length   Daniel Vetter
• [Intel-gfx] [PATCH v2 2/3 drm: Check property/enum name length   Ville Syrjälä
• [Intel-gfx] [PATCH v2 2/4] drm/i915: Always set HUC_LOADING_AGENT_GUC bit in WOPCM offset register   Jackie Li
• [Intel-gfx] [PATCH v2 2/4] drm/i915: Change parameters order in i915_gem_batch_pool_init   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/4] drm/i915: Change parameters order in i915_gem_batch_pool_init   Chris Wilson
• [Intel-gfx] [PATCH v2 2/4] drm/i915: Change parameters order in i915_gem_batch_pool_init   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 2/4] drm/i915: Enable edp psr error interrupts on bdw+   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 2/4] drm/i915: Read Vprime thrice incase of mismatch   Ramalingam C
• [Intel-gfx] [PATCH v2 2/4] drm/i915: Read Vprime thrice incase of mismatch   Sean Paul
• [Intel-gfx] [PATCH v2 2/5] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   José Roberto de Souza
• [Intel-gfx] [PATCH v2 2/5] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 2/5] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 2/5] drm/i915/psr: Tie PSR2 support to Y coordinate requirement in intel_psr_init_dpcd()   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 2/6] drm/i915: Move DP modeset retry work into intel_dp   Lyude Paul
• [Intel-gfx] [PATCH v2 2/6] drm/i915: Move DP modeset retry work into intel_dp   Manasi Navare
• [Intel-gfx] [PATCH v2 2/7] drm/i915: add dpll_info inside intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH v2 20/23] drm/virtio: Stop updating plane->crtc   Ville Syrjala
• [Intel-gfx] [PATCH v2 20/42] misc/mei/hdcp: Closing wired HDCP2.2 Tx Session   Ramalingam C
• [Intel-gfx] [PATCH v2 21/42] drm/i915: wrapping all hdcp var into intel_hdcp   Ramalingam C
• [Intel-gfx] [PATCH v2 22/42] drm/i915: Define HDCP2.2 related variables   Ramalingam C
• [Intel-gfx] [PATCH v2 23/23] drm/i915: Make force_load_detect effective even w/ DMI quirks/hotplug   Ville Syrjala
• [Intel-gfx] [PATCH v2 23/42] drm/i915: Define Intel HDCP2.2 registers   Ramalingam C
• [Intel-gfx] [PATCH v2 24/42] drm/i915: Wrappers for mei HDCP2.2 services   Ramalingam C
• [Intel-gfx] [PATCH v2 25/42] drm/i915: Implement HDCP2.2 receiver authentication   Ramalingam C
• [Intel-gfx] [PATCH v2 26/42] drm/i915: Implement HDCP2.2 repeater authentication   Ramalingam C
• [Intel-gfx] [PATCH v2 27/42] drm/i915: Enable and Disable HDCP2.2 port encryption   Ramalingam C
• [Intel-gfx] [PATCH v2 28/42] drm/i915: Implement HDCP2.2 En/Dis-able   Ramalingam C
• [Intel-gfx] [PATCH v2 29/42] drm/i915: Implement HDCP2.2 link integrity check   Ramalingam C
• [Intel-gfx] [PATCH v2 3/3] drm/i915/error: capture uc_state after gen_state   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 3/3] drm/i915/error: capture uc_state after gen_state   Chris Wilson
• [Intel-gfx] [PATCH v2 3/3] drm/i915/error: capture uc_state after gen_state   Chris Wilson
• [Intel-gfx] [PATCH v2 3/3] drm/i915/guc: Move enable/disable msg functions to GuC header   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 3/3] drm/i915/guc: Move enable/disable msg functions to GuC header   Michał Winiarski
• [Intel-gfx] [PATCH v2 3/3] drm/i915/perf: use IS_GEN() instead an or condition   Lionel Landwerlin
• [Intel-gfx] [PATCH v2 3/3] drm/i915/psr: Use more PSR HW tracking.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 3/3] drm/i915/psr: Use more PSR HW tracking.   Souza, Jose
• [Intel-gfx] [PATCH v2 3/3] drm/i915/psr: Use more PSR HW tracking.   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 3/3] drm/i915/psr: Use more PSR HW tracking.   Souza, Jose
• [Intel-gfx] [PATCH v2 3/3] drm/i915/psr: Use more PSR HW tracking.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 3/3] drm/i915/stolen: Deduce base of reserved portion as top-size on vlv   Chris Wilson
• [Intel-gfx] [PATCH v2 3/3] drm/i915/stolen: Deduce base of reserved portion as top-size on vlv   Ville Syrjälä
• [Intel-gfx] [PATCH v2 3/3] drm/i915/stolen: Deduce base of reserved portion as top-size on vlv   Chris Wilson
• [Intel-gfx] [PATCH v2 3/3] drm/i915: move gen8 irq shifts to intel_lrc.c   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2 3/3] drm/i915: move gen8 irq shifts to intel_lrc.c   Chris Wilson
• [Intel-gfx] [PATCH v2 3/3] drm: Add BT.2020 constant luminance enum value for the COLOR_ENCODING property   Ville Syrjala
• [Intel-gfx] [PATCH v2 3/3] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 3/3] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Ville Syrjälä
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Chris Wilson
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Ville Syrjälä
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 3/4] drm/i915/psr: Control PSR interrupts via debugfs   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 3/4] drm/i915: Add code to accept valid locked WOPCM register values   Jackie Li
• [Intel-gfx] [PATCH v2 3/4] drm/i915: Check hdcp key loadability   Ramalingam C
• [Intel-gfx] [PATCH v2 3/4] drm/i915: Check hdcp key loadability   Ville Syrjälä
• [Intel-gfx] [PATCH v2 3/4] drm/i915: Make header i915_pmu.h more robust   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 3/4] drm/i915: Make header i915_pmu.h more robust   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2 3/4] drm/i915: Make header i915_pmu.h more robust   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 3/5] drm/i915/psr/cnl: Enable Y-coordinate support in source   José Roberto de Souza
• [Intel-gfx] [PATCH v2 3/5] drm/i915/psr/cnl: Enable Y-coordinate support in source   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 3/5] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook   Manasi Navare
• [Intel-gfx] [PATCH v2 3/6] drm: Verify gamma/degamma LUT size   Ville Syrjala
• [Intel-gfx] [PATCH v2 3/7] drm/i915: use funcs from intel_shared_dpll.info   Lucas De Marchi
• [Intel-gfx] [PATCH v2 30/42] drm/i915: Handle HDCP2.2 downstream topology change   Ramalingam C
• [Intel-gfx] [PATCH v2 31/42] drm/i915: Pullout the bksv read and validation   Ramalingam C
• [Intel-gfx] [PATCH v2 32/42] drm/i915: Initialize HDCP2.2 and its MEI interface   Ramalingam C
• [Intel-gfx] [PATCH v2 33/42] drm/i915: Schedule hdcp_check_link in _intel_hdcp_enable   Ramalingam C
• [Intel-gfx] [PATCH v2 34/42] drm/i915: Enable superior HDCP ver that is capable   Ramalingam C
• [Intel-gfx] [PATCH v2 35/42] drm/i915: Enable HDCP1.4 incase of HDCP2.2 failure   Ramalingam C
• [Intel-gfx] [PATCH v2 36/42] drm/i915: hdcp_check_link only on CP_IRQ   Ramalingam C
• [Intel-gfx] [PATCH v2 37/42] drm/i915: Check HDCP 1.4 and 2.2 link on CP_IRQ   Ramalingam C
• [Intel-gfx] [PATCH v2 38/42] drm/i915: Implement gmbus burst read   Ramalingam C
• [Intel-gfx] [PATCH v2 39/42] drm/i915: Implement the HDCP2.2 support for DP   Ramalingam C
• [Intel-gfx] [PATCH v2 4/4] drm/i915/psr: Timestamps for PSR entry and exit interrupts.   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2 4/4] drm/i915: Fix downstream dev count read   Ramalingam C
• [Intel-gfx] [PATCH v2 4/4] drm/i915: Fix downstream dev count read   Sean Paul
• [Intel-gfx] [PATCH v2 4/4] drm/i915: Move i915_gpu_error into its own header   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 4/4] drm/i915: Move i915_gpu_error into its own header   Chris Wilson
• [Intel-gfx] [PATCH v2 4/4] drm/i915: Move i915_gpu_error into its own header   Michal Wajdeczko
• [Intel-gfx] [PATCH v2 4/4] HAX enable guc for CI   Jackie Li
• [Intel-gfx] [PATCH v2 4/5] drm/i915/psr: Do not override PSR2 sink support   José Roberto de Souza
• [Intel-gfx] [PATCH v2 4/5] drm/i915/psr: Do not override PSR2 sink support   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 4/6] drm: Introduce drm_color_lut_size()   Ville Syrjala
• [Intel-gfx] [PATCH v2 4/7] drm/i915: use name from intel_shared_dpll.info   Lucas De Marchi
• [Intel-gfx] [PATCH v2 4/8] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Lionel Landwerlin
• [Intel-gfx] [PATCH v2 40/42] drm/i915: Implement the HDCP2.2 support for HDMI   Ramalingam C
• [Intel-gfx] [PATCH v2 41/42] drm/i915: Add HDCP2.2 support for DP connectors   Ramalingam C
• [Intel-gfx] [PATCH v2 42/42] drm/i915: Add HDCP2.2 support for HDMI connectors   Ramalingam C
• [Intel-gfx] [PATCH v2 5/5] drm/i915/psr: Simply PSR computed state   José Roberto de Souza
• [Intel-gfx] [PATCH v2 5/5] drm/i915/psr: Simply PSR computed state   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 5/5] drm/i915/psr: Simply PSR computed state   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2 5/5] drm/i915/psr: Simply PSR computed state   Souza, Jose
• [Intel-gfx] [PATCH v2 5/6] drm/i915: Remove the blob->data casts   Ville Syrjala
• [Intel-gfx] [PATCH v2 5/7] drm/i915: use id from intel_shared_dpll.info   Lucas De Marchi
• [Intel-gfx] [PATCH v2 5/7] drm/i915: use id from intel_shared_dpll.info   Ville Syrjälä
• [Intel-gfx] [PATCH v2 6/7] drm/i915: use flags from dpll_info embedded in intel_shared_dpll   Lucas De Marchi
• [Intel-gfx] [PATCH v2 7/7] drm/i915: reorder dpll_info members   Lucas De Marchi
• [Intel-gfx] [PATCH v2 7/7] drm/i915: reorder dpll_info members   Ville Syrjälä
• [Intel-gfx] [PATCH v2 7/7] drm/i915: reorder dpll_info members   Rodrigo Vivi
• [Intel-gfx] [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()   Ville Syrjälä
• [Intel-gfx] [PATCH v2] drm/i915/breadcrumbs: Keep the fake irq armed across reset   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates array   Jani Nikula
• [Intel-gfx] [PATCH v2] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/execlists: Delay updating ring register state after resume   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/execlists: Delay updating ring register state after resume   Mika Kuoppala
• [Intel-gfx] [PATCH v2] drm/i915/execlists: Flush pending preemption events during reset   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/execlists: Flush pending preemption events during reset   Jeff McGee
• [Intel-gfx] [PATCH v2] drm/i915/execlists: Track begin/end of execlists submission sequences   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/gen9, gen10: Disable FBC on planes with a misaligned Y-offset   Imre Deak
• [Intel-gfx] [PATCH v2] drm/i915/guc: Don't try to enable GuC logging when we're not using GuC   Michał Winiarski
• [Intel-gfx] [PATCH v2] drm/i915/guc: Don't try to enable GuC logging when we're not using GuC   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Piotr Piórkowski
• [Intel-gfx] [PATCH v2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915/guc: Handle GuC log flush event in dedicated function   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915/guc: Handle GuC log flush event in dedicated function   Michał Winiarski
• [Intel-gfx] [PATCH v2] drm/i915/guc: Handle GuC log flush event in dedicated function   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/guc: Remove GUC_CTL_DEVICE_INFO parameter   Piotr Piórkowski
• [Intel-gfx] [PATCH v2] drm/i915/guc: Remove GUC_CTL_DEVICE_INFO parameter   Michel Thierry
• [Intel-gfx] [PATCH v2] drm/i915/guc: Remove GUC_CTL_DEVICE_INFO parameter   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2] drm/i915/guc: Unify parameters of public CT functions   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915/guc: Unify parameters of public CT functions   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/guc: Update syntax of GuC log functions   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915/guc: Update syntax of GuC log functions   Michał Winiarski
• [Intel-gfx] [PATCH v2] drm/i915/guc: Update syntax of GuC log functions   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915/guc: Update syntax of GuC log functions   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915/guc: Update syntax of GuC log functions   Michał Winiarski
• [Intel-gfx] [PATCH v2] drm/i915/guc: Update syntax of GuC log functions   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/gvt: throw error on unhandled vfio ioctls   Alex Williamson
• [Intel-gfx] [PATCH v2] drm/i915/perf: fix perf stream opening lock   Lionel Landwerlin
• [Intel-gfx] [PATCH v2] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v2] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Ville Syrjälä
• [Intel-gfx] [PATCH v2] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v2] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Ville Syrjälä
• [Intel-gfx] [PATCH v2] drm/i915/selftests: Include the trace as a debug aide   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/selftests: Include the trace as a debug aide   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/selftests: Include the trace as a debug aide   Mika Kuoppala
• [Intel-gfx] [PATCH v2] drm/i915/selftests: Include the trace as a debug aide   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/selftests: Include the trace as a debug aide   Jeff McGee
• [Intel-gfx] [PATCH v2] drm/i915/selftests: Include the trace as a debug aide   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/stolen: Deduce base of reserved portion as top-size on vlv   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915/uc: Start preparing GuC/HuC for reset   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2] drm/i915: Actually flush interrupts on reset not just wedging   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Actually flush interrupts on reset not just wedging   Mika Kuoppala
• [Intel-gfx] [PATCH v2] drm/i915: Actually flush interrupts on reset not just wedging   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Actually flush interrupts on reset not just wedging   Mika Kuoppala
• [Intel-gfx] [PATCH v2] drm/i915: add schedule out notification of preempted but completed request   Li, Weinan Z
• [Intel-gfx] [PATCH v2] drm/i915: add schedule out notification of preempted but completed request   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2] drm/i915: add schedule out notification of preempted but completed request   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: add schedule out notification of preempted but completed request   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2] drm/i915: Disable some extra clang warnings   Matthias Kaehlcke
• [Intel-gfx] [PATCH v2] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Ville Syrjala
• [Intel-gfx] [PATCH v2] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Ville Syrjala
• [Intel-gfx] [PATCH v2] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Sharma, Shashank
• [Intel-gfx] [PATCH v2] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Ville Syrjälä
• [Intel-gfx] [PATCH v2] drm/i915: Include submission tasklet state in engine dump   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Kick the rps worker when changing the boost frequency   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Kick the rps worker when changing the boost frequency   Mika Kuoppala
• [Intel-gfx] [PATCH v2] drm/i915: Move CUR SURFLIVE definition to a better place.   Rodrigo Vivi
• [Intel-gfx] [PATCH v2] drm/i915: Only prune fences after wait-for-all   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Only prune fences after wait-for-all   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Only prune fences after wait-for-all   Matthew Auld
• [Intel-gfx] [PATCH v2] drm/i915: Only prune fences after wait-for-all   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Remove local timeline var from submit/unsubmit   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Remove local timeline var from submit/unsubmit   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Replace pcu_lock with sb_lock   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Reword warning for missing cases   Lucas De Marchi
• [Intel-gfx] [PATCH v2] drm/i915: Reword warning for missing cases   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Reword warning for missing cases   Rodrigo Vivi
• [Intel-gfx] [PATCH v2] drm/i915: Show GEM_TRACE when detecting a failed GPU idle   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Show GEM_TRACE when detecting a failed GPU idle   Joonas Lahtinen
• [Intel-gfx] [PATCH v2] drm/i915: Split GPU commands definitions into separate header   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915: Stop engines when declaring the machine wedged   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Stop engines when declaring the machine wedged   Mika Kuoppala
• [Intel-gfx] [PATCH v2] drm/i915: Stop engines when declaring the machine wedged   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Trim gen11_gt_irq_handler   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Trim gen11_gt_irq_handler   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Trim gen11_gt_irq_handler   Tvrtko Ursulin
• [Intel-gfx] [PATCH v2] drm/i915: Trim gen11_gt_irq_handler   Chris Wilson
• [Intel-gfx] [PATCH v2] drm/i915: Trim gen11_gt_irq_handler   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Jackie Li
• [Intel-gfx] [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Michal Wajdeczko
• [Intel-gfx] [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Yaodong Li
• [Intel-gfx] [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Sagar Arun Kamble
• [Intel-gfx] [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Yaodong Li
• [Intel-gfx] [PATCH v2] i915: Re-use DEFINE_SHOW_ATTRIBUTE() macro   Andy Shevchenko
• [Intel-gfx] [PATCH v2] i915: Re-use DEFINE_SHOW_ATTRIBUTE() macro   Chris Wilson
• [Intel-gfx] [PATCH v2] trace: Default to using trace_global_clock if sched_clock is unstable   Chris Wilson
• [Intel-gfx] [PATCH v3 0/2] CNL port refactoring   Mahesh Kumar
• [Intel-gfx] [PATCH v3 0/2] CNL port refactoring   Mahesh Kumar
• [Intel-gfx] [PATCH v3 0/2] CNL port refactoring   Rodrigo Vivi
• [Intel-gfx] [PATCH v3 0/3] drm/i915/uc: Sanitize uC   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 0/6] Documentation patch for batchbuffer submission   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v3 0/6] Documentation patch for batchbuffer submission   Chris Wilson
• [Intel-gfx] [PATCH v3 0/6] Documentation patch for batchbuffer submission   Rogovin, Kevin
• [Intel-gfx] [PATCH v3 0/6] DRM/i915 cgroup integration   Matt Roper
• [Intel-gfx] [PATCH v3 01/10] drm: Add DP PSR2 sink enable bit   José Roberto de Souza
• [Intel-gfx] [PATCH v3 01/13] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Michał Winiarski
• [Intel-gfx] [PATCH v3 01/13] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 01/13] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 02/10] drm: Add DP last received PSR SDP VSC register and bits   José Roberto de Souza
• [Intel-gfx] [PATCH v3 02/13] drm/i915/guc: Log runtime should consist of both mapping and relay   Michał Winiarski
• [Intel-gfx] [PATCH v3 03/10] drm/i915/psr: Nuke aux frame sync   José Roberto de Souza
• [Intel-gfx] [PATCH v3 03/13] drm/i915/guc: Merge log relay file and channel creation   Michał Winiarski
• [Intel-gfx] [PATCH v3 04/10] drm/i915/psr: Tie PSR2 support to Y coordinate requirement   José Roberto de Souza
• [Intel-gfx] [PATCH v3 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source   José Roberto de Souza
• [Intel-gfx] [PATCH v3 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source   Souza, Jose
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()   Claudiu Beznea
• [Intel-gfx] [PATCH v3 05/13] drm/i915/guc: Split relay control and GuC log level   Michał Winiarski
• [Intel-gfx] [PATCH v3 06/10] drm/i915/psr: Do not override PSR2 sink support   José Roberto de Souza
• [Intel-gfx] [PATCH v3 07/10] drm/i915/psr: Use PSR2 macro for PSR2   José Roberto de Souza
• [Intel-gfx] [PATCH v3 08/10] drm/i915/psr: Cache sink synchronization latency   José Roberto de Souza
• [Intel-gfx] [PATCH v3 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed   José Roberto de Souza
• [Intel-gfx] [PATCH v3 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed   Rodrigo Vivi
• [Intel-gfx] [PATCH v3 09/13] drm/i915/guc: Don't print out relay statistics when relay is disabled   Michał Winiarski
• [Intel-gfx] [PATCH v3 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Chris Wilson
• [Intel-gfx] [PATCH v3 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Chris Wilson
• [Intel-gfx] [PATCH v3 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 1/2] drm/i915/cnl; Add macro to get PORT_TX register   Mahesh Kumar
• [Intel-gfx] [PATCH v3 1/2] drm/i915/uc: Start preparing GuC/HuC for reset   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 1/2] drm/i915/uc: Start preparing GuC/HuC for reset   Chris Wilson
• [Intel-gfx] [PATCH v3 1/2] drm/i915/uc: Start preparing GuC/HuC for reset   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 1/2] drm/i915/uc: Start preparing GuC/HuC for reset   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 1/3] drm/i915/guc: Unify naming of private GuC action functions   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 1/3] drm/i915/uc: Sanitize uC options early   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 1/3] drm/i915: Reorder early initialization   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 1/3] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v3 1/4] drm/i915/uc: Use correct error code for GuC initialization failure   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 1/4] drm/i915/uc: Use correct error code for GuC initialization failure   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 1/4] drm: Add drm_any_plane_has_format()   Ville Syrjala
• [Intel-gfx] [PATCH v3 1/5] drm/i915: Move DP modeset retry work into intel_dp   Lyude Paul
• [Intel-gfx] [PATCH v3 1/5] drm/i915: Move DP modeset retry work into intel_dp   Ville Syrjälä
• [Intel-gfx] [PATCH v3 1/5] drm/i915: Move DP modeset retry work into intel_dp   Lyude Paul
• [Intel-gfx] [PATCH v3 1/5] drm/i915: Move DP modeset retry work into intel_dp   Ville Syrjälä
• [Intel-gfx] [PATCH v3 1/5] i915.rst: Narration overview on GEM + minor reorder to improve narration   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Matt Roper
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Tejun Heo
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Alexei Starovoitov
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Roman Gushchin
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Alexei Starovoitov
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Roman Gushchin
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Tejun Heo
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Alexei Starovoitov
• [Intel-gfx] [PATCH v3 1/6] cgroup: Allow registration and lookup of cgroup private data   Roman Gushchin
• [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status   José Roberto de Souza
• [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status   Souza, Jose
• [Intel-gfx] [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3 10/13] drm/i915/guc: Allow user to control default GuC logging   Michał Winiarski
• [Intel-gfx] [PATCH v3 10/13] drm/i915/guc: Allow user to control default GuC logging   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 13/23] drm/zte: Stop consulting plane->crtc   Ville Syrjala
• [Intel-gfx] [PATCH v3 2/2] drm/i915/cnl: Kill _MMIO_PORT6 macro   Mahesh Kumar
• [Intel-gfx] [PATCH v3 2/2] drm/i915/cnl: Kill _MMIO_PORT6 macro   Rodrigo Vivi
• [Intel-gfx] [PATCH v3 2/2] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 2/3] drm/i915/guc: Drop union guc_log_control   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 2/3] drm/i915/guc: Drop union guc_log_control   Michał Winiarski
• [Intel-gfx] [PATCH v3 2/3] drm/i915/uc: Fetch uC firmware in init_early   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 2/3] drm/i915/uc: Sanitize uC together with GEM   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 2/4] drm/i915/uc: Use helper functions to detect fw load status   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 2/4] drm/i915/uc: Use helper functions to detect fw load status   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 2/4] drm/i915: Eliminate the horrendous format check code   Ville Syrjala
• [Intel-gfx] [PATCH v3 2/5] drm/i915: Only use one link bw config for MST topologies   Lyude Paul
• [Intel-gfx] [PATCH v3 2/5] drm/i915: Only use one link bw config for MST topologies   Manasi Navare
• [Intel-gfx] [PATCH v3 2/5] drm/i915: Only use one link bw config for MST topologies   Ville Syrjälä
• [Intel-gfx] [PATCH v3 2/5] drm/i915: Only use one link bw config for MST topologies   Lyude Paul
• [Intel-gfx] [PATCH v3 2/5] i915: add documentation of what happens at the bottom of submitting a batchbuffer   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v3 2/6] cgroup: Introduce task_get_dfl_cgroup()   Matt Roper
• [Intel-gfx] [PATCH v3 2/6] cgroup: Introduce task_get_dfl_cgroup()   Tejun Heo
• [Intel-gfx] [PATCH v3 3/3] drm/i915/guc: Move enable/disable msg functions to GuC header   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 3/3] drm/i915: move gen8 irq shifts to intel_lrc.c   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v3 3/3] drm/i915: move gen8 irq shifts to intel_lrc.c   Chris Wilson
• [Intel-gfx] [PATCH v3 3/3] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 3/3] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 3/4] drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 3/4] drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3 3/5] drm/dp_mst: Add drm_dp_mst_topology_mgr_lower_link_rate()   Lyude Paul
• [Intel-gfx] [PATCH v3 3/5] drm/dp_mst: Add drm_dp_mst_topology_mgr_lower_link_rate()   Manasi Navare
• [Intel-gfx] [PATCH v3 3/5] i915: add documentation for a bit on batchbuffer submission backend   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v3 3/6] cgroup: Introduce cgroup_permission()   Matt Roper
• [Intel-gfx] [PATCH v3 3/6] cgroup: Introduce cgroup_permission()   Tejun Heo
• [Intel-gfx] [PATCH v3 4/4] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v3 4/5] drm/dp_mst: Add drm_atomic_dp_mst_retrain_topology()   Lyude Paul
• [Intel-gfx] [PATCH v3 4/5] i915: add doc for synchronization   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v3 4/6] drm/i915: cgroup integration (v2)   Matt Roper
• [Intel-gfx] [PATCH v3 5/5] drm/i915: Implement proper fallback training for MST   Lyude Paul
• [Intel-gfx] [PATCH v3 5/5] drm/i915: Implement proper fallback training for MST   Ville Syrjälä
• [Intel-gfx] [PATCH v3 5/5] drm/i915: Implement proper fallback training for MST   Manasi Navare
• [Intel-gfx] [PATCH v3 5/5] drm/i915: Implement proper fallback training for MST   Lyude Paul
• [Intel-gfx] [PATCH v3 5/5] i915.rst: narration for batchbuffer submission + links to source code doc entries on the subject   kevin.rogovin at intel.com
• [Intel-gfx] [PATCH v3 5/6] drm/i915: Introduce 'priority offset' for GPU contexts (v2)   Matt Roper
• [Intel-gfx] [PATCH v3 5/6] drm/i915: Introduce 'priority offset' for GPU contexts (v2)   Chris Wilson
• [Intel-gfx] [PATCH v3 5/6] drm/i915: Introduce 'priority offset' for GPU contexts (v2)   Chris Wilson
• [Intel-gfx] [PATCH v3 5/6] drm/i915: Introduce 'priority offset' for GPU contexts (v2)   Matt Roper
• [Intel-gfx] [PATCH v3 5/6] drm/i915: Introduce 'priority offset' for GPU contexts (v2)   Chris Wilson
• [Intel-gfx] [PATCH v3 5/6] drm/i915: Introduce 'priority offset' for GPU contexts (v2)   Chris Wilson
• [Intel-gfx] [PATCH v3 5/6] drm/i915: Introduce 'priority offset' for GPU contexts (v2)   Matt Roper
• [Intel-gfx] [PATCH v3 6/6] drm/i915: Add context priority & priority offset to debugfs (v2)   Matt Roper
• [Intel-gfx] [PATCH v3] drm/i915/guc: Don't try to enable GuC logging when we're not using GuC   Michał Winiarski
• [Intel-gfx] [PATCH v3] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Piotr Piórkowski
• [Intel-gfx] [PATCH v3] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Michal Wajdeczko
• [Intel-gfx] [PATCH v3] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Yaodong Li
• [Intel-gfx] [PATCH v3] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Joonas Lahtinen
• [Intel-gfx] [PATCH v3] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Michal Wajdeczko
• [Intel-gfx] [PATCH v3] drm/i915/guc: Remove GUC_CTL_DEVICE_INFO parameter   Piotr Piórkowski
• [Intel-gfx] [PATCH v3] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Oscar Mateo
• [Intel-gfx] [PATCH v3] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Lionel Landwerlin
• [Intel-gfx] [PATCH v3] drm/i915/icl: remove port A/E lane sharing limitation.   Kumar, Mahesh
• [Intel-gfx] [PATCH v3] drm/i915/icl: remove port A/E lane sharing limitation.   Jani Nikula
• [Intel-gfx] [PATCH v3] drm/i915/psr: Control PSR interrupts via debugfs   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v3] drm/i915/psr: Control PSR interrupts via debugfs   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Dhinakaran Pandiyan
• [Intel-gfx] [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Ville Syrjälä
• [Intel-gfx] [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Ville Syrjälä
• [Intel-gfx] [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Pandiyan, Dhinakaran
• [Intel-gfx] [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake   Rodrigo Vivi
• [Intel-gfx] [PATCH v3] drm/i915: add schedule out notification of preempted but completed request   Weinan Li
• [Intel-gfx] [PATCH v3] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Ville Syrjala
• [Intel-gfx] [PATCH v3] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Sharma, Shashank
• [Intel-gfx] [PATCH v3] drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Ville Syrjälä
• [Intel-gfx] [PATCH v3] drm/i915: Remove local timeline var from submit/unsubmit   Chris Wilson
• [Intel-gfx] [PATCH v3] drm/i915: Remove local timeline var from submit/unsubmit   Mika Kuoppala
• [Intel-gfx] [PATCH v3] drm/i915: Remove local timeline var from submit/unsubmit   Chris Wilson
• [Intel-gfx] [PATCH v3] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Jackie Li
• [Intel-gfx] [PATCH v3] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Sagar Arun Kamble
• [Intel-gfx] [PATCH v3] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Yaodong Li
• [Intel-gfx] [PATCH v4.5 0/8] cgroup private data and DRM/i915 integration   Matt Roper
• [Intel-gfx] [PATCH v4.5 1/8] cgroup: Allow registration and lookup of cgroup private data (v3)   Matt Roper
• [Intel-gfx] [PATCH v4.5 1/8] cgroup: Allow registration and lookup of cgroup private data (v3)   Chris Wilson
• [Intel-gfx] [PATCH v4.5 2/8] cgroup: Introduce task_get_dfl_cgroup() (v2)   Matt Roper
• [Intel-gfx] [PATCH v4.5 3/8] cgroup: Introduce cgroup_priv_get_current   Matt Roper
• [Intel-gfx] [PATCH v4.5 4/8] drm/i915: Adjust internal priority definitions (v2)   Matt Roper
• [Intel-gfx] [PATCH v4.5 5/8] drm/i915: cgroup integration (v4)   Matt Roper
• [Intel-gfx] [PATCH v4.5 6/8] drm/i915: Introduce 'priority offset' for GPU contexts (v4)   Matt Roper
• [Intel-gfx] [PATCH v4.5 7/8] drm/i915: Introduce per-cgroup display boost setting   Matt Roper
• [Intel-gfx] [PATCH v4.5 8/8] drm/i915: Add context priority & priority offset to debugfs (v2)   Matt Roper
• [Intel-gfx] [PATCH v4 0/7] Queued/runnable/running engine stats   Tvrtko Ursulin
• [Intel-gfx] [PATCH v4 0/8] cgroup private data and DRM/i915 integration   Matt Roper
• [Intel-gfx] [PATCH v4 0/8] cgroup private data and DRM/i915 integration   Joonas Lahtinen
• [Intel-gfx] [PATCH v4 0/8] cgroup private data and DRM/i915 integration   Matt Roper
• [Intel-gfx] [PATCH v4 0/8] cgroup private data and DRM/i915 integration   Joonas Lahtinen
• [Intel-gfx] [PATCH v4 0/8] cgroup private data and DRM/i915 integration   Matt Roper
• [Intel-gfx] [PATCH v4 00/13] drm/i915/guc: Support for Guc responses and requests   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 01/13] drm/i915/guc: Add documentation for MMIO based communication   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 01/13] drm/i915/guc: Add documentation for MMIO based communication   Michel Thierry
• [Intel-gfx] [PATCH v4 01/13] drm/i915/guc: Add documentation for MMIO based communication   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 02/13] drm/i915/guc: Add support for data reporting in GuC responses   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 02/13] drm/i915/guc: Add support for data reporting in GuC responses   Michel Thierry
• [Intel-gfx] [PATCH v4 03/13] drm/i915/guc: Prepare send() function to accept bigger response   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 03/13] drm/i915/guc: Prepare send() function to accept bigger response   Michel Thierry
• [Intel-gfx] [PATCH v4 04/13] drm/i915/guc: Implement response handling in send_mmio()   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 04/13] drm/i915/guc: Implement response handling in send_mmio()   Michel Thierry
• [Intel-gfx] [PATCH v4 04/13] drm/i915/guc: Implement response handling in send_mmio()   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 05/13] drm/i915/guc: Make event handler a virtual function   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 05/13] drm/i915/guc: Make event handler a virtual function   Michel Thierry
• [Intel-gfx] [PATCH v4 05/13] drm/i915/guc: Make event handler a virtual function   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 06/13] drm/i915/guc: Prepare to handle messages from CT RECV buffer   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 06/13] drm/i915/guc: Prepare to handle messages from CT RECV buffer   Michel Thierry
• [Intel-gfx] [PATCH v4 07/13] drm/i915/guc: Use better name for helper wait function   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 07/13] drm/i915/guc: Use better name for helper wait function   Michel Thierry
• [Intel-gfx] [PATCH v4 08/13] drm/i915/guc: Implement response handling in send_ct()   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 08/13] drm/i915/guc: Implement response handling in send_ct()   Michel Thierry
• [Intel-gfx] [PATCH v4 08/13] drm/i915/guc: Implement response handling in send_ct()   Michał Winiarski
• [Intel-gfx] [PATCH v4 08/13] drm/i915/guc: Implement response handling in send_ct()   Jani Nikula
• [Intel-gfx] [PATCH v4 08/13] drm/i915/guc: Implement response handling in send_ct()   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 08/13] drm/i915/guc: Implement response handling in send_ct()   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 09/13] drm/i915/guc: Prepare to process incoming requests from CT   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 09/13] drm/i915/guc: Prepare to process incoming requests from CT   Michel Thierry
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Tvrtko Ursulin
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Mika Kuoppala
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Chris Wilson
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Zhang, Yunwei
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl; Add macro to get PORT_TX register   Mahesh Kumar
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl; Add macro to get PORT_TX register   Chauhan, Madhav
• [Intel-gfx] [PATCH v4 1/2] drm/i915/cnl; Add macro to get PORT_TX register   Chauhan, Madhav
• [Intel-gfx] [PATCH v4 1/2] drm: Use srcu to protect drm_device.unplugged   Oleksandr Andrushchenko
• [Intel-gfx] [PATCH v4 1/2] drm: Use srcu to protect drm_device.unplugged   Daniel Vetter
• [Intel-gfx] [PATCH v4 1/3] drm/i915: Reorder early initialization   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 1/3] drm/i915: Reorder early initialization   Chris Wilson
• [Intel-gfx] [PATCH v4 1/4] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v4 1/7] drm/i915: Correctly handle error path in i915_gem_init_hw   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 1/7] drm/i915: Correctly handle error path in i915_gem_init_hw   Sagar Arun Kamble
• [Intel-gfx] [PATCH v4 1/8] cgroup: Allow registration and lookup of cgroup private data (v2)   Matt Roper
• [Intel-gfx] [PATCH v4 1/8] cgroup: Allow registration and lookup of cgroup private data (v2)   kbuild test robot
• [Intel-gfx] [PATCH v4 10/13] drm/i915/guc: Enable GuC interrupts when using CT   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 10/13] drm/i915/guc: Enable GuC interrupts when using CT   Michel Thierry
• [Intel-gfx] [PATCH v4 11/13] drm/i915/guc: Handle default action received over CT   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 11/13] drm/i915/guc: Handle default action received over CT   Michel Thierry
• [Intel-gfx] [PATCH v4 12/13] drm/i915/guc: Trace messages from CT while in debug   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 13/13] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 2/2] drm/i915/cnl: Kill _MMIO_PORT6 macro   Mahesh Kumar
• [Intel-gfx] [PATCH v4 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH v4 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Tvrtko Ursulin
• [Intel-gfx] [PATCH v4 2/3] drm/i915/uc: Fetch uC firmware in init_early   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 2/4] drm/i915: add a selftest for the mmio_bases table   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v4 2/7] drm/i915/uc: Disable GuC submission during sanitize   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 2/7] drm/i915/uc: Disable GuC submission during sanitize   Sagar Arun Kamble
• [Intel-gfx] [PATCH v4 2/7] drm/i915/uc: Disable GuC submission during sanitize   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 2/8] cgroup: Introduce task_get_dfl_cgroup() (v2)   Matt Roper
• [Intel-gfx] [PATCH v4 3/3] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 3/4] drm/i915: use engine->irq_keep_mask when resetting irqs   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v4 3/7] drm/i915/uc: Fully sanitize uC in uc_fini_hw   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 3/7] drm/i915/uc: Fully sanitize uC in uc_fini_hw   Sagar Arun Kamble
• [Intel-gfx] [PATCH v4 3/7] drm/i915/uc: Fully sanitize uC in uc_fini_hw   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 3/8] cgroup: Introduce cgroup_priv_get_current   Matt Roper
• [Intel-gfx] [PATCH v4 4/4] drm/i915: move gen8 irq shifts to intel_lrc.c   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v4 4/7] drm/i915/uc: Use correct error code for GuC initialization failure   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 4/8] drm/i915: Adjust internal priority definitions   Matt Roper
• [Intel-gfx] [PATCH v4 5/7] drm/i915/uc: Use helper functions to detect fw load status   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 5/8] drm/i915: cgroup integration (v3)   Matt Roper
• [Intel-gfx] [PATCH v4 6/7] drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 6/8] drm/i915: Introduce 'priority offset' for GPU contexts (v3)   Matt Roper
• [Intel-gfx] [PATCH v4 7/7] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v4 7/8] drm/i915: Introduce per-cgroup display boost setting   Matt Roper
• [Intel-gfx] [PATCH v4 8/8] drm/i915: Add context priority & priority offset to debugfs (v2)   Matt Roper
• [Intel-gfx] [PATCH v4] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Oscar Mateo
• [Intel-gfx] [PATCH v4] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Tvrtko Ursulin
• [Intel-gfx] [PATCH v4] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Mika Kuoppala
• [Intel-gfx] [PATCH v4] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Jackie Li
• [Intel-gfx] [PATCH v4] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Joonas Lahtinen
• [Intel-gfx] [PATCH v4] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Joonas Lahtinen
• [Intel-gfx] [PATCH v5 00/12] drm/i915/guc: Support for Guc responses and requests   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 00/12] drm/i915/guc: Support for Guc responses and requests   Michel Thierry
• [Intel-gfx] [PATCH v5 01/12] drm/i915/guc: Add documentation for MMIO based communication   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 01/12] drm/i915/guc: Add documentation for MMIO based communication   Sagar Arun Kamble
• [Intel-gfx] [PATCH v5 01/12] drm/i915/guc: Add documentation for MMIO based communication   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 02/12] drm/i915/guc: Add support for data reporting in GuC responses   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 03/12] drm/i915/guc: Prepare send() function to accept bigger response   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 04/12] drm/i915/guc: Implement response handling in send_mmio()   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 05/12] drm/i915/guc: Make event handler a virtual function   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 06/12] drm/i915/guc: Prepare to handle messages from CT RECV buffer   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 07/12] drm/i915/guc: Use better name for helper wait function   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 08/12] drm/i915/guc: Implement response handling in send_ct()   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 09/12] drm/i915/guc: Prepare to process incoming requests from CT   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 09/12] drm/i915/guc: Prepare to process incoming requests from CT   Michel Thierry
• [Intel-gfx] [PATCH v5 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH v5 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Chris Wilson
• [Intel-gfx] [PATCH v5 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Zhang, Yunwei
• [Intel-gfx] [PATCH v5 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Chris Wilson
• [Intel-gfx] [PATCH v5 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Zhang, Yunwei
• [Intel-gfx] [PATCH v5 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Chris Wilson
• [Intel-gfx] [PATCH v5 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Zhang, Yunwei
• [Intel-gfx] [PATCH v5 1/8] drm/i915: Correctly handle error path in i915_gem_init_hw   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 10/12] drm/i915/guc: Handle default action received over CT   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 10/12] drm/i915/guc: Handle default action received over CT   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v5 10/12] drm/i915/guc: Handle default action received over CT   Michel Thierry
• [Intel-gfx] [PATCH v5 10/12] drm/i915/guc: Handle default action received over CT   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 10/12] drm/i915/guc: Handle default action received over CT   Daniele Ceraolo Spurio
• [Intel-gfx] [PATCH v5 11/12] drm/i915/guc: Trace messages from CT while in debug   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 12/12] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH v5 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Tvrtko Ursulin
• [Intel-gfx] [PATCH v5 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Tvrtko Ursulin
• [Intel-gfx] [PATCH v5 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Zhang, Yunwei
• [Intel-gfx] [PATCH v5 2/8] drm/i915/uc: Disable GuC submission during sanitize   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 2/8] drm/i915/uc: Disable GuC submission during sanitize   Sagar Arun Kamble
• [Intel-gfx] [PATCH v5 3/8] drm/i915/guc: Restore symmetric doorbell cleanup   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 3/8] drm/i915/guc: Restore symmetric doorbell cleanup   Sagar Arun Kamble
• [Intel-gfx] [PATCH v5 4/8] drm/i915/uc: Fully sanitize uC in uc_fini_hw   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 4/8] drm/i915/uc: Fully sanitize uC in uc_fini_hw   Sagar Arun Kamble
• [Intel-gfx] [PATCH v5 5/8] drm/i915/uc: Use correct error code for GuC initialization failure   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 5/8] drm/i915/uc: Use correct error code for GuC initialization failure   Sagar Arun Kamble
• [Intel-gfx] [PATCH v5 6/8] drm/i915/uc: Use helper functions to detect fw load status   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 7/8] drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 8/8] HAX: Enable GuC for CI   Michal Wajdeczko
• [Intel-gfx] [PATCH v5 8/8] HAX: Enable GuC for CI   Sagar Arun Kamble
• [Intel-gfx] [PATCH v6 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON   Shashank Sharma
• [Intel-gfx] [PATCH v6 08/12] drm/i915/guc: Implement response handling in send_ct()   Michal Wajdeczko
• [Intel-gfx] [PATCH v6 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH v6 1/8] drm/i915: Introduce CRTC output format   Shashank Sharma
• [Intel-gfx] [PATCH v6 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads   Yunwei Zhang
• [Intel-gfx] [PATCH v6 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0   Shashank Sharma
• [Intel-gfx] [PATCH v6 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4   Shashank Sharma
• [Intel-gfx] [PATCH v6 4/8] drm/i915: Check LSPCON vendor OUI   Shashank Sharma
• [Intel-gfx] [PATCH v6 5/8] drm/i915: Add AVI infoframe support for LSPCON   Shashank Sharma
• [Intel-gfx] [PATCH v6 6/8] drm/i915: Write AVI infoframes for MCA LSPCON   Shashank Sharma
• [Intel-gfx] [PATCH v6 7/8] drm/i915: Write AVI infoframes for Parade LSPCON   Shashank Sharma
• [Intel-gfx] [PATCH v6 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON   Shashank Sharma
• [Intel-gfx] [PATCH v6] drm/i915/skl+: Add and enable DP AUX CH mutex   José Roberto de Souza
• [Intel-gfx] [PATCH v6] drm/i915/skl+: Add and enable DP AUX CH mutex   Rodrigo Vivi
• [Intel-gfx] [PATCH v7 10/12] drm/i915/guc: Handle default action received over CT   Michal Wajdeczko
• [Intel-gfx] [PATCH v7 10/12] drm/i915/guc: Handle default action received over CT   Michel Thierry
• [Intel-gfx] [PATCH v7 10/12] drm/i915/guc: Handle default action received over CT   Ceraolo Spurio, Daniele
• [Intel-gfx] [PATCH v8 00/11] Aspect ratio support in DRM layer   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 01/11] drm/modes: Introduce drm_mode_match()   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 02/11] drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 03/11] drm/edid: Fix cea mode aspect ratio handling   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 04/11] drm/edid: Don't send bogus aspect ratios in AVI infoframes   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 05/11] video/hdmi: Reject illegal picture aspect ratios   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 06/11] drm: Add DRM client cap for aspect-ratio   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 07/11] drm: Handle aspect-ratio info in getblob   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 07/11] drm: Handle aspect-ratio info in getblob   kbuild test robot
• [Intel-gfx] [PATCH v8 08/11] drm: Handle aspect ratio info in legacy and atomic modeset paths   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 09/11] drm: Expose modes with aspect ratio, only if requested   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 10/11] drm: Add aspect ratio parsing in DRM layer   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v8 11/11] drm: Add and handle new aspect ratios in DRM layer   Nautiyal, Ankit K
• [Intel-gfx] [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances   Sagar Arun Kamble
• [Intel-gfx] [PATCH xf86-video-intel 0/2] Add CoffeeLake H and U PCI IDs   Liwei Song
• [Intel-gfx] [PATCH xf86-video-intel 1/2] Add Coffeelake PCI IDs for H Skus   Liwei Song
• [Intel-gfx] [PATCH xf86-video-intel 2/2] Add Coffeelake PCI IDs for U Skus   Liwei Song
• [Intel-gfx] [PATCH xf86-video-intel v2] sna: Add XV_COLORSPACE attribute support for sprite Xv adaptors   Ville Syrjala
• [Intel-gfx] [PATCH xf86-video-intel v2] sna: Add XV_COLORSPACE attribute support for sprite Xv adaptors   Chris Wilson
• [Intel-gfx] [PATCH xf86-video-intel v2] sna: Add XV_COLORSPACE attribute support for sprite Xv adaptors   Ville Syrjälä
• [Intel-gfx] [PATCH xf86-video-intel v2] sna: Add XV_COLORSPACE attribute support for sprite Xv adaptors   Chris Wilson
• [Intel-gfx] [PATCH xf86-video-intel v2] sna: Add XV_COLORSPACE attribute support for sprite Xv adaptors   Chris Wilson
• [Intel-gfx] [PULL] drm-intel-fixes   Rodrigo Vivi
• [Intel-gfx] [PULL] drm-intel-fixes   Rodrigo Vivi
• [Intel-gfx] [PULL] drm-intel-fixes   Rodrigo Vivi
• [Intel-gfx] [PULL] drm-intel-fixes   Rodrigo Vivi
• [Intel-gfx] [PULL] drm-intel-fixes   Rodrigo Vivi
• [Intel-gfx] [PULL] drm-intel-next   Joonas Lahtinen
• [Intel-gfx] [PULL] drm-intel-next-fixes   Joonas Lahtinen
• [Intel-gfx] [PULL] drm-intel-next-fixes   Joonas Lahtinen
• [Intel-gfx] [PULL] drm-misc-fixes   Gustavo Padovan
• [Intel-gfx] [PULL] drm-misc-fixes   Gustavo Padovan
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] [PULL] drm-misc-next   Daniel Vetter
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] [PULL] drm-misc-next   Daniel Vetter
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] [PULL] drm-misc-next   Ville Syrjälä
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] [PULL] drm-misc-next   Daniel Vetter
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] [PULL] drm-misc-next   Sean Paul
• [Intel-gfx] [PULL] drm-misc-next-fixes   Sean Paul
• [Intel-gfx] [PULL] gvt-next-fixes for 4.17   Zhenyu Wang
• [Intel-gfx] [PULL] gvt-next-fixes for 4.17   Joonas Lahtinen
• [Intel-gfx] [PULL] gvt-next for 4.17   Zhenyu Wang
• [Intel-gfx] [PULL] gvt-next for 4.17   Joonas Lahtinen
• [Intel-gfx] [PULL] gvt-next for 4.17   Jani Nikula
• [Intel-gfx] [PULL] gvt-next for 4.17   Joonas Lahtinen
• [Intel-gfx] [PULL] more gvt-fixes for 4.16   Zhenyu Wang
• [Intel-gfx] [PULL] more gvt-fixes for 4.16   Rodrigo Vivi
• [Intel-gfx] [PULL] more gvt-next-fixes for 4.17   Zhenyu Wang
• [Intel-gfx] [PULL] more gvt-next-fixes for 4.17   Joonas Lahtinen
• [Intel-gfx] [PULL] more gvt-next-fixes for 4.17   Joonas Lahtinen
• [Intel-gfx] [PULL] more gvt-next-fixes for 4.17   Zhenyu Wang
• [Intel-gfx] [PULL] more gvt-next-fixes for 4.17   Zhenyu Wang
• [Intel-gfx] [PULL] more gvt-next-fixes for 4.17   Zhenyu Wang
• [Intel-gfx] [RFC 0/5] drm/i915: Interface to get GFX shmem usage stats per process   Praveen Paneri
• [Intel-gfx] [RFC 0/8] Force preemption   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 0/8] Force preemption   Chris Wilson
• [Intel-gfx] [RFC 0/8] Force preemption   Chris Wilson
• [Intel-gfx] [RFC 0/8] Force preemption   Chris Wilson
• [Intel-gfx] [RFC 0/8] Force preemption   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 0/8] Force preemption   Tvrtko Ursulin
• [Intel-gfx] [RFC 0/8] Force preemption   Chris Wilson
• [Intel-gfx] [RFC 0/8] Force preemption   Jeff McGee
• [Intel-gfx] [RFC 0/8] Force preemption   Chris Wilson
• [Intel-gfx] [RFC 0/8] Force preemption   Jeff McGee
• [Intel-gfx] [RFC 0/8] Force preemption   Tvrtko Ursulin
• [Intel-gfx] [RFC 0/8] Force preemption   Jeff McGee
• [Intel-gfx] [RFC 0/8] Force preemption   Tvrtko Ursulin
• [Intel-gfx] [RFC 0/8] Force preemption   Jeff McGee
• [Intel-gfx] [RFC 0/8] Force preemption   Bloomfield, Jon
• [Intel-gfx] [RFC 0/8] Force preemption   Joonas Lahtinen
• [Intel-gfx] [RFC 0/8] Force preemption   Chris Wilson
• [Intel-gfx] [RFC 1/5] drm/i915: Sysfs interface to get GFX shmem usage stats per process   Praveen Paneri
• [Intel-gfx] [RFC 1/5] drm/i915: Sysfs interface to get GFX shmem usage stats per process   Chris Wilson
• [Intel-gfx] [RFC 1/8] drm/i915/execlists: Refactor out complete_preempt_context()   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 1/8] drm/i915: Downgrade tasklet GEM_BUG_ON for request not completed   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 1/8] drm/i915: Downgrade tasklet GEM_BUG_ON for request not completed   Chris Wilson
• [Intel-gfx] [RFC 2/5] drm/i915: Calculate total shmem GFX memory consumed   Praveen Paneri
• [Intel-gfx] [RFC 2/8] drm/i915: Add control flags to i915_handle_error()   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 2/8] drm/i915: Skip CSB processing on invalid CSB tail   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 2/8] drm/i915: Skip CSB processing on invalid CSB tail   Chris Wilson
• [Intel-gfx] [RFC 3/5] drm/i915: Sysfs interface to get detailed GFX buffer info per process   Praveen Paneri
• [Intel-gfx] [RFC 3/8] drm/i915: Execlists to mark the HWSP upon preemption finished   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 3/8] drm/i915: Move engine reset prepare/finish to backends   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 4/5] drm/i915: Output the user virtual addresses for GFX buffers   Praveen Paneri
• [Intel-gfx] [RFC 4/8] drm/i915: Add a wait_for routine with more exact timeout   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 4/8] drm/i915: Split execlists/guc reset prepartions   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 5/5] drm/i915: Update process mm stats for Gen GFX memory   Praveen Paneri
• [Intel-gfx] [RFC 5/8] drm/i915/execlists: Flush pending preemption events during reset   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 5/8] drm/i915: Consider preemption when finding the active request   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 6/8] drm/i915: Fix loop on CSB processing   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 6/8] drm/i915: Fix loop on CSB processing   Jeff McGee
• [Intel-gfx] [RFC 6/8] drm/i915: Fix loop on CSB processing   Chris Wilson
• [Intel-gfx] [RFC 6/8] drm/i915: Fix loop on CSB processing   Jeff McGee
• [Intel-gfx] [RFC 6/8] drm/i915: Fix loop on CSB processing   Chris Wilson
• [Intel-gfx] [RFC 6/8] drm/i915: Repair the preemption context if hit by reset   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 7/8] drm/i915: Allow reset without error capture   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 7/8] drm/i915: Allow reset without error capture   Chris Wilson
• [Intel-gfx] [RFC 7/8] drm/i915: Skip CSB processing on invalid CSB tail   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 7/8] drm/i915: Skip CSB processing on invalid CSB tail   Jeff McGee
• [Intel-gfx] [RFC 7/8] drm/i915: Skip CSB processing on invalid CSB tail   Chris Wilson
• [Intel-gfx] [RFC 7/8] drm/i915: Skip CSB processing on invalid CSB tail   Chris Wilson
• [Intel-gfx] [RFC 8/8] drm/i915: Force preemption to complete via engine reset   jeff.mcgee at intel.com
• [Intel-gfx] [RFC 8/8] drm/i915: Force preemption to complete via engine reset   Chris Wilson
• [Intel-gfx] [RFC 8/8] drm/i915: Force preemption to complete via engine reset   Chris Wilson
• [Intel-gfx] [RFC 8/8] drm/i915: Force preemption to complete via engine reset   jeff.mcgee at intel.com
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Linus Walleij
• [Intel-gfx] [RFC][PATCH 04/11] drm: Split the display info into static and dynamic parts   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 05/11] drm/edid: Clear display info fully   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 05/11] drm/edid: Clear display info fully   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 05/11] drm/edid: Clear display info fully   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 06/11] drm/edid: Don't call drm_add_display_info() with an invalid EDID   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 07/11] drm/probe-helper: Avoid iterating the list twice on ww backoff   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 07/11] drm/probe-helper: Avoid iterating the list twice on ww backoff   Ville Syrjälä
• [Intel-gfx] [RFC][PATCH 08/11] drm: Add drm_connector_fill_modes()   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 08/11] drm: Add drm_connector_fill_modes()   Ville Syrjälä
• [Intel-gfx] [RFC][PATCH 09/11] drm: Fix getconnector locking   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 10/11] drm: Fix debugfs edid_override locking   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 11/11] drm: Sprinkle lockdep asserts for edid/display_info   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 11/11] drm: Sprinkle lockdep asserts for edid/display_info   Ville Syrjälä
• [Intel-gfx] [RFC][PATCH 11/11] drm: Sprinkle lockdep asserts for edid/display_info   Harry Wentland
• [Intel-gfx] [RFC][PATCH 11/11] drm: Sprinkle lockdep asserts for edid/display_info   Daniel Vetter
• [Intel-gfx] [RFC][PATCH 11/11] drm: Sprinkle lockdep asserts for edid/display_info   Harry Wentland
• [Intel-gfx] [RFC][PATCH 11/11] drm: Sprinkle lockdep asserts for edid/display_info   Daniel Vetter
• [Intel-gfx] [RFC] drm/i915/psr: Remove PSR active flag from debugfs   Dhinakaran Pandiyan
• [Intel-gfx] [RFC] drm/i915/psr: Remove PSR active flag from debugfs   Souza, Jose
• [Intel-gfx] [RFC] drm/i915/psr: Remove PSR active flag from debugfs   Rodrigo Vivi
• [Intel-gfx] [RFC] drm/i915: Engine discovery query   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: Engine discovery query   Lionel Landwerlin
• [Intel-gfx] [RFC] drm/i915: Engine discovery query   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: Engine discovery query   Lionel Landwerlin
• [Intel-gfx] [RFC] drm/i915: Engine discovery query   Bloomfield, Jon
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Chris Wilson
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Tvrtko Ursulin
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [RFC] drm/i915: store all mmio bases in intel_engines   Daniele Ceraolo Spurio
• [Intel-gfx] [RFC] splitting dri-devel to drm core and drivers lists?   Jani Nikula
• [Intel-gfx] [RFC] splitting dri-devel to drm core and drivers lists?   Daniel Vetter
• [Intel-gfx] [RFC] splitting dri-devel to drm core and drivers lists?   Joonas Lahtinen
• [Intel-gfx] [RFC] splitting dri-devel to drm core and drivers lists?   Daniel Vetter
• [Intel-gfx] [RFC] splitting dri-devel to drm core and drivers lists?   Jani Nikula
• [Intel-gfx] [RFC] splitting dri-devel to drm core and drivers lists?   Daniel Vetter
• [Intel-gfx] [RFC i-g-t] intel-gpu-top: Rewrite the tool to be safe to use   Tvrtko Ursulin
• [Intel-gfx] [RFC i-g-t] intel-gpu-top: Rewrite the tool to be safe to use   Chris Wilson
• [Intel-gfx] [RFC i-g-t] intel-gpu-top: Rewrite the tool to be safe to use   Lionel Landwerlin
• [Intel-gfx] [RFC i-g-t] intel-gpu-top: Rewrite the tool to be safe to use   Petri Latvala
• [Intel-gfx] [RFC PATCH] cgroup: cgroup_idr_lock can be static   kbuild test robot
• [Intel-gfx] [RFC PATCH i-g-t 0/3] Test the plane formats on the Chamelium   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 0/3] Test the plane formats on the Chamelium   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 0/3] Test the plane formats on the Chamelium   Eric Anholt
• [Intel-gfx] [RFC PATCH i-g-t 0/3] Test the plane formats on the Chamelium   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 1/3] tests/chamelium: Move some functions and structures to a common place   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 2/3] tests/chamelium: Add test case for plane formats   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 2/3] tests/chamelium: Add test case for plane formats   Eric Anholt
• [Intel-gfx] [RFC PATCH i-g-t 2/3] tests/chamelium: Add test case for plane formats   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 3/3] tests: Add vc4 test suite   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 3/3] tests: Add vc4 test suite   Petri Latvala
• [Intel-gfx] [RFC PATCH i-g-t 3/3] tests: Add vc4 test suite   Maxime Ripard
• [Intel-gfx] [RFC PATCH i-g-t 3/3] tests: Add vc4 test suite   Petri Latvala
• [Intel-gfx] [RFC PATCH i-g-t 3/3] tests: Add vc4 test suite   Maxime Ripard
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Tomasz Lis
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Joonas Lahtinen
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Lis, Tomasz
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Dunajski, Bartosz
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Joonas Lahtinen
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Dunajski, Bartosz
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Joonas Lahtinen
• [Intel-gfx] [RFC v1] Data port coherency control for UMDs.   Dunajski, Bartosz
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Tomasz Lis
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Chris Wilson
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Lis, Tomasz
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Chris Wilson
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Lis, Tomasz
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Oscar Mateo
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Chris Wilson
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Oscar Mateo
• [Intel-gfx] [RFC v1] drm/i915: Add Exec param to control data port coherency.   Lis, Tomasz
• [Intel-gfx] [RFC v3 0/8] Add Plane Color Properties   Uma Shankar
• [Intel-gfx] [RFC v3 0/8] Add Plane Color Properties   Emil Velikov
• [Intel-gfx] [RFC v3 02/12] drm/file: Don't set master on in-kernel clients   Daniel Vetter
• [Intel-gfx] [RFC v3 04/12] drm: Make ioctls available for in-kernel clients part 2   Daniel Vetter
• [Intel-gfx] [RFC v3 07/12] drm/modes: Add drm_umode_equal()   Daniel Vetter
• [Intel-gfx] [RFC v3 08/12] drm/framebuffer: Add drm_mode_can_dirtyfb()   Daniel Vetter
• [Intel-gfx] [RFC v3 09/12] drm: Add API for in-kernel clients   Daniel Vetter
• [Intel-gfx] [RFC v3 09/12] drm: Add API for in-kernel clients   Noralf Trønnes
• [Intel-gfx] [RFC v3 09/12] drm: Add API for in-kernel clients   Daniel Vetter
• [Intel-gfx] [RFC v3 09/12] drm: Add API for in-kernel clients   Noralf Trønnes
• [Intel-gfx] [RFC v3 09/12] drm: Add API for in-kernel clients   Daniel Vetter
• [Intel-gfx] [RFC v3 1/8] drm: Add Enhanced Gamma LUT precision structure   Uma Shankar
• [Intel-gfx] [RFC v3 10/12] drm/client: Add fbdev emulation client   Daniel Vetter
• [Intel-gfx] [RFC v3 11/12] drm/client: Add bootsplash client   Daniel Vetter
• [Intel-gfx] [RFC v3 11/12] drm/client: Add bootsplash client   Max Staudt
• [Intel-gfx] [RFC v3 2/8] drm: Add Plane Degamma properties   Uma Shankar
• [Intel-gfx] [RFC v3 3/8] drm: Add Plane CTM property   Uma Shankar
• [Intel-gfx] [RFC v3 4/8] drm: Add Plane Gamma properties   Uma Shankar
• [Intel-gfx] [RFC v3 5/8] drm: Define helper function for plane color enabling   Uma Shankar
• [Intel-gfx] [RFC v3 6/8] drm/i915: Enable plane color features   Uma Shankar
• [Intel-gfx] [RFC v3 7/8] drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms   Uma Shankar
• [Intel-gfx] [RFC v3 8/8] drm/i915: Load plane color luts from atomic flip   Uma Shankar
• [Intel-gfx] [RFC v5] drm/i915/psr: Kill scheduled work for Core platforms.   Rodrigo Vivi
• [Intel-gfx] [RFC v5] drm/i915/psr: Kill scheduled work for Core platforms.   Pandiyan, Dhinakaran
• [Intel-gfx] [RFC v5] drm/i915/psr: Kill scheduled work for Core platforms.   Rodrigo Vivi
• [Intel-gfx] [RFC v5] drm/i915/psr: Kill scheduled work for Core platforms.   Pandiyan, Dhinakaran
• [Intel-gfx] [stable:v4.15] drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.   Dhinakaran Pandiyan
• [Intel-gfx] Bay Trail: CPU C-state / GPU-freq changes interaction problems   Hans de Goede
• [Intel-gfx] drm-intel geared towards v4.18   Jani Nikula
• [Intel-gfx] drm-next xf86-video-vmware breakage Was [PATCH 02/10] drm/uapi: Validate the mode flags/type   Thomas Hellstrom
• [Intel-gfx] drm-next xf86-video-vmware breakage Was [PATCH 02/10] drm/uapi: Validate the mode flags/type   Ville Syrjälä
• [Intel-gfx] drm-next xf86-video-vmware breakage Was [PATCH 02/10] drm/uapi: Validate the mode flags/type   Thomas Hellstrom
• [Intel-gfx] Forced preemption gedankenexperiment   Chris Wilson
• [Intel-gfx] FW: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.   Kumar, Abhay
• [Intel-gfx] i915 vs checkpatch   Arkadiusz Hiler
• [Intel-gfx] i915 vs checkpatch   Jani Nikula
• [Intel-gfx] i915 vs checkpatch   Ville Syrjälä
• [Intel-gfx] i915 vs checkpatch   Jani Nikula
• [Intel-gfx] i915 vs checkpatch   Rodrigo Vivi
• [Intel-gfx] i915 vs checkpatch   Chris Wilson
• [Intel-gfx] i915 vs checkpatch   Joonas Lahtinen
• [Intel-gfx] i915 vs checkpatch   Jani Nikula
• [Intel-gfx] i915 vs checkpatch   Jani Nikula
• [Intel-gfx] i915 vs checkpatch   Daniel Vetter
• [Intel-gfx] i915 vs checkpatch   Jani Nikula
• [Intel-gfx] i915 vs checkpatch   Arkadiusz Hiler
• [Intel-gfx] i915 vs checkpatch   Arkadiusz Hiler
• [Intel-gfx] i915 vs checkpatch   Jani Nikula
• [Intel-gfx] linux-next: manual merge of the drm-intel tree with Linus' tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the drm-intel tree with Linus' tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the drm-intel tree with Linus' tree   Joonas Lahtinen
• [Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the drm-misc tree with the drm tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the drm-misc tree with the drm tree   Ville Syrjälä
• [Intel-gfx] linux-next: manual merge of the drm tree with the drm-misc-fixes tree   Stephen Rothwell
• [Intel-gfx] linux-next: manual merge of the mali-dp tree with the drm-misc tree   Stephen Rothwell
• [Intel-gfx] please do *NOT* backport 9965db26ac05 ("drm/i915: Check for fused or unused pipes")   Jani Nikula
• [Intel-gfx] please do *NOT* backport 9965db26ac05 ("drm/i915: Check for fused or unused pipes")   Greg KH
• [Intel-gfx] Preemption reset from timer; CI now 110% happier   Chris Wilson
• [Intel-gfx] Question about latest skl_dmc_ver1_27.bin and kernel version.   Paul Knopf
• [Intel-gfx] Question about latest skl_dmc_ver1_27.bin and kernel version.   Rodrigo Vivi
• [Intel-gfx] Reset from within timeout for preemption Qos   Chris Wilson
• [Intel-gfx] Sleepless per-engine resests   Chris Wilson
• [Intel-gfx] Subject: [PATCH 1/1] drm/i915: move audio component intialization before audio   Shi, Yang A
• [Intel-gfx] Subject: [PATCH 1/1] drm/i915: move audio component intialization before audio   Jani Nikula
• [Intel-gfx] The behavior of i915_wait_request() after calling i915_gem_suspend_request()   Zhi Wang
• [Intel-gfx] Updated drm-intel-testing   Joonas Lahtinen
• [Intel-gfx] vlv punit and sideband tidy   Chris Wilson
• [Intel-gfx] vlv punit and sideband tidy   Rogozhkin, Dmitry V
• [Intel-gfx] vlv punit and sideband tidy   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.BAT: success for Add NV12 support   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Add NV12 support (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Add NV12 support (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Add NV12 support (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Add NV12 support (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Add NV12 support (rev6)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Add Plane Color Properties (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for blacklist: Don't run DRRS test on Intel CI system   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for cgroup private data and DRM/i915 integration   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for cgroup private data and DRM/i915 integration (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for CNL port refactoring (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for CNL port refactoring (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for CNL port refactoring (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Documentation patch for batchbuffer submission (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Documentation patch for batchbuffer submission (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/edid: Dump valid EDIDs too   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i195: Index the ring frequency table by HW frequency range (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/breadcrumbs: Keep the fake irq armed across reset (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Add Wa_2201832410   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Add Wa_2201832410   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Add Wa_2201832410 (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: document WaVFUnitClockGatingDisable   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: document WaVFUnitClockGatingDisable   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: clean up leftover references to CHV HBR2 support   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Do not set the eDP link rate/lane count to max   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Fix intel_edp_compare_alt_mode.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Avoid kicking the submission too early for rescheduling (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Clear user-active flag on preemption completion   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Consistent seqno reporting in GEM_TRACE   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Move irq state manipulation inside irq disabled region   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Reset ring registers on rebinding contexts   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Set queue priority from secondary port   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Track begin/end of execlists submission sequences   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Preempt-to-idle support in execlists.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Fix build break on config without DEBUG_FS   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Fix null pointer dereference when GuC FW is not available (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Handle GuC log flush event in dedicated function   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Removed unused GuC parameters. (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Support for Guc responses and requests (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Support for Guc responses and requests (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Support for Guc responses and requests (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Support for Guc responses and requests (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Unify parameters of public CT functions (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update syntax of GuC log functions (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: don't dereference 'workload' before null checking it   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: fix spelling mistake: "destoried" -> "destroyed"   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: fix spelling mistake: "registeration" -> "registration"   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/huc: Check HuC status in dedicated function   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: do not save DDI A/E sharing bit for ICL   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: local_clock returns an u64   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Use hw engine class, instance to find irq handler (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: enable perf support on ICL   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: enable perf support on ICL (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: fix perf stream opening lock (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: optimize perf stream usage on Gen7.5   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pm: Warn if rpm frequencies are not set   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Work around compiler warnings on some kernel configs   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Work around compiler warnings on some kernel configs   Tvrtko Ursulin
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Work around compiler warnings on some kernel configs   Arnd Bergmann
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Comment to clarify SRD_DEBUG is called PSR_MASK SKL+   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Kill scheduled work for Core platforms. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Remove PSR active flag from debugfs   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Update PSR2 resolution check for Cannonlake (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Update PSR2 resolution check for Cannonlake (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Add basic sanitychecks for execlists   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Avoid repeatedly harming the same innocent context   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Include the trace as a debug aide   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Include the trace as a debug aide (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Stress resets-vs-request-priority   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/stolen: Intepret reserved_base=0 as deduce from top   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Sanitize uC   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Sanitize uC (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Sanitize uC (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Actually flush interrupts on reset not just wedging (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Exec param to control data port coherency.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Exec param to control data port coherency. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add schedule out notification of preempted but completed request (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Assert that the request is indeed complete when signaled from irq   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: avoid false fence signaling when enabling preemption   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Avoid sleeping inside per-engine reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Avoid sleeping inside per-engine reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Check all requests have been retired on switching to kernel context   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Check rq->timeline before deference   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Configure GPU PM in ->suspend() if not configured   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Control PSR at runtime through debugfs only (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Control PSR at runtime through debugfs only (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable LVDS on Radiant P845   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable pipe CRC before disabling the pipe. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable some extra clang warnings (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't initialize plane_to_crtc_mapping[] on SKL+   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: don't leak the pin_map on error   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: don't leak the pin_map on error (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Engine discovery query   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose RCS topology to userspace   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix hibernation with ACPI S0 target state   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix tracing of submit seqno   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Flush pending interrupt following a GPU reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle changing enable_fbc parameter at runtime better.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle changing enable_psr parameter at runtime better   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle pipe CRC around enabling/disabling pipe.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev6)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Include submission tasklet state in engine dump   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Include submission tasklet state in engine dump (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Kick the rps worker when changing the boost frequency (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Kill the remaining CHV HBR2 leftovers   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: make edp optimize config   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: make GEM_WARN_ON less terrible   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: misc fixes in headers (RESEND)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Move CUR_SURFLIFE definition to a better place. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move dpll_info inside intel_shared_dpll (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Only prune fences after wait-for-all (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Only warn for might_sleep() before a slow wait_for_register   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Prefer memset64() when filling the iomap   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Promote .format_mod_supported() to the lead role   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Protect PIPE_CONF_CHECK macros with do {} while(0)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Register definitions for DP Phy compiance   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove hole and padding from intel_shared_dpll   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove local timeline var from submit/unsubmit (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove local timeline var from submit/unsubmit (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Replace open-coded wait-for loop (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Request driver probe from an async task   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reword warning for missing cases   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reword warning for missing cases (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rework FBC schedule locking   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Show dmc debug registers on CFL and GLK (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Show GEM_TRACE when detecting a failed GPU idle (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Skip logging impossible slices   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Some plane init cleanups   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Some plane init cleanups (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Split GPU commands definitions into separate header   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Split GPU commands definitions into separate header   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Stop engines around GPU reset preparations   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Stop engines around GPU reset preparations (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Store preemption capability in engine->flags   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Trace GEM steps between submit and wedging   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Unwind vma pinning for intel_pin_and_fence_fb_obj error path   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use full serialisation around engine->irq_posted   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use sseu size for determining eu_regs[]   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use sseu size for determining eu_regs[]   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: warn only once about ddi translation table missing   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Wedged engine mask makes more sense in hex   Tvrtko Ursulin
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for DRM/i915 cgroup integration   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm/scdc-helper: Convert errors into debug messages   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Don't pass the index to drm_property_add_enum()   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Fix uabi regression by allowing garbage mode->type from userspace   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for drm: Use srcu to protect drm_device.unplugged   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Guc and HuC for Cannonlake (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for HDCP1.4 fixes (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for ICL PLLs, DP/HDMI and misc display (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for ICL reviewed mergeable patches   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_ctx_switch: Measure qlen for timing loops   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for igt: Add gem_ctx_freq to exercise requesting freq on a ctx (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for input/psmouse: Don't hold the mutex while calling ->disconnect   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for lib/gpgpu_fill: Adding missing configuration parameters for gpgpu_fill function   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for meson: Chamelium depends on GSL   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for PSR interrupts   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for RFC: debugobjects: capture stack traces at _init() time   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for semaphore: might_lock(->pi_lock) in up()   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915: Disable preemption and sleeping while using the punit sideband   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915: Disable preemption and sleeping while using the punit sideband (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/17] drm/i915/execlists: Track begin/end of execlists submission sequences   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/18] drm/i915/selftests: Avoid repeatedly harming the same innocent context   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/36] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/1] drm/i915/guc: s/intel_guc_fw_upload/intel_guc_init_hw/   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/1] drm/i915: move audio component intialization before audio driver use it   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/debugfs: Print sink PSR status   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/psr: Move PSR aux setup to it's own function.   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Include the trace as a debug aide   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Remove variable length arrays from sseu debugfs printers   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Specify which engines to reset following semaphore/event lockups   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Stop engines around GPU reset preparations   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Stop kicking the signaling thread on seqno wraparound   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Trace GEM steps between submit and wedging (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Trace GEM steps between submit and wedging (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Use full serialisation around engine->irq_posted   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/simple-kms-helper: Plumb plane state to the enable hook   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/simple-kms-helper: Plumb plane state to the enable hook (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/error: remove unused gen8_engine_sync_index   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/execlists: Reset ring registers on rebinding contexts (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Trim error mask to known engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm: Don't create properties without names   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm: Don't create properties without names (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm: Make sure at least one plane supports the fb format   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm: Nuke the useless 'ret' variable from drm_mode_convert_umode()   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm: prefer inline over __inline__   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/selftests: Include the trace as a debug aide   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Stop engines around GPU reset preparations   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/icl: Ringbuffer interrupt handling   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Finish the wait-for-wedge by retiring all the inflight requests   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm: Reject replacing property enum values   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] Revert "drm/atomic-helper: Fix leak in disable_all"   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] Revert "drm: Use a flexible array member for blob property data" (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/guc: enable guc interrupts unconditionally in uc_resume   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/icl: Prepare for more rings   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Avoid sleeping inside per-engine reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Kick the rps worker when changing the boost frequency   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/guc: Unify naming of private GuC action functions   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/guc: Unify naming of private GuC action functions   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915: Suspend submission tasklets around wedging   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915/guc: Tidy guc_log_control   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,01/15] drm/i915/guc: Tidy guc_log_control   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/huc: Mark firmware as failed on auth failure   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/error: remove unused gen8_engine_sync_index   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/frontbuffer: Pull frontbuffer_flush out of gem_obj_pin_to_display   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/guc: Unify naming of private GuC action functions   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm: Add the optional .fb_modifier() hook (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm: Make sure at least one plane supports the fb format (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915: Enable edp psr error interrupts on hsw   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2] drm/i915/selftests: Include the trace as a debug aide (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,01/13] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/guc: Unify naming of private GuC action functions   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915: Reorder early initialization   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/4] drm: Add drm_any_plane_has_format()   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/4] drm: Add drm_any_plane_has_format()   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/3] drm/i915: Reorder early initialization   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/4] drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/7] drm/i915: Correctly handle error path in i915_gem_init_hw   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/8] drm/i915: Correctly handle error path in i915_gem_init_hw   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for tests/gem_eio: use lib to force a gpu reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for tests: Introduce drv_cgroup (v2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for Test the plane formats on the Chamelium   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for trace: Default to using trace_global_clock if sched_clock is unstable   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for trace: Default to using trace_global_clock if sched_clock is unstable (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.BAT: success for trace: Default to using trace_global_clock is sched_clock is unstable   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for Add NV12 support (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for cgroup private data and DRM/i915 integration (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for CNL port refactoring (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/edid: Dump valid EDIDs too   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: Add Wa_2201832410 (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: document WaVFUnitClockGatingDisable   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: clean up leftover references to CHV HBR2 support   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Fix intel_edp_compare_alt_mode.   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Move irq state manipulation inside irq disabled region   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Set queue priority from secondary port   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen11: Preempt-to-idle support in execlists.   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)   Imre Deak
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC (rev3)   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Fix build break on config without DEBUG_FS   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Fix null pointer dereference when GuC FW is not available (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Unify parameters of public CT functions (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: don't dereference 'workload' before null checking it   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: fix spelling mistake: "destoried" -> "destroyed"   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: fix spelling mistake: "registeration" -> "registration"   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: local_clock returns an u64   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: enable perf support on ICL   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: fix perf stream opening lock (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Work around compiler warnings on some kernel configs   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Kill scheduled work for Core platforms. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Remove PSR active flag from debugfs   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Update PSR2 resolution check for Cannonlake (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Update PSR2 resolution check for Cannonlake (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Add basic sanitychecks for execlists   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Include the trace as a debug aide   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Include the trace as a debug aide (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Actually flush interrupts on reset not just wedging (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add schedule out notification of preempted but completed request (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Assert that the request is indeed complete when signaled from irq   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoid sleeping inside per-engine reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Control PSR at runtime through debugfs only (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Control PSR at runtime through debugfs only (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Disable LVDS on Radiant P845   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: don't leak the pin_map on error   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Engine discovery query   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix hibernation with ACPI S0 target state   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix hibernation with ACPI S0 target state   Imre Deak
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Flush pending interrupt following a GPU reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Handle changing enable_fbc parameter at runtime better.   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Handle changing enable_psr parameter at runtime better   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev6)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Include submission tasklet state in engine dump   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Include submission tasklet state in engine dump (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Kill the remaining CHV HBR2 leftovers   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: make GEM_WARN_ON less terrible   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: move dpll_info inside intel_shared_dpll (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Only prune fences after wait-for-all (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Prefer memset64() when filling the iomap   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Register definitions for DP Phy compiance   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove hole and padding from intel_shared_dpll   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove the impedance mismatch around intel_engine_enable_signaling   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Replace open-coded wait-for loop (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Replace open-coded wait-for loop (rev2)   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Reword warning for missing cases   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Reword warning for missing cases (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Rework FBC schedule locking   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Split GPU commands definitions into separate header   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Store preemption capability in engine->flags   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Trace GEM steps between submit and wedging   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Unwind vma pinning for intel_pin_and_fence_fb_obj error path   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams (rev4)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Use full serialisation around engine->irq_posted   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Use sseu size for determining eu_regs[]   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: warn only once about ddi translation table missing   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm: Don't pass the index to drm_property_add_enum()   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm: Fix uabi regression by allowing garbage mode->type from userspace   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm: Reduce object size of DRM_ERROR and DRM_DEBUG uses   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for drm: Use srcu to protect drm_device.unplugged   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for Guc and HuC for Cannonlake (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for ICL PLLs, DP/HDMI and misc display (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for ICL reviewed mergeable patches   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for igt: Add gem_ctx_freq to exercise requesting freq on a ctx   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for input/psmouse: Don't hold the mutex while calling ->disconnect   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for lib/gpgpu_fill: Adding missing configuration parameters for gpgpu_fill function   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for PSR interrupts   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for RFC: debugobjects: capture stack traces at _init() time   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for semaphore: might_lock(->pi_lock) in up()   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/10] drm/i915: Disable preemption and sleeping while using the punit sideband (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/1] drm/i915/guc: s/intel_guc_fw_upload/intel_guc_init_hw/   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/1] drm/i915: move audio component intialization before audio driver use it   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/psr: Move PSR aux setup to it's own function.   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Trace GEM steps between submit and wedging (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Trace GEM steps between submit and wedging (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/simple-kms-helper: Plumb plane state to the enable hook   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/simple-kms-helper: Plumb plane state to the enable hook (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm: Don't create properties without names (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm: Nuke the useless 'ret' variable from drm_mode_convert_umode()   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm: prefer inline over __inline__   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] drm/i915/icl: Ringbuffer interrupt handling   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] drm/i915: Finish the wait-for-wedge by retiring all the inflight requests   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] Revert "drm/atomic-helper: Fix leak in disable_all"   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/8] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Avoid sleeping inside per-engine reset   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Kick the rps worker when changing the boost frequency   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Kick the rps worker when changing the boost frequency   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/3] drm/i915/frontbuffer: Pull frontbuffer_flush out of gem_obj_pin_to_display   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/3] drm/i915/guc: Unify naming of private GuC action functions   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/3] drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/4] drm/i915: Enable edp psr error interrupts on hsw   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2] drm/i915/selftests: Include the trace as a debug aide (rev2)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev3)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/4] drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/4] drm/i915: store all mmio bases in intel_engines   Chris Wilson
• [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev5)   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for trace: Default to using trace_global_clock if sched_clock is unstable   Patchwork
• [Intel-gfx] ✓ Fi.CI.IGT: success for trace: Default to using trace_global_clock is sched_clock is unstable   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Add NV12 support   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Add NV12 support (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Add NV12 support (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Add support for GuC-based SLPC (rev12)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Aspect ratio support in DRM layer   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/cnl: Add Wa_2201832410   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/cnl: Add Wa_2201832410 (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/cnl: Add Wa_2201832410 (rev2)   Rodrigo Vivi
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: Write to SET_POWER dpcd to enable MST hub. (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: enable guc interrupts unconditionally in uc_resume   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Fix null pointer dereference when GuC FW is not available (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Removed unused GuC parameters. (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Unify parameters of public CT functions   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/perf: fix perf stream opening lock (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Kill scheduled work for Core platforms.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Kill scheduled work for Core platforms.   Pandiyan, Dhinakaran
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Kill scheduled work for Core platforms.   Rodrigo Vivi
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Update PSR2 resolution check for Cannonlake   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Actually flush interrupts on reset not just wedging   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Actually flush interrupts on reset not just wedging (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Actually flush interrupts on reset not just wedging (rev2)   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add debugfs file to clear FIFO underruns.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: avoid false fence signaling when enabling preemption   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_modeset   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the port pipe select bits   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the port pipe select bits   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the port pipe select bits (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Control PSR at runtime through debugfs only   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Disable pipe CRC before disabling the pipe.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Disable some extra clang warnings   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: drop various VLAs in i915_debugfs.c   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Handle pipe CRC around enabling/disabling pipe. (rev5)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Implement HDCP2.2 (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Interface to get GFX shmem usage stats per process   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: make edp optimize config (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: move dpll_info inside intel_shared_dpll   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Request driver probe from an async task   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Reword warning for missing cases (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Select STACKDEPOT for DRM_I915_DEBUG   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Show dmc debug registers on CFL and GLK   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Some plane init cleanups   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Some plane init cleanups (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Trace GEM steps between submit and wedging   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Trim error mask to known engines   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm: Eliminate plane->fb/crtc usage for atomic drivers   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for drm: i915: Fix audio issue on BXT (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for force-preempt-reset   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Force preemption   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Force preemption (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Re-use DEFINE_SHOW_ATTRIBUTE() macro (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for ICL PLLs, DP/HDMI and misc display (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Non-Intel test suite fixes   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Queued/runnable/running engine stats (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for Restore "ALSA: hda: Make use of core codec functions to sync power state"   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/12] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/15] drm/i915/execlists: Refactor out complete_preempt_context()   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/15] drm/i915/execlists: Refactor out complete_preempt_context()   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/17] drm/i915/execlists: Track begin/end of execlists submission sequences   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] igt/gen7_forcewake_mt: Make the mmio register as volatile   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/execlists: Reset ring registers on rebinding contexts   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm: Add the optional .fb_modifier() hook   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/psr: Nuke aux_frame_sync   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] Revert "drm: Use a flexible array member for blob property data" (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] Revert "drm: Use a flexible array member for blob property data" (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v11,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v12,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen   Jani Nikula
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] trace: Default to using trace_global_clock if sched_clock is unstable   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/4] drm/i915: Enable edp psr error interrupts on hsw (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/5] drm/i915/psr: Nuke aux_frame_sync   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,3/3] HAX: Enable GuC for CI (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,3/3] HAX: Enable GuC for CI (rev4)   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v3,1/2] drm/i915/uc: Start preparing GuC/HuC for reset   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v3,1/3] drm/i915: store all mmio bases in intel_engines (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v6,1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev6)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v6,1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev7)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/dp: Fix intel_edp_compare_alt_mode. (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/guc: Unify naming of private GuC action functions   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/guc: Update syntax of GuC log functions   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/pmu: avoid -Wmaybe-uninitialized warning (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/psr: Kill scheduled work for Core platforms.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/psr: Test PSR.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/skl+: Add and enable DP AUX CH mutex (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Remove support for legacy debugfs crc interface (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for drm: Restore planes after load detection   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for HACK: enable the chamelium HDMI-CRC-multiple test   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [01/11] drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/psr: Move PSR aux setup to it's own function.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/psr: Move PSR aux setup to it's own function.   Pandiyan, Dhinakaran
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/psr: Move PSR aux setup to it's own function.   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Add code to accept valid locked WOPCM register values   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Avoid setting ring freq on invalid rps freqs   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [v3,1/4] drm/i915/uc: Use correct error code for GuC initialization failure   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev3)   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.BAT: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.BAT: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add NV12 support (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add NV12 support (rev4)   Jani Nikula
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add NV12 support (rev4)   Srinivas, Vidya
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for GuC-based SLPC (rev12)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for cgroup private data and DRM/i915 integration   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for cgroup private data and DRM/i915 integration   Jani Nikula
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for cgroup private data and DRM/i915 integration (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for cgroup private data and DRM/i915 integration (rev3)   Jani Nikula
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Avoid kicking the submission too early for rescheduling (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Reset ring registers on rebinding contexts   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Set queue priority from secondary port   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gen11: Preempt-to-idle support in execlists.   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Fix null pointer dereference when GuC FW is not available (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Support for Guc responses and requests (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: enable perf support on ICL (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: optimize perf stream usage on Gen7.5   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Add basic sanitychecks for execlists   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Avoid repeatedly harming the same innocent context   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Include the trace as a debug aide (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Stress resets-vs-request-priority   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Actually flush interrupts on reset not just wedging   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Actually flush interrupts on reset not just wedging (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Actually flush interrupts on reset not just wedging (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency.   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Check all requests have been retired on switching to kernel context   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix hibernation with ACPI S0 target state   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix tracing of submit seqno   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Flush pending interrupt following a GPU reset   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Interface to get GFX shmem usage stats per process   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Interface to get GFX shmem usage stats per process   Jani Nikula
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: make GEM_WARN_ON less terrible   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move dpll_info inside intel_shared_dpll   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move dpll_info inside intel_shared_dpll (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Promote .format_mod_supported() to the lead role   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Protect PIPE_CONF_CHECK macros with do {} while(0)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reword warning for missing cases (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reword warning for missing cases (rev2)   Lucas De Marchi
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reword warning for missing cases (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Rework FBC schedule locking   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Rework FBC schedule locking   Jani Nikula
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Don't pass the index to drm_property_add_enum()   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Eliminate plane->fb/crtc usage for atomic drivers   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev5)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Fix uabi regression by allowing garbage mode->type from userspace   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ICL PLLs, DP/HDMI and misc display (rev5)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ICL reviewed mergeable patches   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for input/psmouse: Don't hold the mutex while calling ->disconnect   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for PSR interrupts   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Restore "ALSA: hda: Make use of core codec functions to sync power state"   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for RFC: debugobjects: capture stack traces at _init() time   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for semaphore: might_lock(->pi_lock) in up()   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/15] drm/i915/execlists: Refactor out complete_preempt_context()   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/17] drm/i915/execlists: Track begin/end of execlists submission sequences   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/17] drm/i915/execlists: Track begin/end of execlists submission sequences   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/18] drm/i915/selftests: Avoid repeatedly harming the same innocent context   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/1] drm/i915: move audio component intialization before audio driver use it   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/debugfs: Print sink PSR status   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Include the trace as a debug aide   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Specify which engines to reset following semaphore/event lockups   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Use full serialisation around engine->irq_posted   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/simple-kms-helper: Plumb plane state to the enable hook   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/simple-kms-helper: Plumb plane state to the enable hook (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/execlists: Reset ring registers on rebinding contexts   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/execlists: Reset ring registers on rebinding contexts (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/selftests: Include the trace as a debug aide   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] trace: Default to using trace_global_clock if sched_clock is unstable   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/4] drm/i915: Enable edp psr error interrupts on hsw   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/5] drm/i915/psr: Nuke aux_frame_sync   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm/i915/selftests: Include the trace as a debug aide (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,01/13] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for trace: Default to using trace_global_clock if sched_clock is unstable   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for trace: Default to using trace_global_clock if sched_clock is unstable (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for trace: Default to using trace_global_clock is sched_clock is unstable   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Add NV12 support   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Add NV12 support (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Add NV12 support (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Add NV12 support (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Add NV12 support (rev6)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Add Plane Color Properties (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for blacklist: Don't run DRRS test on Intel CI system   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for Documentation patch for batchbuffer submission (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i195: Index the ring frequency table by HW frequency range (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/breadcrumbs: Keep the fake irq armed across reset (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/cnl: Add Wa_2201832410   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/cnl: document WaVFUnitClockGatingDisable   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: Do not set the eDP link rate/lane count to max   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Clear user-active flag on preemption completion   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Consistent seqno reporting in GEM_TRACE   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Reset ring registers on rebinding contexts   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Reset ring registers on rebinding contexts   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Support for Guc responses and requests (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Support for Guc responses and requests (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Support for Guc responses and requests (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Support for Guc responses and requests (rev5)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Support for Guc responses and requests (rev5)   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Update syntax of GuC log functions (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/huc: Check HuC status in dedicated function   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/icl: Use hw engine class, instance to find irq handler (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/perf: optimize perf stream usage on Gen7.5   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/psr: Comment to clarify SRD_DEBUG is called PSR_MASK SKL+   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Avoid repeatedly harming the same innocent context   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Stress resets-vs-request-priority   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/stolen: Intepret reserved_base=0 as deduce from top   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/uc: Sanitize uC   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/uc: Sanitize uC (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/uc: Sanitize uC (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/uc: Sanitize uC (rev3)   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Daniel Vetter
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Daniel Vetter
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Daniel Vetter
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/userptr: Wrap mmu_notifier inside its own rw_semaphore   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add Exec param to control data port coherency.   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add Exec param to control data port coherency. (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: avoid false fence signaling when enabling preemption   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: avoid false fence signaling when enabling preemption   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Disable pipe CRC before disabling the pipe. (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: expose RCS topology to userspace   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix tracing of submit seqno   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Handle pipe CRC around enabling/disabling pipe.   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: misc fixes in headers (RESEND)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: misc fixes in headers (RESEND)   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Only warn for might_sleep() before a slow wait_for_register   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Remove local timeline var from submit/unsubmit (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Remove support for legacy debugfs crc interface (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Request driver probe from an async task   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Show dmc debug registers on CFL and GLK (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Show GEM_TRACE when detecting a failed GPU idle (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Some plane init cleanups   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Some plane init cleanups (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Stop engines around GPU reset preparations   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Stop engines around GPU reset preparations (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for DRM/i915 cgroup integration   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/scdc-helper: Convert errors into debug messages   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/scdc-helper: Convert errors into debug messages   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for HDCP1.4 fixes (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for igt: Add gem_ctx_freq to exercise requesting freq on a ctx (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/11] drm/i915/execlists: Avoid kicking the submission too early for rescheduling (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/17] drm/i915/execlists: Track begin/end of execlists submission sequences   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/18] drm/i915/selftests: Avoid repeatedly harming the same innocent context   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/36] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/debugfs: Print sink PSR status   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Remove variable length arrays from sseu debugfs printers   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Specify which engines to reset following semaphore/event lockups   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Stop engines around GPU reset preparations   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/execlists: Reset ring registers on rebinding contexts (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm: Make sure at least one plane supports the fb format   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915: Stop engines around GPU reset preparations   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/6] Revert "drm: Use a flexible array member for blob property data" (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/6] Revert "drm: Use a flexible array member for blob property data" (rev4)   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/2] drm/i915/guc: enable guc interrupts unconditionally in uc_resume   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/2] drm/i915/guc: Fix null pointer dereference when GuC FW is not available   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/4] drm/i915/guc: Tidy guc_log_control   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/4] drm/i915/guc: Tidy guc_log_control   Michał Winiarski
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/4] drm/i915/guc: Tidy guc_log_control   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Joonas Lahtinen
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Michal Wajdeczko
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Joonas Lahtinen
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset   Joonas Lahtinen
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,01/15] drm/i915/guc: Tidy guc_log_control   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/1] drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symmetric   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915/huc: Mark firmware as failed on auth failure   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915/uc: Introduce intel_uc_suspend|resume   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm/i915/error: remove unused gen8_engine_sync_index   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm: Add the optional .fb_modifier() hook (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm: Add the optional .fb_modifier() hook (rev2)   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm: Make sure at least one plane supports the fb format (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,01/13] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,01/13] drm/i915/guc: Keep GuC interrupts enabled when using GuC   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/3] drm/i915: Reorder early initialization   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/4] drm: Add drm_any_plane_has_format()   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/4] drm: Add drm_any_plane_has_format()   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v4,1/3] drm/i915: Reorder early initialization   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v4,1/7] drm/i915: Correctly handle error path in i915_gem_init_hw   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v5,1/8] drm/i915: Correctly handle error path in i915_gem_init_hw   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v5,1/8] drm/i915: Correctly handle error path in i915_gem_init_hw   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: failure for tests/gem_eio: use lib to force a gpu reset   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: failure for trace: Default to using trace_global_clock if sched_clock is unstable (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for CNL port refactoring (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for CNL port refactoring (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for Documentation patch for batchbuffer submission (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/cnl: Add Wa_2201832410   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates array   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/execlists: Avoid kicking the submission too early for rescheduling (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/guc: Handle GuC log flush event in dedicated function   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/guc: Removed unused GuC parameters. (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/icl: do not save DDI A/E sharing bit for ICL   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/perf: enable perf support on ICL (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/pm: Warn if rpm frequencies are not set   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Add an option to disable SAGV   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Check rq->timeline before deference   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Configure GPU PM in ->suspend() if not configured   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Disable some extra clang warnings (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Don't initialize plane_to_crtc_mapping[] on SKL+   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: don't leak the pin_map on error (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Don't spew errors when resetting HDMI scrambling/bit clock ratio fails (rev4)   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Kick the rps worker when changing the boost frequency (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: make edp optimize config   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Move CUR_SURFLIFE definition to a better place. (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Promote .format_mod_supported() to the lead role   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Promote .format_mod_supported() to the lead role   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Protect PIPE_CONF_CHECK macros with do {} while(0)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Skip logging impossible slices   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for igt/gem_ctx_switch: Measure qlen for timing loops   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for meson: Chamelium depends on GSL   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [01/10] drm/i915: Disable preemption and sleeping while using the punit sideband   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915/selftests: Include the trace as a debug aide   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Stop kicking the signaling thread on seqno wraparound   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Stop kicking the signaling thread on seqno wraparound   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Use full serialisation around engine->irq_posted   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/3] drm/i915/error: remove unused gen8_engine_sync_index   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/3] drm/i915: Trim error mask to known engines   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/6] drm: Reject replacing property enum values   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/6] drm: Reject replacing property enum values   Ville Syrjälä
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [CI,1/2] drm/i915/icl: Prepare for more rings   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [CI,1/3] drm/i915: Suspend submission tasklets around wedging   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [v2,1/3] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [v3,1/3] drm/i915/guc: Unify naming of private GuC action functions   Patchwork
• [Intel-gfx] ✗ Fi.CI.IGT: warning for Test the plane formats on the Chamelium   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add Plane Color Properties (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add support for GuC-based SLPC (rev12)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Aspect ratio support in DRM layer   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Support for Guc responses and requests (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Support for Guc responses and requests (rev3)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Support for Guc responses and requests (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Support for Guc responses and requests (rev5)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/perf: optimize perf stream usage on Gen7.5   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pmu: avoid -Wmaybe-uninitialized warning   Arnd Bergmann
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pmu: avoid -Wmaybe-uninitialized warning (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pmu: avoid -Wmaybe-uninitialized warning (rev2)   Tvrtko Ursulin
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pmu: avoid -Wmaybe-uninitialized warning (rev2)   Chris Wilson
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pmu: Work around compiler warnings on some kernel configs   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Disable some extra clang warnings (rev2)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: expose RCS topology to userspace   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Interface to get GFX shmem usage stats per process   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DRM/i915 cgroup integration   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: Use srcu to protect drm_device.unplugged   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for PSR interrupts   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/36] drm/i915/stolen: Switch from DEBUG_KMS to DEBUG_DRIVER   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Remove variable length arrays from sseu debugfs printers   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm: Don't create properties without names   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/3] drm/i915: store all mmio bases in intel_engines   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)   Patchwork
• [Intel-gfx] ✗ Fi.CI.SPARSE: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)   Patchwork