[Intel-gfx] [PATCH] drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating

[Rodrigo Vivi]

On Tue, Mar 06, 2018 at 11:56:35AM -0800, Radhakrishna Sripada wrote:
> On Mon, Mar 05, 2018 at 05:28:12PM -0800, Rodrigo Vivi wrote:
> > No functional change since WA is already applied.
> > But since it has different names on different databases,
> > let's document it here to avoid future confusion.
> > 
> > Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>

thanks, pushed.

> 
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index c0253e42a280..b8da4dcdd584 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -8492,7 +8492,7 @@ static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
> >  	if (!HAS_PCH_CNP(dev_priv))
> >  		return;
> >  
> > -	/* Display WA #1181: cnp */
> > +	/* Display WA #1181 WaSouthDisplayDisablePWMCGEGating: cnp */
> >  	I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) |
> >  		   CNP_PWM_CGE_GATING_DISABLE);
> >  }
> > -- 
> > 2.13.6
> >