[Intel-gfx] [PATCH igt] igt: Add gem_ctx_freq to exercise requesting freq on a ctx

Chris Wilson chris at chris-wilson.co.uk
Wed Mar 7 22:49:28 UTC 2018


Exercise some new API that allows applications to request that
individual contexts are executed within a desired frequency range.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 tests/Makefile.am      |   2 +-
 tests/Makefile.sources |   1 +
 tests/gem_ctx_freq.c   | 190 +++++++++++++++++++++++++++++++++++++++++++++++++
 tests/meson.build      |   1 +
 4 files changed, 193 insertions(+), 1 deletion(-)
 create mode 100644 tests/gem_ctx_freq.c

diff --git a/tests/Makefile.am b/tests/Makefile.am
index edd689a4..f42641f6 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -104,6 +104,7 @@ drm_import_export_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 drm_import_export_LDADD = $(LDADD) -lpthread
 gem_close_race_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 gem_close_race_LDADD = $(LDADD) -lpthread
+gem_ctx_freq_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
 gem_ctx_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 gem_ctx_thrash_LDADD = $(LDADD) -lpthread
 gem_exec_parallel_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
@@ -128,7 +129,6 @@ prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 prime_self_import_LDADD = $(LDADD) -lpthread
 gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 gem_userptr_blits_LDADD = $(LDADD) -lpthread
-perf_pmu_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
 
 gem_wait_LDADD = $(LDADD) -lrt
 kms_flip_LDADD = $(LDADD) -lrt -lpthread
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 05cdc1ef..06e729ef 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -59,6 +59,7 @@ TESTS_progs = \
 	gem_ctx_bad_exec \
 	gem_ctx_create \
 	gem_ctx_exec \
+	gem_ctx_freq \
 	gem_ctx_isolation \
 	gem_ctx_param \
 	gem_ctx_shared \
diff --git a/tests/gem_ctx_freq.c b/tests/gem_ctx_freq.c
new file mode 100644
index 00000000..a01ce01b
--- /dev/null
+++ b/tests/gem_ctx_freq.c
@@ -0,0 +1,190 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include <time.h>
+
+#include "igt.h"
+#include "igt_perf.h"
+
+#define LOCAL_CONTEXT_PARAM_FREQUENCY 8
+
+static void set_freq(int fd, uint32_t ctx, uint32_t min, uint32_t max)
+{
+	struct drm_i915_gem_context_param param = {
+		.ctx_id = ctx,
+		.param = LOCAL_CONTEXT_PARAM_FREQUENCY,
+		.value = (uint64_t)max << 32 | min,
+	};
+
+	gem_context_set_param(fd, &param);
+}
+
+static void get_freq(int fd, uint32_t ctx, uint32_t *min, uint32_t *max)
+{
+	struct drm_i915_gem_context_param param = {
+		.ctx_id = ctx,
+		.param = LOCAL_CONTEXT_PARAM_FREQUENCY,
+	};
+
+	gem_context_get_param(fd, &param);
+
+	*min = param.value & 0xffffffff;
+	*max = param.value >> 32;
+}
+
+static double measure_frequency(int pmu, int delay)
+{
+	uint64_t data[2];
+	uint64_t d_t, d_v;
+
+	igt_assert_eq(read(pmu, data, sizeof(data)), sizeof(data));
+	d_v = -data[0];
+	d_t = -data[1];
+
+	usleep(delay);
+
+	igt_assert_eq(read(pmu, data, sizeof(data)), sizeof(data));
+	d_v += data[0];
+	d_t += data[1];
+
+	return d_v * 1e9 / d_t;
+}
+
+static void single(int fd, const struct intel_execution_engine *e)
+{
+	const unsigned int engine = e->exec_id | e->flags;
+	uint32_t ctx = gem_context_create(fd);
+	uint32_t min, max;
+	double measured;
+	igt_spin_t *spin;
+	int pmu;
+
+	get_freq(fd, ctx, &min, &max);
+	igt_info("Min freq: %dMHz; Max freq: %dMHz\n", min, max);
+
+	pmu = perf_i915_open(I915_PMU_REQUESTED_FREQUENCY);
+	igt_require(pmu >= 0);
+
+	gem_quiescent_gpu(fd);
+	measured = measure_frequency(pmu, 10000);
+	igt_info("Initial (idle) freq: %.1fMHz\n",measured);
+	igt_require(measured >= min - 50 && measured <= min + 50);
+
+	for (uint32_t freq = min + 50; freq <= max; freq += 100) {
+		set_freq(fd, ctx, freq, freq);
+
+		gem_quiescent_gpu(fd);
+		spin = __igt_spin_batch_new(fd, ctx, engine, 0);
+		usleep(10000);
+
+		measured = measure_frequency(pmu, 50000);
+		igt_debugfs_dump(fd, "i915_rps_boost_info");
+
+		igt_spin_batch_free(fd, spin);
+		igt_info("%s(single): Measured %.1fMHz, expected %dMhz\n",
+			 e->name, measured, freq);
+		igt_assert(measured > freq - 100 && measured < freq + 100);
+	}
+	gem_quiescent_gpu(fd);
+
+	spin = __igt_spin_batch_new(fd, ctx, engine, 0);
+	for (uint32_t freq = min + 50; freq <= max; freq += 100) {
+		igt_spin_t *kick;
+
+		set_freq(fd, ctx, freq, freq);
+
+		/*
+		 * When requesting a new frequency on the currently
+		 * executing context, it does not take effect until the
+		 * next context switch. In this case, we trigger a lite
+		 * restore.
+		 */
+		kick = __igt_spin_batch_new(fd, ctx, engine, 0);
+		igt_spin_batch_free(fd, spin);
+		spin = kick;
+
+		usleep(10000);
+
+		measured = measure_frequency(pmu, 50000);
+		igt_debugfs_dump(fd, "i915_rps_boost_info");
+
+		igt_info("%s(continuous): Measured %.1fMHz, expected %dMhz\n",
+			 e->name, measured, freq);
+		igt_assert(measured > freq - 100 && measured < freq + 100);
+	}
+	igt_spin_batch_free(fd, spin);
+
+	gem_quiescent_gpu(fd);
+	measured = measure_frequency(pmu, 10000);
+	igt_info("Final (idle) freq: %.1fMHz\n", measured);
+	igt_assert(measured >= min - 50 && measured <= min + 50);
+
+	close(pmu);
+	gem_context_destroy(fd, ctx);
+}
+
+static bool has_ctx_freq(int fd)
+{
+	struct drm_i915_gem_context_param param = {
+		.param = LOCAL_CONTEXT_PARAM_FREQUENCY,
+	};
+
+	return __gem_context_get_param(fd, &param) == 0;
+}
+
+igt_main
+{
+	const struct intel_execution_engine *e;
+	int fd = -1;
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_INTEL);
+		igt_require_gem(fd);
+
+		igt_require(has_ctx_freq(fd));
+	}
+
+	igt_skip_on_simulation();
+
+	for (e = intel_execution_engines; e->name; e++) {
+		if (e->exec_id == 0)
+			continue;
+
+		igt_subtest_f("%s%s", e->exec_id == 0 ? "basic-" : "", e->name) {
+			igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
+			single(fd, e);
+		}
+	}
+}
diff --git a/tests/meson.build b/tests/meson.build
index 58729231..f1271274 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -35,6 +35,7 @@ test_progs = [
 	'gem_ctx_bad_exec',
 	'gem_ctx_create',
 	'gem_ctx_exec',
+	'gem_ctx_freq',
 	'gem_ctx_param',
 	'gem_ctx_switch',
 	'gem_ctx_thrash',
-- 
2.16.2



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