[Intel-gfx] [PATCH v2 1/3] drm/i915: store all mmio bases in intel_engines
Chris Wilson
chris at chris-wilson.co.uk
Fri Mar 9 00:35:36 UTC 2018
Quoting Daniele Ceraolo Spurio (2018-03-08 23:46:27)
> The mmio bases we're currently storing in the intel_engines array are
> only valid for a subset of gens, so we need to ignore them and use
> different values in some cases. Instead of doing that, we can have a
> table of [starting gen, mmio base] pairs for each engine in
> intel_engines and select the correct one based on the gen we're running
> on in a consistent way.
>
> v2: document that the list goes in reverse order, update starting gen
> for render (Chris)
>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> ---
> +static u32 __engine_mmio_base(struct drm_i915_private *i915,
> + const struct engine_mmio_base* bases)
> +{
> + int i;
> +
> + for (i = 0; i < MAX_MMIO_BASES; i++)
> + if (INTEL_GEN(i915) >= bases[i].gen)
> + break;
> +
> + GEM_BUG_ON(i == MAX_MMIO_BASES);
> + GEM_BUG_ON(!bases[i].base);
Idly contemplating
do {
if (INTEL_GEN(i915) >= bases->gen)
return bases->base;
bases++;
} while(1);
given the selftest for validating adding new gen.
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris
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