[Intel-gfx] [PATCH v3 0/2] CNL port refactoring

Rodrigo Vivi rodrigo.vivi at intel.com
Wed Mar 14 21:38:32 UTC 2018


On Wed, Mar 14, 2018 at 01:36:51PM +0530, Mahesh Kumar wrote:
> This series fixes CNL PORT_TX_DW5/7_LNO_D register address.
> This series also introduces macros to get register address of
> CNL_PORT_TX registers instead of defining for each DW instance.
> 
> changes since V1:
>  completely kill _MMIO_PORT6 macro
> changes since V2:
>  use underscore prefix in macro
>  merge patch 1 and 2
> changes since V3:
>  Address review comments

pushed to dinq. Thanks for that.

> 
> Mahesh Kumar (2):
>   drm/i915/cnl; Add macro to get PORT_TX register
>   drm/i915/cnl: Kill _MMIO_PORT6 macro
> 
>  drivers/gpu/drm/i915/i915_reg.h | 147 ++++++++++++----------------------------
>  1 file changed, 44 insertions(+), 103 deletions(-)
> 
> -- 
> 2.14.1
> 
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