[Intel-gfx] [PATCH v2] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams

Sagar Arun Kamble sagar.a.kamble at intel.com
Thu Mar 15 06:54:12 UTC 2018


Are we required to add reference to intel_guc.c and intel_wopcm.c in 
Documentation/gpu/i915.rst?


On 3/15/2018 12:14 AM, Jackie Li wrote:
> GuC Address Space and WOPCM Layout diagrams won't be generated correctly by
> sphinx build if not using proper reST syntax.
>
> This patch uses reST literal blocks to make sure GuC Address Space and
> WOPCM Layout diagrams to be generated correctly, and it also corrects some
> errors in the diagram description.
>
> v2:
>   - Fixed errors in diagram description
>
> Signed-off-by: Jackie Li <yaodong.li at intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_guc.c   | 52 ++++++++++++++++++++------------------
>   drivers/gpu/drm/i915/intel_wopcm.c | 44 +++++++++++++++++---------------
>   2 files changed, 50 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index 3eb516e..6a4f36e 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -495,35 +495,37 @@ int intel_guc_resume(struct intel_guc *guc)
>   /**
>    * DOC: GuC Address Space
>    *
> - * The layout of GuC address space is shown as below:
> + * The layout of GuC address space is shown below:
>    *
> - *    +==============> +====================+ <== GUC_GGTT_TOP
> - *    ^                |                    |
> - *    |                |                    |
> - *    |                |        DRAM        |
> - *    |                |       Memory       |
> - *    |                |                    |
> - *   GuC               |                    |
> - * Address  +========> +====================+ <== WOPCM Top
> - *  Space   ^          |   HW contexts RSVD |
> - *    |     |          |        WOPCM       |
> - *    |     |     +==> +--------------------+ <== GuC WOPCM Top
> - *    |    GuC    ^    |                    |
> - *    |    GGTT   |    |                    |
> - *    |    Pin   GuC   |        GuC         |
> - *    |    Bias WOPCM  |       WOPCM        |
> - *    |     |    Size  |                    |
> - *    |     |     |    |                    |
> - *    v     v     v    |                    |
> - *    +=====+=====+==> +====================+ <== GuC WOPCM Base
> - *                     |   Non-GuC WOPCM    |
> - *                     |   (HuC/Reserved)   |
> - *                     +====================+ <== WOPCM Base
> + * ::
> + *
> + *     +==============> +====================+ <== GUC_GGTT_TOP
> + *     ^                |                    |
> + *     |                |                    |
> + *     |                |        DRAM        |
> + *     |                |       Memory       |
> + *     |                |                    |
> + *    GuC               |                    |
> + *  Address  +========> +====================+ <== WOPCM Top
> + *   Space   ^          |   HW contexts RSVD |
> + *     |     |          |        WOPCM       |
> + *     |     |     +==> +--------------------+ <== GuC WOPCM Top
> + *     |    GuC    ^    |                    |
> + *     |    GGTT   |    |                    |
> + *     |    Pin   GuC   |        GuC         |
> + *     |    Bias WOPCM  |       WOPCM        |
> + *     |     |    Size  |                    |
> + *     |     |     |    |                    |
> + *     v     v     v    |                    |
> + *     +=====+=====+==> +====================+ <== GuC WOPCM Base
> + *                      |   Non-GuC WOPCM    |
> + *                      |   (HuC/Reserved)   |
> + *                      +====================+ <== WOPCM Base
>    *
>    * The lower part [0, GuC ggtt_pin_bias) is mapped to WOPCM which consists of
>    * GuC WOPCM and WOPCM reserved for other usage (e.g.RC6 context). The value of
> - * the GuC ggtt_pin_bias is determined by the actually GuC WOPCM size which is
> - * set in GUC_WOPCM_SIZE register.
> + * the GuC ggtt_pin_bias is determined by the GuC WOPCM size which is set in
> + * GUC_WOPCM_SIZE register.
>    */
>   
>   /**
> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
> index 4117886..74bf76f 100644
> --- a/drivers/gpu/drm/i915/intel_wopcm.c
> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
> @@ -11,28 +11,30 @@
>    * DOC: WOPCM Layout
>    *
>    * The layout of the WOPCM will be fixed after writing to GuC WOPCM size and
> - * offset registers whose are calculated are determined by size of HuC/GuC
> - * firmware size and set of hw requirements/restrictions as shown below:
> + * offset registers whose values are calculated and determined by HuC/GuC
> + * firmware size and set of hardware requirements/restrictions as shown below:
>    *
> - *   +=========> +====================+ <== WOPCM Top
> - *   ^           |  HW contexts RSVD  |
> - *   |     +===> +====================+ <== GuC WOPCM Top
> - *   |     ^     |                    |
> - *   |     |     |                    |
> - *   |     |     |                    |
> - *   |    GuC    |                    |
> - *   |   WOPCM   |                    |
> - *   |    Size   +--------------------+
> - * WOPCM   |     |    GuC FW RSVD     |
> - *   |     |     +--------------------+
> - *   |     |     |   GuC Stack RSVD   |
> - *   |     |     +------------------- +
> - *   |     v     |   GuC WOPCM RSVD   |
> - *   |     +===> +====================+ <== GuC WOPCM base
> - *   |           |     WOPCM RSVD     |
> - *   |           +------------------- + <== HuC Firmware Top
> - *   v           |      HuC FW        |
> - *   +=========> +====================+ <== WOPCM Base
> + * ::
> + *
> + *    +=========> +====================+ <== WOPCM Top
> + *    ^           |  HW contexts RSVD  |
> + *    |     +===> +====================+ <== GuC WOPCM Top
> + *    |     ^     |                    |
> + *    |     |     |                    |
> + *    |     |     |                    |
> + *    |    GuC    |                    |
> + *    |   WOPCM   |                    |
> + *    |    Size   +--------------------+
> + *  WOPCM   |     |    GuC FW RSVD     |
> + *    |     |     +--------------------+
> + *    |     |     |   GuC Stack RSVD   |
> + *    |     |     +------------------- +
> + *    |     v     |   GuC WOPCM RSVD   |
> + *    |     +===> +====================+ <== GuC WOPCM base
> + *    |           |     WOPCM RSVD     |
> + *    |           +------------------- + <== HuC Firmware Top
> + *    v           |      HuC FW        |
> + *    +=========> +====================+ <== WOPCM Base
>    *
>    * GuC accessible WOPCM starts at GuC WOPCM base and ends at GuC WOPCM top.
>    * The top part of the WOPCM is reserved for hardware contexts (e.g. RC6

-- 
Thanks,
Sagar



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