[Intel-gfx] [PATCH] drm/i915: Show dmc debug registers on CFL and GLK

[David Weinehall]

Since Coffee Lake uses the Kaby Lake DMC it's a safe
bet that the debug registers are the same. I haven't
double-checked that the GLK DMC uses the same registers
as BXT, but it seems as good of a guess as any.

Signed-off-by: David Weinehall <david.weinehall at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index c4cc8fef11a0..dad0776d58b4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
 	seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
 		   CSR_VERSION_MINOR(csr->version));
 
-	if (IS_KABYLAKE(dev_priv) ||
+	if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
 	    (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
 		seq_printf(m, "DC3 -> DC5 count: %d\n",
 			   I915_READ(SKL_CSR_DC3_DC5_COUNT));
 		seq_printf(m, "DC5 -> DC6 count: %d\n",
 			   I915_READ(SKL_CSR_DC5_DC6_COUNT));
-	} else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
+	} else if (IS_GEMINILAKE(dev_priv) ||
+	           IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
 		seq_printf(m, "DC3 -> DC5 count: %d\n",
 			   I915_READ(BXT_CSR_DC3_DC5_COUNT));
 	}
-- 
2.16.2