[Intel-gfx] [PATCH libdrm 4/5] intel: get a cached buffer by size for reuse

[James Xiong]

From: "Xiong, James" <james.xiong at intel.com>

Previously all cached buffers in a given bucket were same sized,
when reusing, the MRU buffer at the tail was poped out. With the
new implementation, we go through the buffer list in a reverse
order to search for a MRU buffer with a suitable size.

Signed-off-by: Xiong, James <james.xiong at intel.com>
---
 intel/intel_bufmgr_gem.c | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index f8317a4..e3d5a8d 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -723,10 +723,14 @@ retry:
 			 * of the list, as it will likely be hot in the GPU
 			 * cache and in the aperture for us.
 			 */
-			bo_gem = DRMLISTENTRY(drm_intel_bo_gem,
-					      bucket->head.prev, head);
-			DRMLISTDEL(&bo_gem->head);
-			bo_gem->bo.align = alignment;
+			DRMLISTFOREACHENTRYREVERSE(temp_bo_gem, &bucket->head, head) {
+				if (temp_bo_gem->bo.size >= size) {
+					bo_gem = temp_bo_gem;
+					DRMLISTDEL(&bo_gem->head);
+					bo_gem->bo.align = alignment;
+					break;
+				}
+			}
 		} else {
 			assert(alignment == 0);
                         /* For non-render-target BOs (where we're probably
@@ -736,12 +740,13 @@ retry:
 			 * allocating a new buffer is probably faster than
 			 * waiting for the GPU to finish.
 			 */
-			bo_gem = DRMLISTENTRY(drm_intel_bo_gem,
-					      bucket->head.next, head);
-			if (!drm_intel_gem_bo_busy(&bo_gem->bo)) {
-				DRMLISTDEL(&bo_gem->head);
-			} else {
-				bo_gem = NULL;
+			DRMLISTFOREACHENTRY(temp_bo_gem, &bucket->head, head) {
+				if (temp_bo_gem->bo.size >= size &&
+				    !drm_intel_gem_bo_busy(&temp_bo_gem->bo)) {
+					bo_gem = temp_bo_gem;
+					DRMLISTDEL(&bo_gem->head);
+					break;
+				}
 			}
 		}
 
-- 
2.7.4