[Intel-gfx] [igt-dev] [PATCH igt 2/3] igt/gem_exec_fence: Exercise merging fences
Antonio Argenziano
antonio.argenziano at intel.com
Fri Mar 16 22:21:44 UTC 2018
On 16/03/18 15:14, Chris Wilson wrote:
> Quoting Antonio Argenziano (2018-03-16 22:11:11)
>>
>>
>> On 13/03/18 05:31, Chris Wilson wrote:
>>> Execute the same batch on each engine and check that the composite fence
>>> across all engines completes only after the batch is completed on every
>>> engine.
>>>
>>> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>>> ---
>>> tests/gem_exec_fence.c | 127 +++++++++++++++++++++++++++++++++++++++++++++++++
>>> 1 file changed, 127 insertions(+)
>>>
>>> diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
>>> index 26bde788..95fc65e5 100644
>>> --- a/tests/gem_exec_fence.c
>>> +++ b/tests/gem_exec_fence.c
>>> @@ -208,6 +208,113 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
>>> gem_quiescent_gpu(fd);
>>> }
>>>
>>> +static void test_fence_busy_all(int fd, unsigned flags)
>>> +{
>>> + const int gen = intel_gen(intel_get_drm_devid(fd));
>>> + struct drm_i915_gem_exec_object2 obj;
>>> + struct drm_i915_gem_relocation_entry reloc;
>>> + struct drm_i915_gem_execbuffer2 execbuf;
>>> + struct timespec tv;
>>> + uint32_t *batch;
>>> + unsigned int engine;
>>> + int all, i, timeout;
>>> +
>>> + gem_quiescent_gpu(fd);
>>> +
>>> + memset(&execbuf, 0, sizeof(execbuf));
>>> + execbuf.buffers_ptr = to_user_pointer(&obj);
>>> + execbuf.buffer_count = 1;
>>> +
>>> + memset(&obj, 0, sizeof(obj));
>>> + obj.handle = gem_create(fd, 4096);
>>> +
>>> + obj.relocs_ptr = to_user_pointer(&reloc);
>>> + obj.relocation_count = 1;
>>> + memset(&reloc, 0, sizeof(reloc));
>>> +
>>> + batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
>>> + gem_set_domain(fd, obj.handle,
>>> + I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
>>> +
>>> + reloc.target_handle = obj.handle; /* recurse */
>>> + reloc.presumed_offset = 0;
>>> + reloc.offset = sizeof(uint32_t);
>>> + reloc.delta = 0;
>>> + reloc.read_domains = I915_GEM_DOMAIN_COMMAND;
>>> + reloc.write_domain = 0;
>>> +
>>> + i = 0;
>>> + batch[i] = MI_BATCH_BUFFER_START;
>>> + if (gen >= 8) {
>>> + batch[i] |= 1 << 8 | 1;
>>> + batch[++i] = 0;
>>> + batch[++i] = 0;
>>> + } else if (gen >= 6) {
>>> + batch[i] |= 1 << 8;
>>> + batch[++i] = 0;
>>> + } else {
>>> + batch[i] |= 2 << 6;
>>> + batch[++i] = 0;
>>> + if (gen < 4) {
>>> + batch[i] |= 1;
>>> + reloc.delta = 1;
>>> + }
>>> + }
>>> + i++;
>>> +
>>> + all = -1;
>>> + for_each_engine(fd, engine) {
>>
>> for_each_physical_engines to avoid submitting twice to the same engine.
>
> iirc, I thought about that in passing and decided that the ABI exercise
> was the intent here and not the HW exercise.
Makes sense, my RB stands then without the change.
Thanks,
Antonio
> -Chris
>
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