[Intel-gfx] [PATCH] drm/i915: make edp optimize config

[Jani Nikula]

On Fri, 16 Mar 2018, matthew.s.atwood at intel.com wrote:
> From: Matt Atwood <matthew.s.atwood at intel.com>
>
> Previously it was assumed that eDP panels would advertise the lowest link
> rate required for their singular mode to function. With the introduction
> of more advanced features there are advantages to a panel advertising a
> higher rate then it needs for a its given mode. For panels that did, the
> driver previously used a higher rate then necessary for that mode.

Makes me wonder if the check here should be for those features (that
should be mentioned, I guess you mean DSC, perhaps rate select) instead
of the spec version.

Please do send patches that compile, though. Gives you more
credibility. ;)

BR,
Jani.

>
> Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index a2eeede..57b309c 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1766,8 +1766,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  		 * configuration, and typically these values correspond to the
>  		 * native resolution of the panel.
>  		 */
> -		min_lane_count = max_lane_count;
> -		min_clock = max_clock;
> +		if(dpcd[DP_DPCD_REV] < DPCD_REV_14){
> +			min_lane_count = max_lane_count;
> +			min_clock = max_clock;
> +		}
>  	}
>  
>  	for (; bpp >= 6*3; bpp -= 2*3) {

-- 
Jani Nikula, Intel Open Source Technology Center