[Intel-gfx] [PATCH 2/5] drm/i915: Drop reg_write from the PSR mask
Dhinakaran Pandiyan
dhinakaran.pandiyan at intel.com
Tue Mar 20 22:41:48 UTC 2018
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
v2: from DK
* Rebased on drm-tip
* Explananation in commit message.
REG_WRITE is necessary for HW to exit PSR when plane/pipe registers are
written to.
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 27dfd507a4f7..317cb4a12693 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -613,8 +613,7 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
I915_WRITE(EDP_PSR_DEBUG,
EDP_PSR_DEBUG_MASK_MEMUP |
EDP_PSR_DEBUG_MASK_HPD |
- EDP_PSR_DEBUG_MASK_LPSP |
- EDP_PSR_DEBUG_MASK_REG_WRITE);
+ EDP_PSR_DEBUG_MASK_LPSP);
}
}
--
2.14.1
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