[Intel-gfx] [PATCH 2/2] drm/i915: hint gen and gen_mask shouldn't be used directly
Jani Nikula
jani.nikula at intel.com
Wed Mar 21 14:07:55 UTC 2018
Prefix gen and gen_mask in struct intel_device_info with underscores to
hint that they should not be used directly, except in special
circumstances.
Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 5 +++--
drivers/gpu/drm/i915/i915_drv.h | 24 ++++++++++++------------
drivers/gpu/drm/i915/i915_pci.c | 2 +-
drivers/gpu/drm/i915/intel_device_info.h | 6 ++++--
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
5 files changed, 21 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3f637ab89e51..56c367bed573 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -907,7 +907,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
sizeof(device_info->platform_mask) * BITS_PER_BYTE);
- BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
+ BUG_ON(device_info->__gen >
+ sizeof(device_info->__gen_mask) * BITS_PER_BYTE);
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
mutex_init(&dev_priv->backlight_lock);
@@ -1339,7 +1340,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
int ret;
/* Enable nuclear pageflip on ILK+ */
- if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
+ if (!i915_modparams.nuclear_pageflip && match_info->__gen < 5)
driver.driver_features &= ~DRIVER_ATOMIC;
ret = -ENOMEM;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c9c3b2ba6a86..f4a13951916c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2294,7 +2294,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define INTEL_INFO(dev_priv) intel_info((dev_priv))
-#define INTEL_GEN(dev_priv) ((dev_priv)->info.gen)
+#define INTEL_GEN(dev_priv) ((dev_priv)->info.__gen)
#define INTEL_DEVID(dev_priv) ((dev_priv)->info.device_id)
#define REVID_FOREVER 0xff
@@ -2315,7 +2315,7 @@ intel_info(const struct drm_i915_private *dev_priv)
* Use GEN_FOREVER for unbound start and or end.
*/
#define IS_GEN(dev_priv, s, e) \
- (!!((dev_priv)->info.gen_mask & INTEL_GEN_MASK((s), (e))))
+ (!!((dev_priv)->info.__gen_mask & INTEL_GEN_MASK((s), (e))))
/*
* Return true if revision is in range [since,until] inclusive.
@@ -2463,16 +2463,16 @@ intel_info(const struct drm_i915_private *dev_priv)
* have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular
* chips, etc.).
*/
-#define IS_GEN2(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(1)))
-#define IS_GEN3(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(2)))
-#define IS_GEN4(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(3)))
-#define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4)))
-#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5)))
-#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
-#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
-#define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8)))
-#define IS_GEN10(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(9)))
-#define IS_GEN11(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(10)))
+#define IS_GEN2(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(1)))
+#define IS_GEN3(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(2)))
+#define IS_GEN4(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(3)))
+#define IS_GEN5(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(4)))
+#define IS_GEN6(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(5)))
+#define IS_GEN7(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(6)))
+#define IS_GEN8(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(7)))
+#define IS_GEN9(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(8)))
+#define IS_GEN10(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(9)))
+#define IS_GEN11(dev_priv) (!!((dev_priv)->info.__gen_mask & BIT(10)))
#define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
#define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4364922e935d..e6ea0ed6f1bd 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -30,7 +30,7 @@
#include "i915_selftest.h"
#define PLATFORM(x) .platform = (x), .platform_mask = BIT(x)
-#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
+#define GEN(x) .__gen = (x), .__gen_mask = BIT((x) - 1)
#define GEN_DEFAULT_PIPEOFFSETS \
.pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 933e31669557..f488118c2eef 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -144,9 +144,11 @@ typedef u8 intel_ring_mask_t;
struct intel_device_info {
u16 device_id;
- u16 gen_mask;
- u8 gen;
+ /* Prefer INTEL_GEN() and IS_GENx() over accessing these. */
+ u16 __gen_mask;
+ u8 __gen;
+
u8 gt; /* GT number, 0 if undefined */
u8 num_rings;
intel_ring_mask_t ring_mask; /* Rings supported by the HW */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 4c616d074a97..08c9648a1e9b 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1664,7 +1664,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
GEM_BUG_ON(entry->size > 8);
GEM_BUG_ON(entry_offset & (entry->size - 1));
- if (INTEL_INFO(dev_priv)->gen_mask & entry->gen_mask &&
+ if (INTEL_INFO(dev_priv)->__gen_mask & entry->gen_mask &&
entry_offset == (reg->offset & -entry->size))
break;
entry++;
--
2.11.0
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