[Intel-gfx] [PATCH 02/12] drm: Add DP last received PSR SDP VSC register and bits

[Souza, Jose]

On Thu, 2018-03-22 at 16:23 -0700, Rodrigo Vivi wrote:
> On Thu, Mar 22, 2018 at 02:48:38PM -0700, José Roberto de Souza
> wrote:
> > This is a register to help debug what is in the last SDP VSC
> > packet revived by sink.
> > 
> > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> 
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> 
> (just looking to 1.4b one, but the versions on the comments seems
> right)

Thanks, I had sent this 2 ones to dri-devel directly, better give the
Reviewed-by over there? https://patchwork.freedesktop.org/series/40512/

> 
> > ---
> >  include/drm/drm_dp_helper.h | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> > 
> > diff --git a/include/drm/drm_dp_helper.h
> > b/include/drm/drm_dp_helper.h
> > index 0bac0c7d0dec..91c9bcd4196f 100644
> > --- a/include/drm/drm_dp_helper.h
> > +++ b/include/drm/drm_dp_helper.h
> > @@ -795,6 +795,15 @@
> >  # define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_MASK	(0xf
> > << 4)
> >  # define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_SHIFT	4
> >  
> > +#define DP_LAST_RECEIVED_PSR_SDP	    0x200a /* eDP 1.2 */
> > +# define DP_PSR_STATE_BIT		    (1 << 0) /* eDP 1.2
> > */
> > +# define DP_UPDATE_RFB_BIT		    (1 << 1) /* eDP 1.2
> > */
> > +# define DP_CRC_VALID_BIT		    (1 << 2) /* eDP 1.2
> > */
> > +# define DP_SU_VALID			    (1 << 3) /* eDP
> > 1.4 */
> > +# define DP_FIRST_SCAN_LINE_SU_REGION	    (1 << 4) /* eDP
> > 1.4 */
> > +# define DP_LAST_SCAN_LINE_SU_REGION	    (1 << 5) /* eDP
> > 1.4 */
> > +# define DP_Y_COORDINATE_VALID		    (1 << 6) /* eDP
> > 1.4a */
> > +
> >  #define DP_RECEIVER_ALPM_STATUS		    0x200b  /* eDP
> > 1.4 */
> >  # define DP_ALPM_LOCK_TIMEOUT_ERROR	    (1 << 0)
> >  
> > -- 
> > 2.16.2
> > 
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