[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add NV12 support (rev4)

[Srinivas, Vidya]

> -----Original Message-----
> From: Jani Nikula [mailto:jani.nikula at linux.intel.com]
> Sent: Monday, March 26, 2018 7:19 PM
> To: Patchwork <patchwork at emeril.freedesktop.org>; Srinivas, Vidya
> <vidya.srinivas at intel.com>
> Cc: intel-gfx at lists.freedesktop.org
> Subject: Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add NV12 support
> (rev4)
> 
> On Mon, 26 Mar 2018, Patchwork <patchwork at emeril.freedesktop.org>
> wrote:
> > == Series Details ==
> >
> > Series: Add NV12 support (rev4)
> > URL   : https://patchwork.freedesktop.org/series/39670/
> > State : warning
> >
> > == Summary ==
> >
> > $ dim checkpatch origin/drm-tip
> > 0503b1db737a drm/i915/skl+: rename skl_wm_values struct to
> > skl_ddb_values
> > de530aafc1d7 drm/i915/skl+: refactor WM calculation for NV12
> > 7ca6efaada2b drm/i915/skl+: add NV12 in skl_format_to_fourcc
> > 4863044b11a5 drm/i915/skl+: support verification of DDB HW state for
> > NV12 4c4d4f07274c drm/i915/skl+: NV12 related changes for WM
> > 1995882fa722 drm/i915/skl+: pass skl_wm_level struct to wm compute
> > func
> > 7a53eb021631 drm/i915/skl+: make sure higher latency level has higher
> > wm value
> > b756f5e1b974 drm/i915/skl+: nv12 workaround disable WM level 1-7
> > 2f6264f9349f drm/i915/skl: split skl_compute_ddb function
> > -:137: CHECK:SPACING: spaces preferred around that '*' (ctx:ExV)
> > #137: FILE: drivers/gpu/drm/i915/intel_pm.c:5160:
> > +		*changed = true;
> >  		^
> 
> Checkpatch being clueless.
> 
> >
> > total: 0 errors, 0 warnings, 1 checks, 194 lines checked d87f6cf26fea
> > drm/i915: Set scaler mode for NV12 ccc7a37f5e0a drm/i915: Update
> > format_is_yuv() to include NV12
> > 17490b4ce656 drm/i915: Upscale scaler max scale for NV12
> > e155048376b9 drm/i915: Add NV12 as supported format for primary plane
> > d7af95f5e1d4 drm/i915: Add NV12 as supported format for sprite plane
> > 483020f92c69 drm/i915: Add NV12 support to intel_framebuffer_init
> > 4ca02e5f9bd0 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
> > a7f9ce556ab2 drm/i915: Display WA 827
> > 545fe6ed4604 drm/i915: Add checks to primary plane
> > -:108: CHECK:SPACING: No space is necessary after a cast
> > #108: FILE: drivers/gpu/drm/i915/intel_display.c:13052:
> > +		WARN_ON(src->x1 < (int) state->base.src_x ||
> >
> > -:109: CHECK:SPACING: No space is necessary after a cast
> > #109: FILE: drivers/gpu/drm/i915/intel_display.c:13053:
> > +			src->y1 < (int) state->base.src_y ||
> >
> > -:110: CHECK:SPACING: No space is necessary after a cast
> > #110: FILE: drivers/gpu/drm/i915/intel_display.c:13054:
> > +			src->x2 > (int) state->base.src_x + state->base.src_w
> ||
> >
> > -:111: CHECK:SPACING: No space is necessary after a cast
> > #111: FILE: drivers/gpu/drm/i915/intel_display.c:13055:
> > +			src->y2 > (int) state->base.src_y + state-
> >base.src_h);
> >
> 
> I don't mind the spaces after a cast; sadly SPACING category is not
> something I'm willing to ignore completely.
> 
> > -:148: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open
> > parenthesis
> > #148: FILE: drivers/gpu/drm/i915/intel_display.c:13092:
> > +		if (INTEL_GEN(dev_priv) < 9 && (src_w > 2048 || src_h >
> 2048 ||
> > +		    width_bytes > 4096 || fb->pitches[0] > 4096)) {
> 
> Pedantically a valid warning, but can be ignored in favor of getting the series
> finally merged.

Thank you. Since this is new patch (sorry, mostly I just copied code from intel_sprite.c)
Still RB is needed on this patch. I will fix these mistakes during the next push.

> 
> BR,
> Jani.
> 
> >
> > total: 0 errors, 0 warnings, 5 checks, 148 lines checked
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Jani Nikula, Intel Open Source Technology Center