[Intel-gfx] [PATCH 0/8] ICL PLLs, DP/HDMI and misc display, v2

Paulo Zanoni paulo.r.zanoni at intel.com
Wed Mar 28 21:57:55 UTC 2018

We already merged some patches from this series, so this new version is smaller.
Some of the patches here already have R-B tags but they depend on non-reviewed

Only patches 2, 3 and 7 need reviews. I don't think I can qualify as a reviewer
for patch 7 anymore due to how much I changed it.


James Ausmus (1):
  drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL

Manasi Navare (2):
  drm/i915/icl: Implement voltage swing programming sequence for Combo
  drm/i915/icl: Fix the DP Max Voltage for ICL

Paulo Zanoni (5):
  drm/i915/icl: add definitions for the ICL PLL registers
  drm/i915/icl: add basic support for the ICL clocks
  drm/i915/icl: compute the combo PHY (DPLL) HDMI registers
  drm/i915/icl: compute the combo PHY (DPLL) DP registers
  drm/i915/icl: compute the MG PLL registers

 drivers/gpu/drm/i915/i915_debugfs.c   |  22 ++
 drivers/gpu/drm/i915/i915_reg.h       | 153 +++++++-
 drivers/gpu/drm/i915/intel_ddi.c      | 297 ++++++++++++++-
 drivers/gpu/drm/i915/intel_display.c  |  24 +-
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 655 +++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/intel_dpll_mgr.h |  41 +++
 drivers/gpu/drm/i915/intel_drv.h      |   6 +
 7 files changed, 1183 insertions(+), 15 deletions(-)


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