[Intel-gfx] [PATCH v12 00/17] Add support for GuC-based SLPC

Fri Mar 30 08:31:45 UTC 2018

SLPC (Single Loop Power Controller) is a replacement for some host-based
power management features. The SLPC implementation runs in GuC firmware.
This series has been tested with SKL/APL/KBL GuC firmware v9 and v10.

The graphics power management features in SLPC are called GTPERF, BALANCER
and DCC.
	1. GTPERF: Combination of DFPS (Dynamic FPS) and Turbo. DFPS
	   adjusts requested graphics frequency to maintain target
	   framerate. Turbo adjusts requested graphics frequency to
	   maintain target GT busyness.
	2. BALANCER: Adjusts balance between power budgets for IA and GT
	   in power limited scenarios.
	3. DCC (Duty Cycle Control): Adjusts requested graphics frequency
	   and stalls guc-scheduler to maintain actual graphics frequency
	   in efficient range.

This series activates GTPERF Turbo and BALANCER in GuC SLPC. In order to
enable CI/PnP testing of SLPC and to avoid frequent rebase, this series
should be safe for merge with GuC in disabled state by default currently.

v2: Addressed review comments on v1. Removed patch to enable SLPC by
    default.

v3: Addressed WARNING in igt at drv_module_reload_basic flagged by trybot.
    Added change for sanitizing GT PM during reset. Added separate patch
    for sysfs interface to know HW requested frequency.

v4: Changes to multiple patches. CI BAT is passing. Performance run on SKL
    GT2 done and shows perf at parity with Host Turbo. For BXT, SLPC
    improves performance when GuC is enabled compared to Host Turbo.
    This series keeps only support of 9.18 firmware for readability.
    If needed, other SLPC interfaces for different GuC version will be
    added later.

v5: This series incorporates feedback from code reviews on earlier series
    and adds following new changes:
	1. More changes for separation of RPS and RC6 handling for Gen9.
	2. Tied up SLPC enabling with GuC load/GuC submission sequence.
	3. SLPC structures are defined explicitly for event input/output.
	4. Definition of SLPC parameter control and task control functions
	   agnostic to the underlying param definitions as they might
	   change with GuC versions and prepared helpers for common tasks.
	5. Transition of i915 overrides done through host to guc events
	   to shared data and single reset event.
	6. Handling SLPC status post reset through shared memory.
	7. Derived helpers for setting frequency limits.
	8. Removed sysfs interface to know RPNSWREQ as it is available in
	   debugfs interface i915_frequency_info.
	9. Simple igt test to verify SLPC configuration by i915 in various
	   driver scenarios is prepared.

v6: This series adds following new changes:
	1. Updated intel_guc_send for SLPC to receive output data from GuC.
	2. Added task overrides and min frequency overrides in slpc_init.
	   min frequency is set to Rpe.
	3. New debugfs interface added to set/unset/read SLPC parameters
	   other than tasks and frequencies. SLPC reset post parameter
	   update added.
	4. SLPC parameters persist as part of i915-GuC shared data hence
	   not overriding frequency limits while re-enabling SLPC.
	5. Other minor fixes to clear pm_rps_events, clflush the shared
	   data.

v7: This series adds following new changes:
	1. Reordered patches. SLPC communication interfaces (structures
	   and functions) are pulled into patches earlier in the series.
	2. Eliminated dependency on i915.enable_slpc at various functions
	   where rps_enabled is available.
	3. s/i915_ggtt_offset/guc_ggtt_offset and sanitization of params
	   in intel_uc_sanitize_options.

v8: Activated Balancer. Changed prototype of SLPC functions to accept
    struct intel_slpc as parameter instead of drm_i915_private.

v9: Separated RPS, RC6 and Ring frequency configuration for gen6+.
    Added TDR specific handling of SLPC reset. Some more improvements for
    support of function pointers for rps busy, idle, boost functions.
    This series is based on GuC code restructuring and fixes series at
    https://patchwork.freedesktop.org/series/30351/.

v10-11: Rebase.

v12: 1. Rebase. Changed SLPC H2G w.r.t new CTB changes.
     2. Removed has_slpc, enable_guc_slpc modparam, GuC version sanitize
	and platform specific SLPC enabling patches as handling is
	changed. 

VIZ-6889, VIZ-6890

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Beuchat Marc <marc.beuchat at intel.com>
Cc: Wang Zhe1 <zhe1.wang at intel.com>
Cc: Sun Daisy <daisy.sun at intel.com>
Cc: Oscar Mateo <oscar.mateo at intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg at intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Sujaritha Sundaresan <sujaritha.sundaresan at intel.com>
Cc: Jeff McGee <jeff.mcgee at intel.com>
Tested-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg at intel.com>

Sagar Arun Kamble (12):
  drm/i915/guc/slpc: Disable host RPS
  drm/i915/guc/slpc: Lay out SLPC init/enable/disable/fini helpers
  drm/i915/guc/slpc: Add SLPC communication interfaces
  drm/i915/guc/slpc: Allocate/initialize/release SLPC shared data
  drm/i915/guc/slpc: Send RESET event to restart/enable SLPC tasks
  drm/i915/guc/slpc: Reset SLPC on engine reset with flag TDR_OCCURRED
  drm/i915/guc/slpc: Add parameter set/unset/get, task control/status
    functions
  drm/i915/guc/slpc: Add support for sysfs min/max frequency control
  drm/i915/debugfs: Create generic string tokenize function and update
    CRC control parsing
  drm/i915/guc/slpc: Add debugfs support to read/write/revert the
    parameters
  drm/i915/guc/slpc: Add SLPC banner to RPS debugfs interfaces
  HAX: drm/i915/guc: Enable GuC

Tom O'Rourke (5):
  drm/i915/guc/slpc: Add SLPC control to enable_guc modparam
  drm/i915/guc/slpc: Enable SLPC in GuC load control params
  drm/i915/guc/slpc: Send SHUTDOWN event to stop SLPC tasks
  drm/i915/guc/slpc: Add enable/disable controls for SLPC tasks
  drm/i915/guc/slpc: Add i915_guc_slpc_info to debugfs

 drivers/gpu/drm/i915/Makefile              |    1 +
 drivers/gpu/drm/i915/i915_debugfs.c        |  403 +++++++++++
 drivers/gpu/drm/i915/i915_drv.h            |    7 +
 drivers/gpu/drm/i915/i915_irq.c            |   21 +-
 drivers/gpu/drm/i915/i915_params.c         |    5 +-
 drivers/gpu/drm/i915/i915_params.h         |    3 +-
 drivers/gpu/drm/i915/i915_sysfs.c          |   57 +-
 drivers/gpu/drm/i915/intel_guc.c           |    3 +
 drivers/gpu/drm/i915/intel_guc.h           |    2 +
 drivers/gpu/drm/i915/intel_guc_slpc.c      | 1079 ++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_guc_slpc.h      |   54 ++
 drivers/gpu/drm/i915/intel_guc_slpc_fwif.h |  234 ++++++
 drivers/gpu/drm/i915/intel_pipe_crc.c      |   57 +-
 drivers/gpu/drm/i915/intel_pm.c            |   26 +-
 drivers/gpu/drm/i915/intel_uc.c            |   58 +-
 drivers/gpu/drm/i915/intel_uc.h            |    7 +
 16 files changed, 1946 insertions(+), 71 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_guc_slpc.c
 create mode 100644 drivers/gpu/drm/i915/intel_guc_slpc.h
 create mode 100644 drivers/gpu/drm/i915/intel_guc_slpc_fwif.h

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2.7.4