[Intel-gfx] [PATCH 2/4] drm/i915: Introduce struct hpd_irq_regs

Ville Syrjala ville.syrjala at linux.intel.com
Mon Apr 15 15:49:02 UTC 2019


From: Ville Syrjälä <ville.syrjala at linux.intel.com>

Collect the hpd related register values into a struct for
so that it's more convenient to pass them around.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 241 ++++++++++++++++++--------------
 1 file changed, 137 insertions(+), 104 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 6556fe9e5934..b6f7b98b9ddb 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1684,6 +1684,11 @@ static bool i9xx_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
 	}
 }
 
+struct hpd_irq_regs {
+	u32 dig_hotplug_reg;
+	u32 hotplug_trigger;
+};
+
 /*
  * Get a bit mask of pins that have triggered, and which ones may be long.
  * This can be called multiple times with the same masks to accumulate
@@ -1693,14 +1698,16 @@ static bool i9xx_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
  */
 static void intel_get_hpd_pins(struct drm_i915_private *dev_priv,
 			       u32 *pin_mask, u32 *long_mask,
-			       u32 hotplug_trigger, u32 dig_hotplug_reg,
-			       const u32 hpd[HPD_NUM_PINS],
+			       const struct hpd_irq_regs *hpd,
+			       const u32 hpd_pins[HPD_NUM_PINS],
 			       bool long_pulse_detect(enum hpd_pin pin, u32 val))
 {
+	u32 hotplug_trigger = hpd->hotplug_trigger;
+	u32 dig_hotplug_reg = hpd->dig_hotplug_reg;
 	enum hpd_pin pin;
 
 	for_each_hpd_pin(pin) {
-		if ((hpd[pin] & hotplug_trigger) == 0)
+		if ((hpd_pins[pin] & hotplug_trigger) == 0)
 			continue;
 
 		*pin_mask |= BIT(pin);
@@ -2072,12 +2079,14 @@ static void i9xx_hpd_irq_handler(struct drm_i915_private *dev_priv,
 
 	if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) ||
 	    IS_CHERRYVIEW(dev_priv)) {
-		u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
+		struct hpd_irq_regs hpd = {
+			.hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X,
+			.dig_hotplug_reg = hotplug_status & HOTPLUG_INT_STATUS_G4X,
+		};
 
-		if (hotplug_trigger) {
+		if (hpd.hotplug_trigger) {
 			intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
-					   hotplug_trigger, hotplug_trigger,
-					   hpd_status_g4x,
+					   &hpd, hpd_status_g4x,
 					   i9xx_port_hotplug_long_detect);
 
 			intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
@@ -2086,12 +2095,14 @@ static void i9xx_hpd_irq_handler(struct drm_i915_private *dev_priv,
 		if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
 			dp_aux_irq_handler(dev_priv);
 	} else {
-		u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
+		struct hpd_irq_regs hpd = {
+			.hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915,
+			.dig_hotplug_reg = hotplug_status & HOTPLUG_INT_STATUS_I915,
+		};
 
-		if (hotplug_trigger) {
+		if (hpd.hotplug_trigger) {
 			intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
-					   hotplug_trigger, hotplug_trigger,
-					   hpd_status_i915,
+					   &hpd, hpd_status_i915,
 					   i9xx_port_hotplug_long_detect);
 			intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
 		}
@@ -2265,44 +2276,51 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 	return ret;
 }
 
-static void ibx_hpd_irq_handler(struct drm_i915_private *dev_priv,
-				u32 hotplug_trigger,
-				const u32 hpd[HPD_NUM_PINS])
+static void ibx_hpd_irq_ack(struct drm_i915_private *dev_priv,
+			    struct hpd_irq_regs *hpd)
 {
-	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
-
 	/*
 	 * Somehow the PCH doesn't seem to really ack the interrupt to the CPU
 	 * unless we touch the hotplug register, even if hotplug_trigger is
 	 * zero. Not acking leads to "The master control interrupt lied (SDE)!"
 	 * errors.
 	 */
-	dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
-	if (!hotplug_trigger) {
+	hpd->dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
+	if (!hpd->hotplug_trigger) {
 		u32 mask = PORTA_HOTPLUG_STATUS_MASK |
 			PORTD_HOTPLUG_STATUS_MASK |
 			PORTC_HOTPLUG_STATUS_MASK |
 			PORTB_HOTPLUG_STATUS_MASK;
-		dig_hotplug_reg &= ~mask;
+		hpd->dig_hotplug_reg &= ~mask;
 	}
 
-	I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
-	if (!hotplug_trigger)
+	I915_WRITE(PCH_PORT_HOTPLUG, hpd->dig_hotplug_reg);
+}
+
+static void ibx_hpd_irq_handler(struct drm_i915_private *dev_priv,
+				const struct hpd_irq_regs *hpd,
+				const u32 hpd_pins[HPD_NUM_PINS])
+{
+	u32 pin_mask = 0, long_mask = 0;
+
+	if (!hpd->hotplug_trigger)
 		return;
 
-	intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, hotplug_trigger,
-			   dig_hotplug_reg, hpd,
-			   pch_port_hotplug_long_detect);
+	intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
+			   hpd, hpd_pins, pch_port_hotplug_long_detect);
 
 	intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
 }
 
 static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 {
+	struct hpd_irq_regs hpd = {};
 	int pipe;
-	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
 
-	ibx_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ibx);
+	hpd.hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
+
+	ibx_hpd_irq_ack(dev_priv, &hpd);
+	ibx_hpd_irq_handler(dev_priv, &hpd, hpd_ibx);
 
 	if (pch_iir & SDE_AUDIO_POWER_MASK) {
 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK) >>
@@ -2385,10 +2403,13 @@ static void cpt_serr_int_handler(struct drm_i915_private *dev_priv)
 
 static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 {
+	struct hpd_irq_regs hpd = {};
 	int pipe;
-	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
 
-	ibx_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_cpt);
+	hpd.hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
+
+	ibx_hpd_irq_ack(dev_priv, &hpd);
+	ibx_hpd_irq_handler(dev_priv, &hpd, hpd_cpt);
 
 	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
@@ -2421,31 +2442,28 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 
 static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 {
-	u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
-	u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
+	struct hpd_irq_regs ddi = {};
+	struct hpd_irq_regs tc = {};
 	u32 pin_mask = 0, long_mask = 0;
 
-	if (ddi_hotplug_trigger) {
-		u32 dig_hotplug_reg;
+	ddi.hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
+	tc.hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
 
-		dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI);
-		I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg);
+	if (ddi.hotplug_trigger) {
+		ddi.dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI);
+		I915_WRITE(SHOTPLUG_CTL_DDI, ddi.dig_hotplug_reg);
 
 		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
-				   ddi_hotplug_trigger,
-				   dig_hotplug_reg, hpd_icp,
+				   &ddi, hpd_icp,
 				   icp_ddi_port_hotplug_long_detect);
 	}
 
-	if (tc_hotplug_trigger) {
-		u32 dig_hotplug_reg;
-
-		dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC);
-		I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg);
+	if (tc.hotplug_trigger) {
+		tc.dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC);
+		I915_WRITE(SHOTPLUG_CTL_TC, tc.dig_hotplug_reg);
 
 		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
-				   tc_hotplug_trigger,
-				   dig_hotplug_reg, hpd_icp,
+				   &tc, hpd_icp,
 				   icp_tc_port_hotplug_long_detect);
 	}
 
@@ -2458,30 +2476,29 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 
 static void spt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 {
-	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
+	u32 pin_mask = 0, long_mask = 0;
+	struct hpd_irq_regs hpd = {};
+	struct hpd_irq_regs hpd2 = {};
+
+	hpd.hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
 		~SDE_PORTE_HOTPLUG_SPT;
-	u32 hotplug2_trigger = pch_iir & SDE_PORTE_HOTPLUG_SPT;
-	u32 pin_mask = 0, long_mask = 0;
+	hpd2.hotplug_trigger = pch_iir & SDE_PORTE_HOTPLUG_SPT;
 
-	if (hotplug_trigger) {
-		u32 dig_hotplug_reg;
-
-		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
-		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
+	if (hpd.hotplug_trigger) {
+		hpd.dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
+		I915_WRITE(PCH_PORT_HOTPLUG, hpd.dig_hotplug_reg);
 
 		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
-				   hotplug_trigger, dig_hotplug_reg, hpd_spt,
+				   &hpd, hpd_spt,
 				   spt_port_hotplug_long_detect);
 	}
 
-	if (hotplug2_trigger) {
-		u32 dig_hotplug_reg;
-
-		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
-		I915_WRITE(PCH_PORT_HOTPLUG2, dig_hotplug_reg);
+	if (hpd2.hotplug_trigger) {
+		hpd2.dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
+		I915_WRITE(PCH_PORT_HOTPLUG2, hpd2.dig_hotplug_reg);
 
 		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
-				   hotplug2_trigger, dig_hotplug_reg, hpd_spt,
+				   &hpd2, hpd_spt,
 				   spt_port_hotplug2_long_detect);
 	}
 
@@ -2492,17 +2509,21 @@ static void spt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 		gmbus_irq_handler(dev_priv);
 }
 
+static void ilk_hpd_irq_ack(struct drm_i915_private *dev_priv,
+			    struct hpd_irq_regs *hpd)
+{
+	hpd->dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
+	I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, hpd->dig_hotplug_reg);
+}
+
 static void ilk_hpd_irq_handler(struct drm_i915_private *dev_priv,
-				u32 hotplug_trigger,
-				const u32 hpd[HPD_NUM_PINS])
+				const struct hpd_irq_regs *hpd,
+				const u32 hpd_pins[HPD_NUM_PINS])
 {
-	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
+	u32 pin_mask = 0, long_mask = 0;
 
-	dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
-	I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
-
-	intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, hotplug_trigger,
-			   dig_hotplug_reg, hpd,
+	intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
+			   hpd, hpd_pins,
 			   ilk_port_hotplug_long_detect);
 
 	intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
@@ -2511,11 +2532,14 @@ static void ilk_hpd_irq_handler(struct drm_i915_private *dev_priv,
 static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
 				    u32 de_iir)
 {
+	struct hpd_irq_regs hpd = {};
 	enum pipe pipe;
-	u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
 
-	if (hotplug_trigger)
-		ilk_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ilk);
+	hpd.hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
+	if (hpd.hotplug_trigger) {
+		ilk_hpd_irq_ack(dev_priv, &hpd);
+		ilk_hpd_irq_handler(dev_priv, &hpd, hpd_ilk);
+	}
 
 	if (de_iir & DE_AUX_CHANNEL_A)
 		dp_aux_irq_handler(dev_priv);
@@ -2557,11 +2581,14 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
 static void ivb_display_irq_handler(struct drm_i915_private *dev_priv,
 				    u32 de_iir)
 {
+	struct hpd_irq_regs hpd = {};
 	enum pipe pipe;
-	u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
 
-	if (hotplug_trigger)
-		ilk_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ivb);
+	hpd.hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
+	if (hpd.hotplug_trigger)  {
+		ilk_hpd_irq_ack(dev_priv, &hpd);
+		ilk_hpd_irq_handler(dev_priv, &hpd, hpd_ivb);
+	}
 
 	if (de_iir & DE_ERR_INT_IVB)
 		ivb_err_int_handler(dev_priv);
@@ -2671,17 +2698,21 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
 	return ret;
 }
 
+static void bxt_hpd_irq_ack(struct drm_i915_private *dev_priv,
+			    struct hpd_irq_regs *hpd)
+{
+	hpd->dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
+	I915_WRITE(PCH_PORT_HOTPLUG, hpd->dig_hotplug_reg);
+}
+
 static void bxt_hpd_irq_handler(struct drm_i915_private *dev_priv,
-				u32 hotplug_trigger,
-				const u32 hpd[HPD_NUM_PINS])
+				const struct hpd_irq_regs *hpd,
+				const u32 hpd_pins[HPD_NUM_PINS])
 {
-	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
+	u32 pin_mask = 0, long_mask = 0;
 
-	dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
-	I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
-
-	intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, hotplug_trigger,
-			   dig_hotplug_reg, hpd,
+	intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
+			   hpd, hpd_pins,
 			   bxt_port_hotplug_long_detect);
 
 	intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
@@ -2689,29 +2720,28 @@ static void bxt_hpd_irq_handler(struct drm_i915_private *dev_priv,
 
 static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
 {
+	struct hpd_irq_regs tc = {};
+	struct hpd_irq_regs tbt = {};
 	u32 pin_mask = 0, long_mask = 0;
-	u32 trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK;
-	u32 trigger_tbt = iir & GEN11_DE_TBT_HOTPLUG_MASK;
 
-	if (trigger_tc) {
-		u32 dig_hotplug_reg;
+	tc.hotplug_trigger = iir & GEN11_DE_TC_HOTPLUG_MASK;
+	tbt.hotplug_trigger = iir & GEN11_DE_TBT_HOTPLUG_MASK;
 
-		dig_hotplug_reg = I915_READ(GEN11_TC_HOTPLUG_CTL);
-		I915_WRITE(GEN11_TC_HOTPLUG_CTL, dig_hotplug_reg);
+	if (tc.hotplug_trigger) {
+		tc.dig_hotplug_reg = I915_READ(GEN11_TC_HOTPLUG_CTL);
+		I915_WRITE(GEN11_TC_HOTPLUG_CTL, tc.dig_hotplug_reg);
 
-		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, trigger_tc,
-				   dig_hotplug_reg, hpd_gen11,
+		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
+				   &tc, hpd_gen11,
 				   gen11_port_hotplug_long_detect);
 	}
 
-	if (trigger_tbt) {
-		u32 dig_hotplug_reg;
+	if (tbt.hotplug_trigger) {
+		tbt.dig_hotplug_reg = I915_READ(GEN11_TBT_HOTPLUG_CTL);
+		I915_WRITE(GEN11_TBT_HOTPLUG_CTL, tbt.dig_hotplug_reg);
 
-		dig_hotplug_reg = I915_READ(GEN11_TBT_HOTPLUG_CTL);
-		I915_WRITE(GEN11_TBT_HOTPLUG_CTL, dig_hotplug_reg);
-
-		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, trigger_tbt,
-				   dig_hotplug_reg, hpd_gen11,
+		intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
+				   &tbt, hpd_gen11,
 				   gen11_port_hotplug_long_detect);
 	}
 
@@ -2797,7 +2827,6 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
 	if (master_ctl & GEN8_DE_PORT_IRQ) {
 		iir = I915_READ(GEN8_DE_PORT_IIR);
 		if (iir) {
-			u32 tmp_mask;
 			bool found = false;
 
 			I915_WRITE(GEN8_DE_PORT_IIR, iir);
@@ -2809,17 +2838,21 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
 			}
 
 			if (IS_GEN9_LP(dev_priv)) {
-				tmp_mask = iir & BXT_DE_PORT_HOTPLUG_MASK;
-				if (tmp_mask) {
-					bxt_hpd_irq_handler(dev_priv, tmp_mask,
-							    hpd_bxt);
+				struct hpd_irq_regs ddi = {};
+
+				ddi.hotplug_trigger = iir & BXT_DE_PORT_HOTPLUG_MASK;
+				if (ddi.hotplug_trigger) {
+					bxt_hpd_irq_ack(dev_priv, &ddi);
+					bxt_hpd_irq_handler(dev_priv, &ddi, hpd_bxt);
 					found = true;
 				}
 			} else if (IS_BROADWELL(dev_priv)) {
-				tmp_mask = iir & GEN8_PORT_DP_A_HOTPLUG;
-				if (tmp_mask) {
-					ilk_hpd_irq_handler(dev_priv,
-							    tmp_mask, hpd_bdw);
+				struct hpd_irq_regs ddi = {};
+
+				ddi.hotplug_trigger = iir & GEN8_PORT_DP_A_HOTPLUG;
+				if (ddi.hotplug_trigger) {
+					ilk_hpd_irq_ack(dev_priv, &ddi);
+					ilk_hpd_irq_handler(dev_priv, &ddi, hpd_bdw);
 					found = true;
 				}
 			}
-- 
2.21.0



More information about the Intel-gfx mailing list