[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake batch 3

Patchwork patchwork at emeril.freedesktop.org
Fri Aug 16 09:37:46 UTC 2019 

== Series Details ==

Series: Tiger Lake batch 3
URL   : https://patchwork.freedesktop.org/series/65290/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2f6d4ad3eda1 drm/i915/tgl: do not use DDIC
c0c2c6e584ca drm/i915/psr: Make PSR registers relative to transcoders
-:427: WARNING:LONG_LINE_COMMENT: line over 100 characters
#427: FILE: drivers/gpu/drm/i915/i915_reg.h:4311:
+#define EDP_PSR_AUX_DATA(tran, i)		_MMIO(_PSR_ADJ(tran, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */

total: 0 errors, 1 warnings, 0 checks, 393 lines checked
7cfc49277b02 drm/i915: Add transcoder restriction to PSR2
39b89150c6cd drm/i915: Do not unmask PSR interruption in IRQ postinstall
d626b231f0fb drm/i915/psr: Only handle interruptions of the transcoder in use
-:229: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'trans' - possible side-effects?
#229: FILE: drivers/gpu/drm/i915/i915_reg.h:4292:
+#define   _EDP_PSR_TRANS_SHIFT(trans)		(trans == TRANSCODER_EDP ? 0 : (trans + 1) * 8)

-:229: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'trans' may be better as '(trans)' to avoid precedence issues
#229: FILE: drivers/gpu/drm/i915/i915_reg.h:4292:
+#define   _EDP_PSR_TRANS_SHIFT(trans)		(trans == TRANSCODER_EDP ? 0 : (trans + 1) * 8)

total: 0 errors, 0 warnings, 2 checks, 203 lines checked
451e5d5e655b drm/i915/bdw+: Enable PSR in any eDP port
-:28: ERROR:CODE_INDENT: code indent should use tabs where possible
#28: FILE: drivers/gpu/drm/i915/display/intel_psr.c:581:
+         * BDW+ platforms with DDI implementation of PSR have different$

total: 1 errors, 0 warnings, 0 checks, 14 lines checked
2b396b0fd3a0 drm/i915: Guard and warn if more than one eDP panel is present
83d401588ff1 drm/i915/tgl: Change PSR2 transcoder restriction
d822292eb833 drm/i915: Do not read PSR2 register in transcoders without PSR2
3e0a6b536020 drm/i915/tgl: PSR link standby is not supported anymore
6a5a43b3886e drm/i915/tgl: Access the right register when handling PSR interruptions
09bfdb8f1220 drm/i915/tgl: Add maximum resolution supported by PSR2 HW
3c79bc060462 drm/i915/mst: Do not hardcoded the crtcs that encoder can connect
a74e4acb4ff7 drm/i915: Add for_each_new_intel_connector_in_state()
-:22: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.num_connector; \
+	     (__i)++) \
+		for_each_if ((__state)->base.connectors[__i].ptr && \
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.num_connector; \
+	     (__i)++) \
+		for_each_if ((__state)->base.connectors[__i].ptr && \
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.num_connector; \
+	     (__i)++) \
+		for_each_if ((__state)->base.connectors[__i].ptr && \
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:26: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#26: FILE: drivers/gpu/drm/i915/display/intel_display.h:418:
+		for_each_if ((__state)->base.connectors[__i].ptr && \

-:27: WARNING:LONG_LINE: line over 100 characters
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:419:
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \

-:28: WARNING:LONG_LINE: line over 100 characters
#28: FILE: drivers/gpu/drm/i915/display/intel_display.h:420:
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

total: 1 errors, 3 warnings, 2 checks, 14 lines checked
be1c98132963 drm: Add for_each_oldnew_intel_crtc_in_state_reverse()
-:25: CHECK:LINE_SPACING: Please don't use multiple blank lines
#25: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
 
+

-:33: WARNING:LONG_LINE: line over 100 characters
#33: FILE: drivers/gpu/drm/i915/display/intel_display.h:423:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \

-:33: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#33: FILE: drivers/gpu/drm/i915/display/intel_display.h:423:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+	for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+	     (__i) >= 0  && \
+	     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+	      (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+	      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+	     (__i)--) \
+		for_each_if(crtc)

-:33: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#33: FILE: drivers/gpu/drm/i915/display/intel_display.h:423:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+	for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+	     (__i) >= 0  && \
+	     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+	      (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+	      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+	     (__i)--) \
+		for_each_if(crtc)

-:33: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#33: FILE: drivers/gpu/drm/i915/display/intel_display.h:423:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+	for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+	     (__i) >= 0  && \
+	     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+	      (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+	      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+	     (__i)--) \
+		for_each_if(crtc)

total: 0 errors, 1 warnings, 4 checks, 22 lines checked
e4f1a7b7ac7d drm/i915: Disable pipes in reverse order
31a881d23902 drm/i915/tgl: Select master transcoder in DP MST
646b03f0618a drm/i915/tgl: Introduce initial Tiger Lake workarounds
e0b3f8f95c79 drm/i915/tgl: Implement Wa_1406941453
c9ba1d70c006 drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating
71de6cdc0cfe drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwards
-:11: WARNING:BAD_SIGN_OFF: Duplicate signature
#11: 
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>

total: 0 errors, 1 warnings, 0 checks, 8 lines checked
9f588da30621 drm/i915/tgl: implement WaProgramMgsrForCorrectSliceSpecificMmioReads
df2f2dd03b35 drm/i915/tgl: Register state context definition for Gen12
-:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#16: 
the gen8 path), fix length of first LRI for non-rcs to include the semaphore

total: 0 errors, 1 warnings, 0 checks, 240 lines checked
19e7d157eeab drm/i915/tgl: move DP_TP_* to transcoder
9a5fcbcdce67 drm/i915/tgl: Implement TGL DisplayPort training sequence
02738cff2fc6 HACK: drm/i915/tgl: Gen12 render context size
6ffd68d96f23 drm/i915/tgl: add Gen12 default indirect ctx offset
06ab10d9acec drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID
5fb45b0f331a drm/i915/tgl: Report valid VDBoxes with SFC capability
9a45d563be0c drm/i915/tgl: Move GTCR register to cope with GAM MMIO address remap
f5852b6a5343 drm/i915/tgl: Updated Private PAT programming
d07f569dbdfc drm/i915/tgl/perf: use the same oa ctx_id format as icl
812b8979deb4 drm/i915/perf: add a parameter to control the size of OA buffer
cc1d225b2d89 drm/i915/tgl: Add perf support on TGL
-:398: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#398: FILE: drivers/gpu/drm/i915/i915_perf.c:3880:
+			dev_priv->perf.gen8_valid_ctx_bit = (1<<16);
 			                                      ^

-:410: CHECK:LINE_SPACING: Please don't use multiple blank lines
#410: FILE: drivers/gpu/drm/i915/i915_reg.h:702:
 
+

-:552: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#552: 
new file mode 100644

-:557: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#557: FILE: drivers/gpu/drm/i915/oa/i915_oa_tgl.c:1:
+/*

-:558: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead
#558: FILE: drivers/gpu/drm/i915/oa/i915_oa_tgl.c:2:
+ * SPDX-License-Identifier: MIT

-:676: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#676: FILE: drivers/gpu/drm/i915/oa/i915_oa_tgl.h:1:
+/*

-:677: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead
#677: FILE: drivers/gpu/drm/i915/oa/i915_oa_tgl.h:2:
+ * SPDX-License-Identifier: MIT

-:690: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#690: FILE: drivers/gpu/drm/i915/oa/i915_oa_tgl.h:15:
+extern void i915_perf_load_test_config_tgl(struct drm_i915_private *dev_priv);

total: 0 errors, 5 warnings, 3 checks, 619 lines checked
ec3736e13a4b drm/i915/tgl: Gen-12 display loses Yf tiling and legacy CCS support
a8f121f6224c drm/framebuffer/tgl: Format modifier for Intel Gen-12 render compression
94f0008b78ce drm/i915/tgl: Gen-12 render decompression
-:134: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#134: FILE: drivers/gpu/drm/i915/display/intel_display.c:2712:
+				tile_width = 64/cpp;
 				               ^

total: 0 errors, 0 warnings, 1 checks, 203 lines checked
ad1ee48f6561 drm/framebuffer/tgl: Format modifier for Intel Gen-12 media compression
5390f66e9174 drm/i915/tgl: Gen-12 media compression
-:50: WARNING:TABSTOP: Statements should start on a tabstop
#50: FILE: drivers/gpu/drm/i915/display/intel_display.c:2271:
+	      return true;

-:53: WARNING:TABSTOP: Statements should start on a tabstop
#53: FILE: drivers/gpu/drm/i915/display/intel_display.c:2274:
+	      return color_plane == 1;

-:55: WARNING:TABSTOP: Statements should start on a tabstop
#55: FILE: drivers/gpu/drm/i915/display/intel_display.c:2276:
+	      return false;

-:72: WARNING:MISSING_BREAK: Possible switch case/default not preceded by break or fallthrough comment
#72: FILE: drivers/gpu/drm/i915/display/intel_display.c:2539:
+	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:

total: 0 errors, 4 warnings, 0 checks, 134 lines checked

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