[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSB enablement. (rev2)

[Patchwork]

== Series Details ==

Series: DSB enablement. (rev2)
URL   : https://patchwork.freedesktop.org/series/63013/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e65049952809 drm/i915/dsb: feature flag added for display state buffer.
ff9965b61f73 drm/i915/dsb: DSB context creation.
-:43: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#43: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 121 lines checked
5e026ff7ced1 drm/i915/dsb: single register write function for DSB.
c2a803f1f6c9 drm/i915/dsb: Added enum for reg write capability.
c432f5814713 drm/i915/dsb: Indexed register write function for DSB.
363815055070 drm/i915/dsb: Update i915_write to call dsb-write.
-:51: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#51: FILE: drivers/gpu/drm/i915/i915_drv.h:2419:
+#define I915_WRITE(reg__, val__) \
+	(reg__.cap) ? intel_dsb_reg_write(dev_priv->dsb, (reg__), (val__)) : \
+	__I915_REG_OP(write, dev_priv, (reg__), (val__))

-:51: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'reg__' - possible side-effects?
#51: FILE: drivers/gpu/drm/i915/i915_drv.h:2419:
+#define I915_WRITE(reg__, val__) \
+	(reg__.cap) ? intel_dsb_reg_write(dev_priv->dsb, (reg__), (val__)) : \
+	__I915_REG_OP(write, dev_priv, (reg__), (val__))

-:51: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val__' - possible side-effects?
#51: FILE: drivers/gpu/drm/i915/i915_drv.h:2419:
+#define I915_WRITE(reg__, val__) \
+	(reg__.cap) ? intel_dsb_reg_write(dev_priv->dsb, (reg__), (val__)) : \
+	__I915_REG_OP(write, dev_priv, (reg__), (val__))

total: 1 errors, 0 warnings, 2 checks, 26 lines checked
6a23be979f1b drm/i915/dsb: Register definition of DSB registers.
20dcb2d6beeb drm/i915/dsb: Check DSB engine status.
58c392a91a63 drm/i915/dsb: functions to enable/disable DSB engine.
4a715966094e drm/i915/dsb: function to trigger workload execution of DSB.
0607b6bd8f57 drm/i915/dsb: function to destroy DSB context.
16d2ad5f1cf2 drm/i915/dsb: Early prepare of dsb context.
cb19df1870f3 drm/i915/dsb: Cleanup of DSB context.
d88ece297e3e drm/i915/dsb: Documentation for DSB.
5ff614b2aa70 drm/i915/dsb: Enable gamma lut programming using DSB.
-:72: WARNING:LONG_LINE: line over 100 characters
#72: FILE: drivers/gpu/drm/i915/i915_reg.h:10255:
+#define PREC_PAL_GC_MAX(pipe, i)	_MMIO(_PIPE(pipe, _PAL_PREC_GC_MAX_A, _PAL_PREC_GC_MAX_B) + (i) * 4, \

-:74: WARNING:LONG_LINE: line over 100 characters
#74: FILE: drivers/gpu/drm/i915/i915_reg.h:10257:
+#define PREC_PAL_EXT_GC_MAX(pipe, i)	_MMIO(_PIPE(pipe, _PAL_PREC_EXT_GC_MAX_A, _PAL_PREC_EXT_GC_MAX_B) + (i) * 4, \

-:76: WARNING:LONG_LINE: line over 100 characters
#76: FILE: drivers/gpu/drm/i915/i915_reg.h:10259:
+#define PREC_PAL_EXT2_GC_MAX(pipe, i)	_MMIO(_PIPE(pipe, _PAL_PREC_EXT2_GC_MAX_A, _PAL_PREC_EXT2_GC_MAX_B) + (i) * 4, \

total: 0 errors, 3 warnings, 0 checks, 67 lines checked