[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Initial support for Tiger Lake (rev2)

[Patchwork]

== Series Details ==

Series: Initial support for Tiger Lake (rev2)
URL   : https://patchwork.freedesktop.org/series/62726/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
00d88902cdbe drm/i915: Add 4th pipe and transcoder
1957212e1a06 drm/i915/tgl: add initial Tiger Lake definitions
f090ff212c09 drm/i915/tgl: Introduce Tiger Lake PCH
5bae69ddf724 drm/i915/tgl: Add TGL PCH detection in virtualized environment
2357168b2a25 drm/i915/tgl: Add TGL PCI IDs
-:32: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#32: FILE: include/drm/i915_pciids.h:587:
+#define INTEL_TGL_12_IDS(info) \
+	INTEL_VGA_DEVICE(0x9A49, info), \
+	INTEL_VGA_DEVICE(0x9A40, info), \
+	INTEL_VGA_DEVICE(0x9A59, info), \
+	INTEL_VGA_DEVICE(0x9A60, info), \
+	INTEL_VGA_DEVICE(0x9A68, info), \
+	INTEL_VGA_DEVICE(0x9A70, info), \
+	INTEL_VGA_DEVICE(0x9A78, info)

-:32: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'info' - possible side-effects?
#32: FILE: include/drm/i915_pciids.h:587:
+#define INTEL_TGL_12_IDS(info) \
+	INTEL_VGA_DEVICE(0x9A49, info), \
+	INTEL_VGA_DEVICE(0x9A40, info), \
+	INTEL_VGA_DEVICE(0x9A59, info), \
+	INTEL_VGA_DEVICE(0x9A60, info), \
+	INTEL_VGA_DEVICE(0x9A68, info), \
+	INTEL_VGA_DEVICE(0x9A70, info), \
+	INTEL_VGA_DEVICE(0x9A78, info)

total: 1 errors, 0 warnings, 1 checks, 21 lines checked
ff15c4352fcc x86/gpu: add TGL stolen memory support
2e99be826cae drm/i915/tgl: Check if pipe D is fused
c66cb70352e9 drm/i915/tgl: use TRANSCODER_EDP_VDSC on transcoder A
48e70eb0a8fd drm/i915/tgl: Add power well support
ce8d3b70dd79 drm/i915/tgl: Add power well to support 4th pipe
d93d40c8620e drm/i915/tgl: Add new pll ids
6f0b3408f127 drm/i915/tgl: Add pll manager
0c85ba787405 drm/i915/tgl: Add additional ports for Tiger Lake
9c0c1f90cc5b drm/i915/tgl: update ddi/tc clock_off bits
-:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'port' - possible side-effects?
#24: FILE: drivers/gpu/drm/i915/i915_reg.h:9726:
+#define  ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(port)	(1 << ((port) == PORT_C ? 24 : \
+						       (port) + 10))

-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tc_port' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/i915_reg.h:9728:
+#define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port)	(1 << ((tc_port) < PORT_TC4 ? \
+						       (tc_port) + 12 : \
+						       (tc_port) - PORT_TC4 + 21))

total: 0 errors, 0 warnings, 2 checks, 14 lines checked
480ad7f760d3 drm/i915/tgl: Add gmbus gpio pin to port mapping
02eb68e95124 drm/i915/tgl: port to ddc pin mapping
515bc804c4ae drm/i915/tgl: select correct bit for port select
8ccbd571ebbe drm/i915/tgl: extend intel_port_is_combophy/tc
dc4c3dc34108 drm/i915/tgl: init ddi port A-C for Tiger Lake
6c6c34e25091 drm/i915/tgl: Add vbt value mapping for DDC Bus pin
2a4b9d250782 drm/i915/tgl: apply Display WA #1178 to fix type C dongles
ce6203f8c68e drm/i915/gen12: MBUS B credit change
281046dee43c drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization
47bbfafa8cfc drm/i915/tgl: Add DPLL registers
0482935d29fe drm/i915/tgl: Update DPLL clock reference register