[Intel-gfx] ✓ Fi.CI.BAT: success for Tiger Lake part 2

[Patchwork]

== Series Details ==

Series: Tiger Lake part 2
URL   : https://patchwork.freedesktop.org/series/63670/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6480 -> Patchwork_13653
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13653/

Known issues
------------

  Here are the changes found in Patchwork_13653 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt at prime_vgem@basic-fence-flip:
    - fi-ilk-650:         [PASS][1] -> [DMESG-WARN][2] ([fdo#106387]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13653/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html

  
#### Possible fixes ####

  * {igt at gem_ctx_switch@legacy-render}:
    - fi-icl-u3:          [INCOMPLETE][3] ([fdo#107713]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-icl-u3/igt@gem_ctx_switch@legacy-render.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13653/fi-icl-u3/igt@gem_ctx_switch@legacy-render.html

  * igt at i915_module_load@reload:
    - fi-blb-e6850:       [INCOMPLETE][5] ([fdo#107718]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-blb-e6850/igt@i915_module_load@reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13653/fi-blb-e6850/igt@i915_module_load@reload.html

  * igt at i915_selftest@live_contexts:
    - fi-skl-iommu:       [INCOMPLETE][7] ([fdo#111050]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-skl-iommu/igt@i915_selftest@live_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13653/fi-skl-iommu/igt@i915_selftest@live_contexts.html

  * igt at kms_chamelium@hdmi-edid-read:
    - {fi-icl-u4}:        [FAIL][9] ([fdo#111045] / [fdo#111046 ]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13653/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111046 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111046 
  [fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096


Participating hosts (53 -> 45)
------------------------------

  Additional (2): fi-apl-guc fi-cml-u 
  Missing    (10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-y fi-icl-dsi fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_6480 -> Patchwork_13653

  CI_DRM_6480: a4856ee98f5d0058656d4fd8efb4ffa433bdfaa4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5096: bb4d55a02dd3e1971f2c091a13b6bd7f0b496e40 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13653: a093f7155e489ec00adfe2f0a8fcf4e5776c2586 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

a093f7155e48 drm/i915/mst: Do not hardcoded the crtcs that encoder can connect
224b62268855 drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers
5bc6743823d3 drm/i915: Move MOCS setup to intel_mocs.c
f0efc64bb91a drm/i915/tgl: Tigerlake only has global MOCS registers
155c1076b200 drm/i915/tgl: Define MOCS entries for Tigerlake
b7e6d7545812 drm/i915/tgl: Implement Wa_1406941453
4a3b203f6670 drm/i915/tgl: Implement Wa_1604555607
86ca705881e4 drm/i915/tgl: Introduce initial Tigerlake Workarounds
208c82065cfd drm/i915/tgl: allow the reg_read ioctl to read the RCS TIMESTAMP register
75c99ba6ce4d drm/i915/gen12: add support for reading the timestamp frequency
afc14ee9b29d drm/i915/tgl: Add support for dkl pll write
3b65df033d2d drm/i915/tgl: start adding the DKL PLLs to use on TC ports
2ab94df17776 drm/i915/tgl: Add DKL phy pll state calculations
eb6e1fade3e4 drm/i915/tgl: re-indent code to prepare for DKL changes
68948c4cd8c6 drm/i915/tgl: Add DKL phy pll registers
09bbb93143b0 drm/i915/dmc: Load DMC on TGL
53ccf63d0767 drm/i915/tgl: handle DP aux interrupts
f2dae71692e9 drm/i915/tgl: Update north display hotplug detection to TGL connections
57a1c831349d drm/i915/tgl: Add hpd interrupt handling
e617f60b4405 drm/i915/tgl: update ddi/tc clock_off bits
05104c3c0561 drm/i915/tgl: select correct bit for port select
4f24138130a1 drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13653/