[Intel-gfx] ✓ Fi.CI.BAT: success for Tiger Lake part 2 (rev2)

Mon Jul 15 22:55:22 UTC 2019

== Series Details ==

Series: Tiger Lake part 2 (rev2)
URL   : https://patchwork.freedesktop.org/series/63670/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6488 -> Patchwork_13661
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_13661:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt at i915_selftest@live_hangcheck:
    - {fi-icl-u4}:        [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-icl-u4/igt@i915_selftest@live_hangcheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-icl-u4/igt@i915_selftest@live_hangcheck.html

Known issues
------------

  Here are the changes found in Patchwork_13661 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt at gem_exec_fence@basic-wait-default:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html

  * igt at gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [PASS][5] -> [INCOMPLETE][6] ([fdo#107718])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt at i915_selftest@live_contexts:
    - fi-skl-iommu:       [PASS][7] -> [INCOMPLETE][8] ([fdo#111050])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-skl-iommu/igt@i915_selftest@live_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-skl-iommu/igt@i915_selftest@live_contexts.html

#### Possible fixes ####

  * igt at gem_ctx_exec@basic:
    - fi-icl-u3:          [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-icl-u3/igt@gem_ctx_exec@basic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-icl-u3/igt@gem_ctx_exec@basic.html

  * igt at i915_selftest@live_execlists:
    - fi-skl-gvtdvm:      [DMESG-FAIL][11] ([fdo#111108]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html

  * igt at kms_chamelium@dp-crc-fast:
    - fi-icl-u2:          [FAIL][13] ([fdo#109635 ]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
    - fi-cml-u2:          [FAIL][15] ([fdo#110627]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html

  * igt at prime_vgem@basic-fence-flip:
    - fi-ilk-650:         [DMESG-WARN][17] ([fdo#106387]) -> [PASS][18] +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6488/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html

  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 
  [fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627
  [fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050
  [fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
  [fdo#111115]: https://bugs.freedesktop.org/show_bug.cgi?id=111115

Participating hosts (54 -> 47)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 

Build changes
-------------

  * Linux: CI_DRM_6488 -> Patchwork_13661

  CI_DRM_6488: bbf4d95db6732b16547dc9d849701ccf4189aa0d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5098: 41ff022b62b45a5b84504daa3537fa1b295b97c9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13661: 261c7e151c1048692404d5a3e3e5fc0fdb7a038c @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

261c7e151c10 drm/i915/mst: Do not hardcoded the crtcs that encoder can connect
f844f9561a03 drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers
2d16249077a4 drm/i915: Move MOCS setup to intel_mocs.c
bbe66a71b6b7 drm/i915/tgl: Tigerlake only has global MOCS registers
622babc7ad99 drm/i915/tgl: Define MOCS entries for Tigerlake
21e1d03a7fc9 drm/i915/tgl: Implement Wa_1406941453
e141194e47b0 drm/i915/tgl: Implement Wa_1604555607
c961a0a0ef25 drm/i915/tgl: Introduce initial Tigerlake Workarounds
94f4cd6f0993 drm/i915/tgl: allow the reg_read ioctl to read the RCS TIMESTAMP register
8839cfd99330 drm/i915/gen12: add support for reading the timestamp frequency
cf9e40f919cc drm/i915/tgl: Add support for dkl pll write
21a4942ecadc drm/i915/tgl: start adding the DKL PLLs to use on TC ports
fde555890199 drm/i915/tgl: Add DKL phy pll state calculations
bed7e1bf70ee drm/i915/tgl: re-indent code to prepare for DKL changes
eba607ec684f drm/i915/tgl: Add DKL phy pll registers
d79bc42ba14e drm/i915/dmc: Load DMC on TGL
b77732b3475a drm/i915/tgl: handle DP aux interrupts
89b636156020 drm/i915/tgl: Update north display hotplug detection to TGL connections
545774fac0b1 drm/i915/tgl: Add hpd interrupt handling
61df67c27f47 drm/i915/tgl: update ddi/tc clock_off bits
7aeb531f6973 drm/i915/tgl: select correct bit for port select
1399f5e0e588 drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13661/