[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CTS fixes (rev3)

[Lionel Landwerlin]

On 25/06/2019 16:14, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2019-06-25 14:09:57)
>> Anybody knows whether the selftests are dealing with read only
>> whitelisted registers?
>> I'm not quite sure what can be tested with those (unless you can
>> exercise the 3d pipeline in this case).
> John added a hack:
>
> static bool ro_register(u32 reg)
> {
>          if (reg & RING_FORCE_TO_NONPRIV_RD)
>                  return true;
>
>          return false;
> }
>
> to ignore them. It is not clear why that did not take.
> -Chris
>
Oh...

That seems broken for a read only register and a default value of 0 :


static bool result_neq(struct intel_engine_cs *engine,
                        u32 a, u32 b, i915_reg_t reg)
{
         if (a == b && !writeonly_reg(engine->i915, reg)) {
                 pr_err("Whitelist register 0x%4x:%08x was unwritable\n",
                        i915_mmio_reg_offset(reg), a);
                 return false;
         }

         return true;
}